Simple Code Generator

Acknowledgement
• Alfred V Aho, Monica S. Lam, Ravi Sethi, Jeffrey D Ullman-
“Compilers- Principles, Techniques and Tools”

Dr. Girish Kumar Patnaik 2

 A Simple Code Generator
• Algorithm that generates code for a single basic block.
• It considers each three-address instruction in turn, and
keeps track of what values are in what registers so it
can avoid generating unnecessary loads and stores
• The machine instructions are of the form
– LD reg, mem
– ST mem, reg
– OP reg, reg, reg
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 Register and Address Descriptors
• A register descriptor keeps track of what is currently
stored in a register at a particular point in the code,
e.g. a local variable, argument, global variable, etc.
MOV a,R0 “R0 contains a”
• An address descriptor keeps track of the location
where the current value of the name can be found at
run time, e.g. a register, stack location, memory
address, etc.
MOV a,R0
MOV R0,R1 “a in R0 and R1”
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The Code-Generation Algorithm

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 Design of the Function getReg
• For x = y + z, rules for picking register Ry for y:
– If y is currently in a register, pick a register already
containing y as Ry
– If y is not in a register, but there is a register that is
currently empty, pick one such register as Ry
– When y is not in a register, and there is no register
that is currently empty
• pick one of the allowable registers

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 Design of the Function getReg
• How to Pick one of the allowable registers?
– Let R be a candidate register, and suppose v is one of the
variables that the register descriptor for R says is in R then make
sure that v's value either is not really needed, or that there is
somewhere else
a) If the address descriptor for v says that v is somewhere besides R,
then we are OK.
b) If v is x, the value being computed by instruction I, and x is not also
one of the other operands of instruction I (z in this example) , then
we are OK.
c) Otherwise, if v is not used later then we are OK.
d) If we are not OK by one of the first two cases, then we need to
generate the store instruction ST v, R to place a copy of v in its own
memory location. This operation is called a spill.
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 Design of the Function getReg
• For x = y + z, rules for picking register Rx for x:
– Since a new value of x is being computed, a
register that holds only x is always an acceptable
choice for Rx
– If y is not used after instruction I, then Ry can also
be used as Rx

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 Peephole Optimization
• Examines a short sequence of target instructions in a
window (peephole) and replaces the instructions by a
faster and/or shorter sequence when possible
• Applied to intermediate code or target code
• Typical optimizations:
– Redundant instruction elimination
– Flow-of-control optimizations
– Algebraic simplifications
– Use of machine idioms

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 Peephole Opt: Eliminating Redundant
Loads and Stores
• Consider
LD a,R0 OR LD R0,a
ST R0,a OR ST a,R0
• The second instruction can be deleted, but only if it is not
labeled with a target label
– Peephole represents sequence of instructions with at most one
entry point
• The first instruction can also be deleted if live(a)=false

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 Peephole Optimization: Deleting
Unreachable Code
• Unlabeled blocks can be removed

if 0==0 goto L2 goto L2

b := x + y b := x + y
… …

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 Peephole Optimization: Branch
Chaining
• Shorten chain of branches by modifying
target labels
if a==0 goto L2 if a==0 goto L3

b := x + y b := x + y
… …

L2: goto L3 L2: goto L3

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Peephole Optimization: Other Flow-of-
Control Optimizations
• Remove redundant jumps

…
goto L1
L1:
…
…

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 Other Peephole Optimizations
• Reduction in strength: replace expensive arithmetic operations with
cheaper ones
…
…
a := x ^ 2
a := x * x
b := y / 8
b := y >> 3
• Utilize machine idioms
… …
a := a + 1 inc a
• Algebraic simplifications
… …
a := a + 0
b := b * 1
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 Register Allocation and Assignment
• Instructions involving only register operands are faster
than those involving memory operands.
• Assign base addresses to one group of registers,
arithmetic computations to another, the top of the
stack to a fixed register, and so on
• Advantage: simplifies the design of a code generator.
• Disadvantage: applied too strictly, it uses registers
inefficiently;
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 Global Register Allocation
• Assign registers to frequently used variables
and keep these registers consistent across
block boundaries (globally)
• Assign some fixed number of registers to hold
the most active values in each inner loop.
– Registers not already allocated may be used to
hold values local to one block
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 Usage Counts
• Assume that the savings to be realized by keeping
a variable x in a register for the duration of a
loop L is one unit of cost for each reference to x
if x is already in a register.
– Count a savings of one for each use of x in loop L that
is not preceded by an assignment to x in the same
block.
– Save two units if we can avoid a store of x at the end
of a block
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 Usage Counts
• An approximate formula for the benefit to be
realized from allocating a register x within loop L
is

• where use(x, B) is the number of times x is used

in B prior to any definition of x
• live(x, B) is 1 if x is live on exit from B and is
assigned a value in B, and live(x, B) is 0 otherwise
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 Register Assignment for Outer Loops
• If an outer loop L1 contains an inner loop L2 ,
the names allocated registers in L2 need not
be allocated registers in L1 - L2
• if we choose to allocate x a register in L2 but
not L1 , we must load x on entrance to L2 and
store x on exit from L2
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Register Allocation by Graph Coloring
• When a register is needed for a computation but
all available registers are in use, the contents of
one of the used registers must be stored (spilled)
into a memory location in order to free up a
register.
• Graph coloring is a simple, systematic technique
for allocating registers and managing register
spills.

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Register Allocation by Graph Coloring
• Two passes are used
– In the first, target-machine instructions are
selected as though there are an infinite number
of symbolic registers
– A second pass assigns physical registers to
symbolic ones. The goal is to find an assignment
that minimizes the cost of spills.
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Register Allocation by Graph Coloring
• In the second pass, for each procedure a register-interference
graph is constructed in which the nodes are symbolic
registers and an edge connects two nodes if one is live at a
point where the other is defined

For example, a is live at the second

statement, which defines d; therefore, in
the graph there would be an edge
between the nodes for a and d.
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Register Allocation by Graph Coloring
• An attempt is made to color the register-interference
graph using k colors, where k is the number of
assignable registers.
• A graph is said to be colored if each node has been
assigned a color in such a way that no two adjacent
nodes have the same color.
• A color represents a register, and the color makes sure
that no two symbolic registers that can interfere with
each other are assigned the same physical register.
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Register Allocation by Graph Coloring
• Heuristic technique can usually be used
– Suppose a node n in a graph G has fewer than k
neighbors (nodes connected to by an edge).
– Remove n and its edges from G to obtain a graph G'.
– A k-coloring of G' can be extended to a k-coloring of G
by assigning n a color not assigned to any of its
neighbors.
– By repeatedly eliminating nodes having fewer than k
edges from the register interference graph
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Register Allocation by Graph Coloring
• Either we obtain the empty graph or a graph in
which each node has k or more adjacent nodes.
• In the latter case a k-coloring is no longer
possible
– At this point a node is spilled by introducing code to
store and reload the register.
• A general rule is to avoid introducing spill code
into inner loops.
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