 Architecture is those attributes visible to the

programmer
 Instruction set, number of bits used for data
representation, I/O mechanisms, addressing
techniques.
 e.g. Is there a multiply instruction?
 Organization is how features are implemented
 Control signals, interfaces, memory technology.
 e.g. Is there a hardware multiply unit or is it done by
repeated addition?
 All Intel x86 family share the same basic
architecture
 The IBM System/370 family share the same basic
architecture

 This gives code compatibility

 At least backwards (a newer version of a product is
compatible with an older version).
 Organization differs between different versions
 Vacuum tube - 1946-1957
 Transistor - 1958-1964
 Small scale integration - 1965 on
 Up to 100 devices on a chip
 Medium scale integration - to 1971
 100-3,000 devices on a chip
 Large scale integration - 1971-1977
 3,000 - 100,000 devices on a chip
 Very large scale integration - 1978 -1991
 100,000 - 100,000,000 devices on a chip
 Ultra large scale integration – 1991 -
 Over 100,000,000 devices on a chip
5
6
 How many transistors are their in old
and current MPs?

- Intel 8080 (year 1974)

>>
- 6000
- i7 (year 2016)
>>
~3 billion

7
With advances in semiconductor
technologies, MPs are becoming:
- smaller
- more powerful
- faster
- cheaper

..hence MPs can be easily embedded

in several systems (e.g. car, fridge,
watch..) to enhance their performance
while remaining within public reach.
8
9
Personal
computers

10
 What are the main
components of a computer ?

1. ..

11
12
https://www.desktopclass.com/computer-it/discuss-primary-components-of-a-computer-system.html

13
1. Memory

2. CPU (processor)

3. I/O Devices

4. Bus System

14
CPU – controls the operation of the computer and
performs its data processing functions
 Main Memory – stores data
 I/O – moves data between the computer and its
external environment
 System Interconnection – some mechanism that
provides for communication among CPU, main
memory, and I/O

15
16
 ..
1. Speed  ?? CPU
2. Cost 
.. (~ )

.. (~)
?? CPU

..(~ )
17
 Registers
1. Speed  Inside
2. Cost  CPU
Cache (~ )

RAM (~)
Outside
CPU
Hard Disk (~ )
18
 Unit Equivalent Byte Capacity
Byte (B) 1 1
kilobyte (kB) 210 1,024
Megabyte (MB) 220 1,048,576
Gigabyte (GB) 230 1,073,741,824
Terabyte (TB) 240 1,099,511,627,776
Petabyte (PB) 250 1,125,899,906,842,624

19
1. Registers are the processor’s memory used for storing
intermediate results.

2. Cache memory holds copies of frequently accessed

data in order to speed up the data transfer from the
hard disk to RAM.

3. RAM is where all the active data and programs are

stored so that they can be easily accessed by the CPU.

4. Hard disk is the computers main storing device.

20
21
https://www.proprofs.com/quiz-school/story.php?title=input-output-devices_1

22
Operation:
x=3; x=x+1;

Data:
>> 3

Control:
>> add

Address: https://en.wikipedia.org/wiki/System_bus

>> address of x

23
 How are microprocessors
programmed?

…. Code

24
25
26
x=3;
x=x+1;
cout<<“x=“<<x<<endl;

000101001010011111
27
x=3;
x=x+1;
cout<<“x=“<<x<<endl;

Compiler LDA X
INC X
PRINT X

Assembler

000101001010011111
28
…

29
30
31
32
33
Part 1:
.
 Understanding internal architecture of basic CPU

 Learning to program a basic CPU

 Getting acquainted with several CPU aspects

34
35
Remember…

36
1. Binary Numbers

2. 2’s complement

3. Hexa Decimal

4. Combinational vs. Sequential Circuits

37
1. Binary numbers

38
 1. Binary numbers

>> (0010 0011)2 = 1 + 2 + 32 = 35

39
 1. Binary numbers
Binary
Dec.
128 64 32 16 8 4 2 1
2 0 0 1 0
20 0 0 0 1 0 1 0 0
-20 1 1 1 0 1 1 0 0

40
 2. 2’s complement
Decimal Binary
8 4 2 1
2 0 0 1 0
-2 1 1 1 0

5 0 1 0 1
-5 1 0 1 1

4 0 1 0 0
-4 1 1 0 0
41
 3. hexadecimal

Binary: 1111 0101 1010 0111

1111 0101 1010 0111
Hexa F 5 A 7
hexa 3 1 B 4
0011 0001 1011 0100

42
3. hexadecimal

43
 4. Combinational
vs sequential circuits

A. Combinational (no clk)

 Ex: adder – decoder - mux
 Output depends on input at the present moment
only.

B. Sequential (clk)
 Ex. Delay Flip flop (Registers) – Toggle FF
 Output depends on history of the inputs

44
 4A. Combinational circuits
MULTIPLEXER (MUX)

S1 S0 Y

Inputs: 2n
Select lines:
Output:
45
 4A. Combinational circuits
DECODER

E A1 A0 Y3 Y2 Y1 Y0

Inputs: 2n Output:
46
4A. Combinational circuits
ADDER/SUBTRACTOR (TUTORIAL)

47
4B. SEQUENTIAL circuits
DFF / TFF

48
 4B. SEQUENTIAL circuits
REGISTERS

- Clock: essential for operation

- Load: Q  D (must be 1 to store new value)
- Clear: Q3Q2Q1Q0 = (0000)2

49
 4B. SEQUENTIAL circuits
REGISTERS

input output

50