PSIT, Kanpur

Computer Organization and Architecture (BCS302)

Unit - 2 (Part - III)
 Description & Representation of floating point operation
 Floating point arithmetic operations
 IEEE Standard for Floating Point Numbers

Floating-Point Arithmetic Operations

A floating point number in computer registers consists of two parts: a mantissa m and an exponent e. The two parts represent a
number obtained from multiplying m times a radix r raised to the value of e; thus

m x re
The mantissa may be a fraction or an integer. The location of the radix point and the value of the radix r are assumed and are not
included in the registers.

For example, assume a fraction representation and a radix 10.

The decimal number 537.25 is represented in a register with m = 53725 and e = 3 and is interpreted to represent the floating-point
number
.53725 X 103

A floating-point number is normalized if the most significant digit of the mantissa is nonzero. In this way the mantissa
contains the maximum possible number of significant digits.
A zero cannot be normalized because it does not have a nonzero digit. It is represented in floating-point by all 0's in the mantissa
and exponent.
Consider the sum of the following floating-point numbers:
.5372400 x 102
+ .1580000 x 10-1

It is necessary that the two exponents be equal before the mantissas can be added.

The usual alignment procedure is to shift the mantissa that has the smaller exponent to the right by a number of places equal to the
difference between the exponents. After this is done, the mantissas can be added:
.5372400 x 102
+ .0001580 x 102
.5373980 x 102

When two numbers are subtracted, the result may contain most significant zeros as shown in the following example:
.56780 x 105
- .56430 x 105
.00350 x 105

Register Configuration for Floating point operations

The register organization for floating-point operations is shown in Fig. 10-14. There are three registers, BR, AC, and QR. Each
register is subdivided into two parts. The mantissa part has the same uppercase letter symbols as in fixed-point representation. The
exponent part uses the corresponding lowercase letter symbol.
NOTE: It is assumed that each floating-point number has a mantissa in signed magnitude representation and a biased exponent
(i.e. exponent contain only positive numbers).

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Hardware nomenclature is as described below:

Register AC has the mantissa with its sign in AS and magnitude in A (showing most significant bit i.e. MSB as A1) along with
the corresponding exponent in a (represented by lowercase letter).
Similarly, register BR is subdivided into BS, B, and b, and QR into QS, Q, and q.

A parallel-adder adds the two mantissas and transfers the sum into A and the carry into E.
A separate parallel-adder is used for the exponents.

Floating-Point Arithmetic Operations

Addition and Subtraction
During addition or subtraction, the two floating-point operands are in AC and BR. The sum or difference is formed in the AC.
The algorithm can be divided into four consecutive parts:

1. Check for zeros- We check for zeros at the beginning and terminate the process if necessary.
2. Align the mantissas- The alignment of the mantissas must be carried out prior to their operation.
3. Add or subtract the mantissas- After the mantissas are added or subtracted, the result may be unnormalized.
4. Normalize the result- The normalization procedure ensures that the result is normalized prior to its transfer to memory.

The flowchart for adding or subtracting two floating-point binary numbers is shown in Fig. 10-15.

Add or Subtract

Figure 10-15: Flowchart for addition and subtraction of floating point numbers
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 PSIT, Kanpur
The algorithm is shown in the flowchart and steps are described below-

1. If BR = 0, the operation is terminated, with the value in the AC being the result.
If AC = 0, we transfer the content of BR into AC and also complement its sign if the numbers are to be subtracted.
If neither number is equal to zero, we proceed to align the mantissas.
2. The magnitude comparator attached to exponents a and b provides three outputs that indicate their relative magnitude.
If a = b, we go to perform the arithmetic operation.
If a ≠ b, the mantissa having the smaller exponent is shifted to the right and its exponent incremented.
This process is repeated until the two exponents are equal.
3. The addition and subtraction of the two mantissas is identical to the fixed-point addition and subtraction algorithm.
4. When A1 = 1, the mantissa is normalized and the operation is completed.

Multiplication

The multiplication of two floating-point numbers requires that we multiply the mantissas and add the exponents. No comparison
of exponents or alignment of mantissas is necessary.
The multiplication algorithm can also be subdivided into four parts:

1. Check for zeros

2. Add the exponents
3. Multiply the mantissas
4. Normalize the product

The flowchart for floating-point multiplication is shown in Fig. 10-16.

Multiply

Figure 10-16: Multiplication of floating-point numbers

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 PSIT, Kanpur
Division

Floating-point division requires that the exponents be subtracted and the mantissas divided. The mantissa division is done as in
fixed-point except that the dividend has a single-precision mantissa that is placed in the AC. Remember that the mantissa dividend
is a fraction and not an integer.
The division algorithm can be subdivided into five parts:

1. Check for zeros.

2. Initialize registers and evaluate the sign.

3. Align the dividend.

4. Subtract the exponents.

5. Divide the mantissas.

The flowchart for floating-point division is shown in Fig. 10-17.

Divide

Figure 10.17: Division of floating point numbers

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 PSIT, Kanpur
IEEE Standard 754 Floating Point Numbers
The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point computation which was
established in 1985 by the Institute of Electrical and Electronics Engineers (IEEE). The standard addressed many problems
found in the diverse floating point implementations that made them difficult to use reliably and reduced their portability.

IEEE 754 has 3 basic components:

1. The Sign of Mantissa –
This is as simple as the name. 0 represents a positive number while 1 represents a negative number.
2. The Biased exponent –
The exponent field needs to represent both positive and negative exponents. A bias is added to the actual exponent in
order to get the stored exponent. To calculate the bias for an arbitrarily sized floating-point number apply the formula
2k−1 − 1 where k is the number of bits in the exponent.
3. The Normalized Mantissa –
The mantissa is part of a number in scientific notation or a floating-point number, consisting of its significant digits. Here
we have only two digits, i.e. 0 and 1. So a normalized mantissa is one with only single 1 to the left of the binary point.

IEEE 754 numbers are represented into two standard formats i.e. single precision and double precision.

TYPE SIGN BIASED EXPONENT NORMALISED MANTISA BIAS

Single precision 1 (31st bit) 8 bits (30 - 23) 23 bits (22 - 0) 127

Double precision 1 (63rd bit) 11 bits (62 - 52) 52 bits (51 - 0) 1023

Floating Point (Single precision) Example

Q. Convert -14.625(10) to 32 bit single precision IEEE 754 binary floating point (1 bit for sign, 8 bits for exponent, 23 bits
for mantissa) = ?

Step 1
Start with the positive version of the number:
|-14.625| = 14.625

Step 2
Convert to the binary (base 2) the integer part: 14.
Divide the number repeatedly by 2.
Keep track of each remainder. We stop when we get a quotient that is equal to zero.
 division = quotient + remainder;
 14 ÷ 2 = 7 + 0;
 7 ÷ 2 = 3 + 1;
 3 ÷ 2 = 1 + 1;
 1 ÷ 2 = 0 + 1;

Now, take all the remainders starting from the bottom of the list constructed above.
14(10) = 1110(2)

Step 3
Convert to the binary (base 2) the fractional part: 0.625.
Multiply it repeatedly by 2.
Keep track of each integer part of the results. Stop when we get a fractional part that is equal to zero.

 multiplying = integer + fractional part;

 1) 0.625 × 2 = 1 + 0.25;
 2) 0.25 × 2 = 0 + 0.5;
 3) 0.5 × 2 = 1 + 0;

Now, take all the integer parts of the multiplying operations, starting from the top of the constructed list above:
0.625(10) = 0.101(2)
Hence, positive number before normalization: 14.625(10) = 1110.101(2)
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Step 4
Normalize the binary representation of the number i.e. Shift the decimal mark 3 positions to the left so that only one non-
zero digit remains to the left of it:
14.625(10) = 1110.101(2) = 1110.101(2) × 20 = 1.110101(2) × 23

Up to this moment, there are the following elements that would feed into the 32 bit single precision IEEE 754 binary
floating point representation:
Sign: 1 (a negative number)
Exponent (unadjusted): 3
Mantissa (not normalized): 1.110101

Step 5
Adjust the exponent. Use the 8 bit excess/bias notation:
Exponent (adjusted) = Exponent (unadjusted) + 2(8-1) - 1 = 3 + 2(8-1) - 1 = (3 + 127)(10) = 130(10)

Step 6
Convert the adjusted exponent from the decimal (base 10) to 8 bit binary.
Use the same technique of repeatedly dividing by 2:
 division = quotient + remainder;
 130 ÷ 2 = 65 + 0;
 65 ÷ 2 = 32 + 1;
 32 ÷ 2 = 16 + 0;
 16 ÷ 2 = 8 + 0;
 8 ÷ 2 = 4 + 0;
 4 ÷ 2 = 2 + 0;
 2 ÷ 2 = 1 + 0;
 1 ÷ 2 = 0 + 1;

Now, Construct the base 2 representation of the adjusted exponent i.e. Take all the remainders starting from the bottom of
the list constructed above:
Exponent (adjusted) = 130(10) = 1000 0010(2)

Step 7
Normalize the mantissa i.e.
a) Remove the leading (the leftmost) bit, since it is always 1, and the binary point, if the case.
b) Adjust its length to 23 bits, by adding the necessary number of zeros to the right.

Therefore,
Mantissa (normalized) = 1. 11 0101 0 0000 0000 0000 0000 = 110 1010 0000 0000 0000 0000

Step 8
The three elements that make up the number's 32 bit single precision IEEE 754 binary floating point representation:
Sign (1 bit) = 1 (a negative number)
Exponent (8 bits) = 1000 0010
Mantissa (23 bits) = 110 1010 0000 0000 0000 0000

Number -14.625 converted from decimal system (base 10) to 32 bit single precision IEEE 754 binary floating point:

1 1000 0010 110 1010 0000 0000 0000 0000 Final Answer.

More Examples –
Q. Convert 85.125 into 32 bit single precision and 64 bit double precision IEEE 754 binary
floating point.
Solution
85 = 1010101
0.125 = 001
85.125 = 1010101.001
=1.010101001 x 2^6
Sign bit = 0

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 PSIT, Kanpur
1. Single precision
biased exponent 127 + 6 = 133
133 = 10000101
Normalized mantissa = 010101001 (we will add least significant 0's to complete the 23 bits)

The IEEE 754 Single precision is:

= 0 10000101 01010100100000000000000
This can be written in hexadecimal form as 42AA4000 Answer

2. Double precision

biased exponent 1023 + 6 = 1029

1029 = 10000000101

Normalized mantissa = 010101001 (we will add least significant 0's to complete the 52 bits)

The IEEE 754 Double precision is:

= 0 10000000101 0101010010000000000000000000000000000000000000000000

This can be written in hexadecimal form as 4055480000000000 Answer

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Compiled by- Durgesh Pandey (CSED)