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Course Ourtline. Digital Logic Design

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Gemechis Gurmesa
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0% found this document useful (0 votes)
61 views

Course Ourtline. Digital Logic Design

Uploaded by

Gemechis Gurmesa
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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WOLAITA SODO UNIVERSITY

COLLEGE OF INFORMATICS
Computer Science Program
Course Title: Digital Logic Design: 3 Pre-requisites: None

Course Number: EENG-2041 Course status: Supportive


ECTS Credit: Semester: I
Module: Computer and Control Module Coordinator: TBA
Engineering
Contact Hours (per week):4 Lecturer:Wondemagegn Tilahun(MSc.)

Course Objectives & Competences to be acquired

This course provides an overview of the principles underlying Number systems, arithmetic
operations decimal codes, alphanumeric codes, Boolean algebra, Karnaugh maps, implementation
of digital logic gates using universal gates (NAND and NOR gates), exclusive- OR gates,
integrated circuits, combinational circuits, decoders, encoders, multiplexers, Demultiplexers
adders, subtractors, multipliers, sequential circuits, latches, flip-flops, sequential circuits analysis,
and counters. Finally, under this course, Analysis and design of combinational and sequential logic
systems will be done.

Course Description/Course Contents

Faults in Digital Circuits; Test Generation for and Testable Combinational Circuits; Test
Generation and Testable Sequential Circuits; Built-in Self-Test (BIST). Upon the completion of the
module, Students will be able to:

• Convert between decimal, binary, octal, and hexadecimal number systems.


• Differentiate different Codes in digital system.
• Perform two-level logic minimization using Boolean algebra and Karnaugh maps minimization
method.
• Analyze the properties and realization of the various logic gates.
• Perform binary addition and subtraction.
• Implement the Boolean Functions using NAND and NOR gates.
• Incorporate medium scale integrated circuits, like decoders, encoders, multiplexers, etc., into
circuit design.
• Differentiate and Design Combinational and Sequential circuits.
• Design and analyze clocked sequential circuits.
• Use various types of latches and flip-flops to build binary memory and counters.
• Perform asynchronous and synchronous sequential logic analysis

ECEG-3101 Course Outline 2015 Page 1


WOLAITA SODO UNIVERSITY
COLLEGE OF INFORMATICS
Computer Science Program

Course Outline
Time
Contents Chapter Objectives
Allotted
CHAPTER 1
1. Introduction to Digital Systems ✓ Create distinction between Analogue
1.1. Digital and analogue and Digital systems.
quantities 2 LHs
✓ To introduce basics of binary systems
1.2. Binary digit logic level and
digital waveform as in digital electronics.

CHAPTER 2
2. Number system, operations and
codes ✓ Create distinction between
2.1. Decimal number
2.2. Binary number Numbering system
2.3. Decimal to binary ✓ Apply basic techniques with base
Conversions 2 LHs
conversation
2.4. 1’s and 2’s compliment of ✓ Get introduced with different types of
binary number binary codes
2.5. Signed number
2.6. Hexadecimal number
2.7. Octal number and BCD

CHAPTER 3
3. Logic gates
3.1. The inverter
3.2. The AND gate ✓ Describe the Operations of AND, OR
3.3. The OR gate and The Inverter. 2 LHs
3.4. The NAND gate ✓ To Express the operations of
3.5. The NOR gate exclusive-OR and exclusive-NOR.
3.6. The Exclusive OR and
Exclusive NOR gates

CHAPTER 4 ✓ Apply basic laws and rules of


4. Boolean algebra and Logic Boolean algebra.
simplification ✓ Evaluate Boolean expressions.
4.1. Boolean operation and 4 LHs
✓ Convert any Boolean expression into
expression
sum-of-products (SOP).
4.2. Laws and rules of Boolean
algebra ✓ Convert any Boolean expression into
4.3. De Morgan Theorems Product-of-Sum (POS).

ECEG-3101 Course Outline 2015 Page 2


WOLAITA SODO UNIVERSITY
COLLEGE OF INFORMATICS
Computer Science Program
4.4. Boolean analysis of logic ✓ Use Karnaugh maps to simplify
circuit Boolean expression and truth table
4.5. The K-map Functions.

CHAPTER 5
5. Combinational logic ✓ Analyze combinational Logic
5.1. Functions of combinational Circuits.
logic
✓ Develop the truth table from the
5.2. Basic combinational logic
circuits output expression of CLC.
6 LHs
5.3. Implementing Combinational ✓ Design CLC for a given truth table.
logic ✓ Apply Multiplexers in Data selection.
5.4. Universal property of NAND ✓ Use decoders as De-multiplexers.
and NOR gates ✓ Analyze and Design Sequential Logic
5.5. Adders, decoders, encoders,
Circuits.
multiplexers and de
multiplexers
CHAPTER 6
6. Flip flops ✓ Use Logic Gates to construct basic
6.1. Latches Latches.
4 LHs
6.2. Edge triggered flip flops ✓ Recognize the d/c b/n Latches and
6.3. Master slave flip flops Flip-flops.
6.4. Applications

CHAPTER 7 ✓ Analyze Counter timing Diagrams.


7. Counters (4 lecture hour) ✓ Analyze Counter Circuits
7.1. Synchronous counters ✓ Determine and modify modulus of a 4 LHs
7.2. Asynchronous counters Counter.
7.3. Up/down counters
7.4. Design of synchronous ✓ Use up/down counters for generation
counters of binary sequences.

CHAPTER 8 ✓ Identify forms of data movement in


8. Shift registers shift registers.
8.1. Basic shift registers ✓ Explain how SISO, SIPO, PISO, and 4 LHs
8.2. Serial in serial out registers PIPO operate.
8.3. Serial in parallel out Registers ✓ Construct a ring counter from shift
registers.

ECEG-3101 Course Outline 2015 Page 3


WOLAITA SODO UNIVERSITY
COLLEGE OF INFORMATICS
Computer Science Program
CHAPTER 9
✓ Explain how CMOS and TTL
9. Memory and Storage
families Differ.
9.1. Basics of semiconductor
Memory ✓ Describe the operation of DAC and
9.2. Random access memory ADC circuits
4 LHs
(RAM’s) ✓ Define basic memory Characteristics.
9.3. Read only memory (ROM’s) ✓ Explain what RAM is and how it
9.4. Programmable ROMs works.
(PROM, EEPROM) ✓ Explain what ROM is and how it
9.5. Flash memories
works.
Lecture supported by tutorial, assignment (on
Teaching & Learning Methods
Karnaugh Maps), project and laboratory exercises.
Continuous Assessment with Assignment, Tests and
Assessment/Evaluation
Projects (50%), Final examination (50%)
Attendance Requirements 75% lecture attendance and 100% lab attendance
Textbook:
✓ Fundamentals of Digital Logic with Verilog
Design, Brown and Vranesic, McGrawi-Hill
Publ.

References:
✓ Floyd, Digital Electronics (Ch: 1,2,3,5,7,9)
Literatures ✓ Digital Principles and Logic Design (Ch.
2,3,6,8)
✓ Switching Theory and Automata, Kohavi
✓ M. Morris Mano, Digital Design
✓ Enoch O. Hwang, Digital Logic and
Microprocessor Design with VHDL

ECEG-3101 Course Outline 2015 Page 4

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