24-1-2023

Lectuie- 9
Syllabus content: Full wave controlled rectifer using SCR's(semi controlled, fully controlled) with
Rload only, Block diagram of closed loop speed control of DC motors, Basic principle of single phase
and three phase bridge inverters , block diagrams including rectifier and inverter for speed control of
AC motors (frequency control only).

Fully-controlled bridge-circuit with resistive-load:

KK L
a.c. supply
ww
Edc
A

T4

Supply voltage Load-voltage

Load
Current

Conducts Conducts

Fig. 6.20 Wauefoms for fully controlled bridge ueith resistive lood
 irst positive half-cycle, SCRs T, and T, are forward biased and if
Ee
they are triggered simultancously. then current flows throughthe path L
R-TN. Hence, in the positive half cvele. thyristors T, and T, are conducting
Durnng the negative half-cycle of the a.c. input, SCRs T, and T, are forward
biased and if they are triggered simultaneously, current flows through the path
N-I R-T,I. Thyristors T, T, and T, T, are triggered at the same firing
angle ain cach positive and negative half-cycles of thesupply voltage, respectively.
When the supply voltage falls to zero, the current also gocs to zero. Hence
thyristors 7, 7, in positive half-cycle andT, T, inncgative half-cycle tur-off
by natural commutation, The related voltage and current waveforms for this
circuit areshown in Fig. 6.20.
When the supply voltage falls to zero, the current als0 goes to zero. Hence
thyristors 7, 7,in positive half-cycle and T,, T, in negative half-cycle turn-off
When the supply voltage falls to zero, the current also goes to zero. Hence
thyristors T, T, in positive half-cycle and T,, T, in negative half-cycle turn-off
25-|- 2023
Half Controlled Bridge Rectifier with Resistive Load: Lectie.i

iT iT2

LI,
a.c. input Single-phase
a.c. supply
N
N

ip ip1
B B

(a) Symmetrical-configuration (b) Asymmetrical-configuration

 Supply voltage
Load-voltage
Ee

ot
21 3r

Firing
pulses

Load
curent

0t

Conducts
-Conducts
, D4
Fig. 6.25 Waveforms for syrn metrical configuration with resistive load
Now, consider the symmetricalconfiguration ofhal f-controlled bridge-circuit.
During the positive half-cycle of the a.c. supply, thyristor T, and diode D, are
forward-biased and are in the forward-blocking mode. When the SCR T, is
triggered, at a firing-angle a, the current flow through the path LT-R
D,-N. As shown in Fig. 6.25,the load-current will flow until it is commutated
by reversal of supply voltage at ot = 1.
During the negative half-cycle of the a.c. supply, thyristor T, and diode D, are
forward-biased. When SCR T, is triggered at an angle (7+ ), the current would
flow through the path N- T,A-RB-D,-L.This current is continuous
till angle 2r, when SCR T, is tumed-off.
The voltage and current-relations are derived as follows:
 27-23 -Leoture)
Block diagram of clo sed looP speed control
of DC MotoY
Power
Supply

Converter DC
Load
Motor

Speed
Controlle r

JFeedbock k
DC Motor are daives
e xtensively usedio many
where speed
Speed contsol is desied .
applca tions where Constant spe ed rs
Io m any
Yequir ed , open-oop Operation of do notoss may not
be satrs factoy.
open loop system , if load torque chang es Ahe
speed will chan9e to0.

Han addtional lo od torque is applie d the

motoY Speed momentavily decre ases and the speod
errorN jncreaseS, w hic rncr eaSeS the cootrol

signal Ve.
Cootrol VEtae Stgnal tnceases the
The
Converter out put voltage (the control signal
dec e ases the firing angle if the convertey
Contvol/ ed Yectfier) Ôs (ncre ases
phase
f he converter (s chopper.
the duly ratio
(orease 1he motor armatuye voltage
develop S or e to9ue to Yestóye he SPeed
of the motor. thus
-The systen
Passes though a Eraosieol
developed to
torgue matches
Perod uotil the
the applitd load torgue.
 other advantage of
Theye ase
Cuch as
closed
gieater accuracy,
loop operation
im prov ed
dynamic esponse and stability of
OPeratror
loop system the dyiNe
- In a closed
chorocteristrcs con also be made to opereie
constaot
ot Constant torque hose po wer
Over a certro Speed tange,
provided
- Cixcuit potectioni can olso be
feedb 0ck systms
closed -loop
 (i)Average d.c.
load-voltage:
Eue Esin or d(o1)

(ii) Average load-current:

-E[-cos orf, - |1+ cosa]
L,=1+
IR cos a
(iiü) RMS load-voltage: The RMS 1oad voltage for a given firing angle
given by S
2
cos 2ot
2

q/2
sin 2
= Em + (6.18)
2 47

SINGLE-PHASE HALE-BRIDGE VOLTAGE-SOURCE INVERTERS:

***(Reverse polarity of DC supply consider in symbol)
1-22023
Lecture g
Edc2 Si

HLoad A

Edc + Co
2

Fig.1 Half-bridge inverter

 Load
voltage +Ede2
o T2 27
E
Conducts Si
S2 Conducts Conduets
E2R Conducts
TI2 2T

Ej/2R

Load
current

o
Es1 +E4c
Voltage across
S

racross

Switch S, is closed for half-time period (T/2) of the desired ac output. It

connects point p of the dc source to point Aand the output voltage e, becomes
equal to +Es/2.
Atr= T2, gating signal is removed from S, and it turns-off. For the next half
time period (T72 <1<), the gating signal is given to S. It connects point Nof
the de source to point Aand the output voltage reverses. Thus, by closing S, and
S, alternately, for half-time periods, asquare-wave ac voltage is obtained at the
output. With resistive load, waveshape of load curent is identical to that of
output voltage. Simply by controlling the time periods of the gate-drive signals,
the frequency can be varied. Here diodes D, and D, do not play any role. The
voltage across the switch when it is OFF is Eg. Gating circuit should be designed
such that switches S, and S, should not turn-on at the same time.
SINGLE-PHAS FULLBRIDGE INVERTERS:
(Reverse polarity of DC supply consider in symbol)

S
D
Ede P
LOAD

S2
Da

Mode-I (0<t< TI2):

(i) Mode-I (0 <t< T/2): In this mode, switches S, and S, conducts
simultaneously. The load voltage is +EA, and load current flows from P to 0. The
equivalent circuit for mode-I is shown in Fig. 9.7(a). At t = T2, S, and S, are
turned-off and S and S, are turned-on.

E* Efe
P
HLOAD
S

(a) Mode-I
Mode-II (TI2 <t< T)
(i) Mode-II(T/2 <t<T): At t= TI2, switches S, and S, are turned-on and
S,and S, are tumed-of. The load voltage is -Ese and load current flows from o
to P. The equivalent circuit for mode-II is shown in Fig. 9.7 (b). Atr= T, S, and
S, are tumed-off and S, and S, are turned-on again.
As the load is resistive, it does not store any energy. Therefore, feedback
diodes are not effective here.
 Eg-Ee
-Ee LOAD

(b) Mode-II

Loud
voltage

o TT2
Load Ee
current EdR

-EdR
Supply
current

EJR
T/2

E/R

Mode-iMode-II +
S, S | Ss, S_ |
Fig. 9.6 Voltage and current waveforns
 |-2-23
Lectuse i
THREE-PHASE INVERTERS:

Ss.

Ea
H C

D.

Be
3-phasc
load
(a) Power-circuit

R-R R-R

Ww
Re=R Rç-R
Bo
(b) Star-connected losd (c) Delta-connected load

180° 180°

T1 T4
T6 T3
T5| T2 TS

120° 180°IV240°V 300°VI 360

Steps I II I I
s.6.1j6.12 12.3(2.3.4j34.s456|5.
 In this control scheme, cach switch conducts for a period of 180° or half-cycle
electrical. Switches are triggered in sequence of their numbers with an interval ol
60°. At a time, three switches (one from ecach leg) con duct. Thus, two switches
of the same leg are prevented from conducting simultaneously. One complele
cycle is divided into six modes, each of 60° intervals. Theoperation of the circut
can be understood from the waveforms shown in Fig 9.25 and the operaton
Table 9.1.
Switch pair in each leg, i.e. S,, S, S, SSç, and Ss, S, are turned-on with atime
interval of 180°. It means that switch S. conducts for 180° and switch S, for the
next 180° of a cycle. Switches, in the upper group, ie. S,,S, must
interval of 120°. It means that if S, is fired at 0° then
S, S,beconduct an
triggered at
120° and S_ at 240°. Same is true for lower group of switches. On the basis of
this gating scheme, Table 9.1 is prepared.

2r

EAN 2Edc_
Ede 3 47
3 2n
VI
Intervals
EBN
2Ede

- 2Ede
3
ECN 2Ede_
2Ede 3
3

-2Eds
3
EsB
Ede

-Ede
Epc
Ede

-Ede
EcA
 Block closed (oop
of Tnductro o motoY
Iodurtion
mudor
FIter
PwM

HH Joveter

Out put Tocho

Mod.
f tndex
m
Ifb
Cureot
|Controlla
speed
efereoce
Speed
Contol er |Contvo 1

slip spend
vegula tor
Stant Speed feed back
 Scos ed by a
The
ual speed tacho
Comp ared wvith the efereoce
9eneyator s
Signa/
7he ditleence
betweeo the speed
eror srgnal. 1s app lied ot h
Siyna/ input
his speed contvo ler
of t he speed processed by a speed
speed s
Whrch is abop ortio a plus iotegro/
controller
and then the sip speed Tegulator
(ptI) contro)ler, speed contvo lleraod slp Spepd
7he output of cuseot efesence
egu/alor output acts as a

the maXimom value of aYmature

th
Tt will ecide
CUYreot. adjustmeots , the maxmum asmatue
proper Kept under contro/.
So by
Curreot Can be vollage s decided
voltag
of the stator edregula tor t
The fregueny of slip spe
the output
addn9
by
actuo/ speed. s then p ossed
the eoiding SIgno/
frequeny Contro/ 6/ocK, t h e lransfet chaso
will eosure
through a flux such that
of whrch
sticsS
orY 9ap flux by Keepis
Constant
a Compoved wit6
constaobi
output is
conlvolley produted by
a
The flux
actual armature curent
the txansformer and the
CUrre9& Contvollet
opplied tothe c ureot