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Microchip based embedded system design for achievement of high power factor
in electrical power systems

Conference Paper · December 2013

DOI: 10.1109/APPEEC.2013.6837130

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 Microchip Based Embedded System Design for
Achievement of High Power Factor in Electrical
Power Systems

Ahsan Shahid Anwar Shabir

Al-Khawarizmi Institute of Computer Science Department of Electrical Engineering
University of Engineering and Technology University of Engineering and Technology
Lahore, Pakistan Lahore, Pakistan
[email protected] [email protected]

Abstract—Transmission efficiency and harmonic loss hence there will be annual saving over the maximum demand
reduction are among the main challenges of industrial power charges. However, when power factor is improved, it involves
systems. To cope with these challenges, many control methods for capital investment on the power factor correction equipment.
Power Factor Correction (PFC) have actively been proposed. The consumer will incur expenditure every year in the shape
This paper explains the design of a power factor improvement
of annual interest and depreciation on the investment made
circuit using PIC (Programmable Interface Controller) chip with
reduced parts count to achieve desired efficiency and low cost. over the power factor correction equipment. Therefore, the net
This involves measuring the power factor value from the load annual saving will be equal to the annual saving in maximum
and uses an algorithm to determine and trigger switching demand charges minus annual expenditure incurred on power
capacitors in order to compensate for excessive reactive factor correction equipment.
components to increase power factor value. MicroC compiler has
been used to build a C language code and the algorithm has been
implemented in Proteus ISIS simulator which gives the desired II. RELATED WORK
results of power factor improvement fairly close to unity to cut
Several power factor correction and improvement strategies
down excessive penalty imposed on customers with heavy
industrial loads having poor power factor.
have been developed so far. A conventional approach uses
capacitor banks or an induction motor with a capacitor in
Keywords—Power Factor Correction, Programmable Interface parallel. The disadvantage of using an induction motor is that
Controller, Reactive Components, Switching Capacitors, it may not be feasible and economical to use individual shunt
Transmission Efficiency capacitors with each induction motor.
Modern methods include the load modeling using a chopper
I. INTRODUCTION circuit for generating PWM signals to measure power factor
and then switched connection of capacitors to compensate for
Assuming KW to be the actual load power and KVA to be
reactive components elevating the power factor value [2],
the apparent power drawn by an electrical load, power factor
simulation of single phase bridgeless PFC boost rectifiers also
is defined as the ratio between these two quantities.
called dual boost PFC rectifiers to improve power factor [3]
Essentially, it measures how effectively the current is being
and digital improvement of power factor through embedded
converted into useful output and is an indicator of the effect of
devices. In modern power electronics, Cuk converter topology
load current on the efficiency of power generation and
is also used to shape input current meaning the input current is
transmission systems. When the apparent power delivered to
chopped at high frequency [3]. Employing high frequency
the load is greater than the real power, it means the load has a
switching enables the converter to chop the input current and
power factor lower than unity. This in reaction causes the
thereby shifting the lower order harmonic components far
losses in the system to rise up. A load with a power factor of
apart from the fundamental improving the power factor at the
unity or fairly close to it has the most efficient loading of the
input [4].
supply.
In the proposed design, shunt capacitors in the form of a
One of the prime causes of poor power factor is the result
bank are used but the difference from conventional approach
of a notable phase difference between voltage and current at
is that they are controlled in such a way as to vary the power
load terminals. This load current phase angle difference is
factor according to the need. Fig.1 shows the benefits of
typically the result of an inductive load such as an induction
controlling a capacitor bank. As far as modern methods are
motor, furnace or a power transformer which are being used in
concerned, they have been successfully implemented for a
an industrial complex [1]. If a consumer improves the power
wide range of applications yet they suffer from a little bit of
factor, there is reduction in his maximum kVA demand and

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complex design circuitry. The proposed design differs from or
them in certain ways. Firstly, the reliability becomes high as cos (θ) = P / √(P2+Q2) (6)
no switches or zero-crossing detectors are used. Secondly, as
the circuit is based on programming, component and device An inductive circuit has a lagging power factor and a
losses inside the circuit are much less as compared to the other capacitive circuit is said to have a leading power factor. The
designs thus increasing the efficiency. Lastly, it has a reduced terms lagging and leading power factor indicate, respectively,
parts count in terms of switches and other electronic whether the current is lagging or leading the applied voltage.
components which meet the low cost requirements rendering it
optimum for customers as well as industries on large scale.
IV. POWER FACTOR IMPROVEMENT
The impact of different types of electrical loads can be
studied by noting that a resistive load does not affect the phase
relationship between the electrical current and the voltage in
an AC power system because the current and voltage are in
phase. However, if a voltage is applied to a purely inductive
load such as an unloaded transformer, the output current
would be lagging or following the output voltage. Such type
of circuits would "consume" only reactive power (measured in
kilovolt ampere reactive; KVAR). As a result, power factor
would be turned to low. This can be witnessed from Fig.2.
Fig.1. P.F Correction by controlling capacitor bank

III. POWER EQUATIONS

When RMS values of voltage and current are taken into
account, the power equation is given as
P = |V| |I| cos (θ) (1)
The parameter P, commonly called the average power, is
also known as real or active power. Watt is the fundamental
unit of both instantaneous and average power but due to the
minuteness of watt in relation to power system quantities, P is
usually measured in kilowatts or megawatts. The cosine of the
phase angle θ between the voltage and the current is called the
power factor [4], [11].
The term similar to mentioned above but having sine,
alternates positive and negative and gives an average value of
zero. This component of the instantaneous power P is called Fig.2. Real and Reactive Power [11]
the instantaneous reactive power which expresses the flow of
energy towards the load and away from the load, alternately. So it can be concluded that low power factor is caused by
The maximum value of this pulsating power, designated Q, is inductive loads. Induction motors are a prime cause of low
called reactive power or reactive volt-amperes and is very power factor for many customers. This is a problem especially
useful in describing the operation of a power system [11]. for customers with large number of small fractional
Therefore reactive power is given by horsepower motors, those who purchase cheap or poorly made
Q = |V| |I| sin (θ) (2) motors and those having oversized, under-loaded motors [7].
In a simple series circuit where Z is equal to R+ j X we can Moreover, AC motors, transformers, fans, welding
substitute |I||Z| for |V| in equations (1) and (2) to obtain equipment, extruders and injection machines, presses and
P = |I|2|Z| cos (θ) (3) stamping equipment are among those appliances whose power
Q = |I|2|Z| sin (θ) (4) factor is usually low.
Keeping in view
R = |Z| cos θ 1) Need for Improvement: A consumer pays electricity bills
and for his maximum demand in KVA plus the units consumed. If
X = |Z| sin θ the consumer’s power factor is high, there happens to be a
Above equations offer another method of calculating power reduction in his maximum KVA demand and consequently
factor since we witness that Q/P = tan θ. The power factor is there are annual savings due to maximum demand charges.
therefore Although power factor improvement involves extra annual
cos (θ) = cos (tan-1 Q/P) (5) expenditure on account of power factor correction equipment,

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yet improved power factor to proper value results in the net C = VAR / (2*pi*f*VR2) (7)
annual saving for the consumer. where,
VAR = capacitor unit VAR rating
2) Procedure: Power factor can be improved by installing C = capacitance (farads)
especially designed PFC capacitors or reactive power f = frequency (cycles/second)
generators into the electrical distribution system. These VR = capacitor unit rated voltage
devices supplement the demand of reactive power for the Capacitors of standard ratings like 240uF, 300uF and so
operation of all inductive loads and reduce the amount of kVA are available that are sufficient to provide enough kVARs for
drawn from the main transformer, registered on the meter as the desired power factor improvement on the load side. They
"peak demand". The capacitor draws a leading current and are connected in parallel with the equipment in the form of a
partly or completely neutralizes the lagging reactive capacitor bank. Their demand is ensured by first determining
component of load current. This raises the power factor of the the value of power factor from the code.
load connected.
However, there are cost and efficiency issues while
designing such as equipment or devices. Below mentioned
design has reduced parts count keeping the cost low and
efficiency high.

A. Design:
A high power factor output is the main goal of this paper
which focuses on the design and implementation of power
factor correction using PIC microcontroller, measures the
power factor of loaded power system, performs proper action
to feed sufficient capacitance to recover appropriate power
loss using MikroC program and finally simulates the design
with PIC controller chip. Program code has been written in C
language. The process to debug the C code is cyclic and
involves four major steps as shown in Fig.3.

Fig.3. Steps involved in MicroC code debugging

Fig.4. Flow Chart of design scheme

B. Flow Chart:
V. SIMULATION AND EXPERIMENTAL RESULTS
Flow chart in fig.4 shows the complete design scheme.
Proteus ISIS Design Suite has been used for making the
C. Calculations: simulation. The schematic can be seen from Fig.5.
Capacitors are connected in parallel. The function of shunt Code helps to display various state vectors related to power.
power capacitor is to provide leading (capacitive) kVARs to Voltage and current of the system are processed in PIC
the electrical system. Lagging (inductive) kVARs appear when controller by a built-in 10 bit A/D converter which is provided
there are inductors (coils) within electrical (e.g. motor) or with 8 input channels. As with all microcontrollers, crystal
electronic equipment. As the amount grows, the increment of oscillator is required to provide operating frequency. Here
inductive kVARs will increase as well, consequently there is a 11.059 MHz crystal oscillator serves this purpose. A/D
need of capacitive kVARs to compensate it in order to reduce Converter is invoked by ADC_Read function. 10 bit A/D
unnecessary power loss [10]. The actual capacitor in farads of output is sent to LCD in a single bit fashion. Each bit is
the capacitor bank is calculated using

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supplied by dividing by 1000, 100, 10 and then modulating remainder operators we display this signal on LCD using one
with 10 afterwards. digit at a time. To get the value in ASCII format, 48 is added
to the obtained digit value. Then using comparison operator
the values of voltages and currents are compared with zero to
detect the zero crossing. The timer is programmed to start at
zero crossing of voltage signal and goes to OFF condition at
the zero crossing of current signal. Diodes rectify the signals
and facilitate the measurement of zero crossings.
The value of overall time delay is fetched from two
registers TMR1H and TMR1L. This value of time is displayed
using the same strategy as used to display the values of
currents and voltages using divider and remainder operators.
From this time delay the value of angle to determine the
power factor is measured. Then using sine and cosine
functions we determine values of sin (θ) and cos (θ). The peak
values of voltage and current waveforms are calculated to
determine values of active and reactive powers. A test linear
load was placed at input and its readings were taken. Results
show improvement of power factor close to 0.95. Fig.7 shows
rectified output voltage and currents waveforms.
Fig.5. PFI Schematic in Proteus

Voltages and currents of three phases are sensed using

transducers; potential transformer (PT) and current
transformer (CT) respectively. These signals are applied to
PIC 16F877 controller to measure the values of currents and
voltages, to measure the angle between voltage and current
and to measure the values of sine and cosine in order to
determine the active and reactive powers. Using these values
we calculate the ratings of capacitors. Magnetic relay is used
to couple 5V DC signal from microcontroller to 220V AC to
determine which particular capacitors are to be turned ON or
OFF for optimum power factor.
LCD commands Lcd_Chr_CP, Lcd_Chr, Lcd_Out serve
the purpose of displaying results on LCD. Potential
Transformer turns ratio is selected to be 230:5 to make voltage
at secondary side compatible with analog input of
microcontroller. Similarly current transformer rating is such
that we get 5V on the secondary. Zero crossing detection is an
Fig.7. Yellow curve show output of PT, Blue curve shows voltage waveform
important thing to achieve without using a separate module of after rectification, Red curve shows current waveform after rectification
a typical zero crossing detector as shown in the fig.6.

VI. HARDWARE DESIGN

A typical 60Hz, 240V/10A RMS AC power system is
taken into account for mounting the hardware setup which can
manage 2.4 KVA power and test linear load like a motor.
Programmable Interface Circuit chip (PIC) is used which is
the Microchip Technologies’ series of microcontrollers. PIC is
an inexpensive type of single-chip computer that confines
integrated circuit within it. Basically, it looks like a standard
Fig.6. Module of a zero crossing detector [5] personal computer, which contains a CPU (central processing
unit), RAM (Random-access memory), ROM (Read-only
PIC itself can be programmed for zero crossing detection memory), I/O (input/output) lines, serial and parallel ports,
of voltage and current signals. The analog inputs sensed by PT timer, internal oscillator, and even built-in peripherals such as
and CT are converted to digital values using built in A/D A/D (analogue-to digital), D/A (Digital-to-analogue) and
converter. As the output of ADC_READ is 10 bit so they are sample/holder (S/H) converters [13].
divided by 1023 instead of 1024 to get discretized values as Apart from PIC, further circuitry includes transducers CTs
these numbers are fairly close. Then using divider and and PTs for sensing voltage and current signals of the input.

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These signals are fed to the controller for measurement. After loads. Our future work includes the fabrication of the same
making a measurement, controller sends appropriate signals to device which is equally good for non-linear loads.
the capacitors through magnetic relays. No other electronic or
electrical device has been used like zero crossing detectors or ACKNOWLEDGMENT
manual capacitor switches. Code performs all the tasks. The authors would like to acknowledge the support
Sensing of voltage and current signals having RMS values from Al-Khawarizmi Institute of Computer Science (KICS)
before and after the improvement is displayed on LCD. and Department of Electrical Engineering at University of
Snapshot of hardware design can be seen from fig.8. Engineering and Technology Lahore, Pakistan.

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