dl06 2
dl06 2
Volume 2 of 2
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VOLUME ONE:
TABLE OF CONTENTS
VOLUME TWO:
TABLE OF CONTENTS
Chapter 6: Drum Instruction Programming
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–2
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–2
Drum Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–2
Drum Chart Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–3
Output Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–3
Step Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–4
Drum Instruction Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–4
Timer-Only Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–4
Timer and Event Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–5
Event-Only Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–6
Counter Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–6
Last Step Completion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–7
Overview of Drum Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–8
Drum Instruction Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–8
Powerup State of Drum Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–9
Drum Control Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–10
Drum Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–10
Self-Resetting Drum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–11
Initializing Drum Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–11
Using Complex Event Step Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–11
Drum Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–12
Timed Drum with Discrete Outputs (DRUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–12
Event Drum (EDRUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–14
Handheld Programmer Drum Mnemonics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6–16
Index
1 Introduction
Purpose
2 The Event Drum (EDRUM) instruction in the DL06 CPU electronically simulates an
electro-mechanical drum sequencer. The instruction offers enhancements to the basic
3 principle, which we describe first.
Drum Terminology
4 Drum instructions are best suited for repetitive processes that consist of a finite number of
steps. They can do the work of many rungs of ladder logic with elegant simplicity. Therefore,
5 drums can save a lot of programming and debugging time.
We introduce some terminology associated with the drum instruction by describing the
6 original mechanical drum shown below. The mechanical drum generally has pegs on its
curved surface. The pegs are populated in a particular pattern, representing a set of desired
actions for machine control. A motor or solenoid rotates the drum a precise amount at
7 specific times. During rotation, stationary wipers sense the presence of pegs (present = on,
absent = off ). This interaction makes or breaks electrical contact with the wipers, creating
8 electrical outputs from the drum. The outputs are wired to devices on a machine for On/Off
control.
9 Drums usually have a finite number of positions within one rotation, called steps. Each step
represents some process step. At powerup, the drum resets to a particular step. The drum
rotates from one step to the next based on a timer, or on some external event. During special
10 conditions, a machine operator can manually increment the drum step using a jog control on
the drum’s drive mechanism. The contact closure of each wiper generates a unique on/off
11 pattern called a sequence, designed for controlling a specific machine. Because the drum is
circular, it automatically repeats the sequence once per rotation. Applications vary greatly, and
a particular drum may rotate once per second, or as slowly as once per week.
12 Pegs
13
14
A Wipers
Drum
B
C Outputs
D Electronic drums provide the benefits of mechanical drums and more. For example, they have
a preset feature that is impossible for mechanical drums: The preset function lets you move
from the present step directly to any other step on command!
1
2
1
0
1
0
13
1
3
4
0
1
0
14
1
5
6
0
1
0
1
A
7 0
8
9
1
0
1
B
0
1
10
11
0
1
0
C
1
12
13
0
1
0
1
D
14 0
1
15 0
1 Step Transitions
Drum Instruction Types
2 There are two types of Drum instructions in the DL06 CPU:
• Timed Drum with Discrete Outputs (DRUM)
3 • Time and Event Drum with Discrete Outputs (EDRUM)
The two drum instructions include time-based step transitions, and the EDRUM includes
4 event-based transitions as well. Each drum has 16 steps, and each step has 16 outputs. Refer
to the figure below. Each output can be either a Y or C coil, offering programming flexibility.
5 We assign Step 1 an arbitrary unique output pattern.
Timer-Only Transitions
6 Drums move from one step to another based on time and/or an external event (input). Each
step has its own transition condition which you assign during the drum instruction entry. The
7 figure below shows how timer-only transitions work.
Step 1 Outputs : F f f f F f F f f f f F F f f f
8
9 Increment
count timer
10
11 No Ha s counts per
step expired?
12 Yes
13 Step 2 Outputs : f f f F f f f f F F f F f f F F
14
U s e next transition criteria
A The drum stays in Step 1 for a specific duration (user-programmable). The timebase of the
timer is programmable, from 0.01 seconds to 99.99 seconds. This establishes the resolution,
B or the duration of each “tick of the clock”. Each step uses the same timebase, but has its own
unique counts per step, which you program. When the counts for Step 1 have expired, then
the drum moves to Step 2. The outputs change immediately to match the new pattern for
C Step 2.
The drum spends a specific amount of time in each step, given by the formula:
D Time in step = 0.01 seconds X Timebase x Counts per step
For example, if you program a 5 second time base and 12 counts for Step 1, then the drum
will spend 60 seconds in Step 1. The maximum time for any step is given by the formula: 1
Max Time per step = 0.01 seconds X 9999 X 9999
= 999,800 seconds = 277.7 hours = 11.6 days
2
NOTE: When first choosing the timebase resolution, a good rule of thumb is to make it about 1/10 the
duration of the shortest step in your drum. Then you will be able to optimize the duration of that step in
10% increments. Other steps with longer durations allow optimizing by even smaller increments (percentage-
3
wise). Also, note that the drum instruction executes once per CPU scan. Therefore, it is pointless to specify a
drum timebase that is much faster than the CPU scan time. 4
Timer and Event Transitions
Step transitions may also occur based on time and/or external events. The figure below shows
5
how step transitions work in these cases.
6
Step 1 Outputs : F f f f F f F f f f f F F f f f
7
No
8
Is Step event
true?
9
Yes
10
Increment
count timer
11
Has step
12
No
counts expired?
13
Yes
14
Step 2 Outputs : f f f F f f f f F F f F f f F F
A
U s e next tra ns ition criteria
B
When the drum enters Step 1, it sets the output pattern as shown. Then it begins polling the
external input programmed for that step. You can define event inputs as X, Y, or C discrete
point types. Suppose we select X0 for the Step 1 event input. If X0 is off, then the drum
C
remains in Step 1. When X0 is On, the event criteria is met and the timer increments. The
timer increments as long as the event (X0) remains true. When the counts for Step 1 have D
expired, then the drum moves to Step 2.The outputs change immediately to match the new
pattern for Step 2.
Event-Only Transitions
1 Step transitions do not require both the event and the timer criteria programmed for each
step. You have the option of programming just one of the two, and even mixing transition
2 types among all the steps of the drum. For example, you might want Step 1 to transition on
an event, Step 2 to transition on time only, and Step 3 to transition on both time and an
event. Furthermore, you may elect to use only part of the 16 steps, and only part of the 16
3 outputs.
4
Step 1 Outputs:
5
No Is Step event
6 true?
Yes
7 Step 2 Outputs:
Counter Assignments
9 Each drum instruction uses the resources of four counters in the CPU. When programming
the drum instruction, you select the first counter number. The drum also uses the next three
10 counters automatically. The counter bit associated with the first counter turns on when the
drum has completed its cycle, going off when the drum is reset. These counter values and the
counter bit precisely indicate the progress of the drum instruction, and can be monitored by
11 your ladder program.
Counter Assignments
Suppose we program a timer drum to have 8
12 steps, and we select CT10 for the counter number
CT10
CT11
Counts in step V1010
Timer Value V1011
1528
0200
(remember, counter numbering is in octal).
CT12
13 Counter usage is shown to the right. The right
column holds typical values, interpreted below. CT13
Preset Step
Current Step
V1012
V1013
0001
0004
14 CT10 shows that we are at the 1528th count in the current step, which is step 4 (shown in
CT13). If we have programmed step 4 to have 3000 counts, then the step is just over half
completed. CT11 is the count timer, shown in units of 0.01 seconds. So, each least-
A significant-digit change represents 0.01 seconds. The value of 200 means that we have been in
the current count (1528) for 2 seconds (0.01 x 200). Finally, CT12 holds the preset step value
B which was programmed into the drum instruction. When the drum’s Reset input is active, it
presets to step 1 in this case. The value of CT12 changes only if the ladder program writes to
it, or the drum instruction is edited and the program is restarted. Counter bit CT10 turns on
C when the drum cycle is complete, and turns off when the drum is reset.
7 Timebase
f
f
f
F
F
F
F
F
f
f
f
f
F
F
F
f
F
F
Programming f F F f f F
8 Selections Events
Counter #
9 Pattern
10
Counter Assignments
11 CTA10
Counts in step V1010 xxxx
CTA11
Timer Value V1011 xxxx
12 Preset Step
CTA12 V1012 xxxx
Current Step
CTA13 V1013 xxxx
13 The drum instruction accepts several inputs for step control, the main control of the
drum.The inputs and their functions are:
14 • Start – The Start input is effective only when Reset is off. When Start is on, the drum timer runs if
it is in a timed transition, and the drum looks for the input event during event transitions. When
A Start is off, the drum freezes in its current state (Reset must remain off ), and the drum outputs
maintain their current on/off pattern.
B • Jog – The jog input is only effective when Reset is off (Start may be either on or off ). The jog input
increments the drum to the next step on each off-to-on transition (only EDRUM supports the jog
input).
C • Reset – The Reset input has priority over the Start input. When Reset is on, the drum moves to its
preset step. When Reset is off, then the Start input operates normally.
D • Preset Step – A step number from 1 to 16 that you define (typically is step 1). The drum moves to
this step whenever Reset is on, and whenever the CPU first enters run mode.
• Counts/Step – The number of timer counts the drum spends in each step. Each step has its own
counts parameter. However, programming the counts/step is optional. 1
• Timer Value – the current value of the counts/step timer.
• Counter # – The counter number specifies the first of four consecutive counters which the drum
uses for step control. You can monitor these to determine the drum’s progress through its control
2
cycle. The DL06 has 128 counters (CT0 – CT177 in octal).
• Events – Either an X, Y, C, S, T, or CT type discrete point serves as step transition inputs. Each step
3
has its own event. However, programming the event is optional.
WARNING: The outputs of a drum are enabled any time the CPU is in Run Mode. The Start 4
Input does not have to be on, and the Reset input does not disable the outputs. Upon entering Run
Mode, drum outputs automatically turn on or off according to the pattern of the current step of the
drum. This initial step number depends on the counter memory configuration: non-retentive versus
5
retentive.
6
Powerup State of Drum Registers
The choice of the starting step on powerup and program-to-run mode transitions are 7
important to consider for your application. Please refer to the following chart. If the counter
memory is configured as non-retentive, the drum is initialized the same way on every
powerup or program-to-run mode transition. However, if the counter memory is configured
8
to be retentive, the drum will stay in its previous state.
Initialization on Powerup
9
Counter Number Function
Non-Retentive Case Retentive Case
CTA(n) Current Step Count Initialize = 0 Use Previous (no change)
10
CTA(n + 1) Counter Timer Value Initialize = 0 Use Previous (no change)
CTA(n + 2) Preset Step Initialize = Preset Step # Use Previous (no change) 11
CTA(n + 3) Current Step # Initialize = Preset Step # Use Previous (no change)
Applications with relatively fast drum cycle times typically will need to be reset on powerup, 12
using the non-retentive option. Applications with relatively long drum cycle times may need
to resume at the previous point where operations stopped, using the retentive case. The
default option is the retentive case. This means that if you initialize scratchpad V-memory, the
13
memory will be retentive.
14
A
B
C
D
Setup
Drum Control Inputs Jog X1
Outputs
2 Now we are ready to put together the concepts
Info
12 Inputs
S tart
1
0
13 J og
1
0
1
Reset 0
14
Drum S tatus
A S tep #
1
1 1 2 1 1 2 3 3 4 ... 15 16 16 16 1 1
Drum
Complete (CT10) 0
B Outputs (x 16)
1
0
C When the drum completes the last step (Step 16 in this example), the Drum Complete bit
(CT10) turns on, and the step number remains at 16. When the Reset input turns on, it
D turns off the Drum Complete bit (CT10), and forces the drum to enter the preset step.
NOTE: The timing diagram shows all steps using equal time durations. Step times can vary greatly,
depending on the counts/step programmed.
In the figure below, we focus on how the Jog input works on event drums. To the left of the
diagram, note that the off-to-on transitions of the Jog input increments the step. Start may be 1
either on or off (however, Reset must be off ). Two jogs takes the drum to step three. Next, the
Start input turns on, and the drum begins running normally. During step 6 another Jog input
signal occurs. This increments the drum to step 7, setting the timer to 0. The drum begins
2
running immediately in step 7, because Start is already on. The drum advances to step 8
normally. 3
As the drum enters step 14, the Start input turns off. Two more Jog signals moves the drum
to step 16. However, note that a third Jog signal is required to move the drum through step 4
16 to “drum complete”. Finally, a Reset input signal arrives which forces the drum into the
preset step and turns off the drum complete bit.
Drum
5
Completed
Jog
drum
Jog
drum
Jog
drum
R es et
drum 6
Inputs
S tart
1
0 7
1
Jog 0
R es et
1
0
8
Drum S tatus
S tep #
1
1 2 3 3 3 4 5 6,7 8 ... 14 15 16 16 16 1 9
Drum
Complete (CT0)
Outputs (x 16)
0
1
0
10
Self-Resetting Drum
Applications often require drums that automatically start
X0
Start
Setup
11
Outputs
over once they complete a cycle. This is easily X1
Start Info.
accomplished, using the drum complete bit. In the figure X2
R es et
Steps f
f
f
f
F
f
f
f
f
f
f
f
12
to the right, the drum instruction setup is for CT10, so f f f f F f
we logically OR the drum complete bit (CT10) with the
Reset input. When the last step is done, the drum turns
CT10 F
f
f
F
F
F
f
F
F
F
f
f
F
F
F
f
f
F
13
f F f f F F
on CT10 which resets itself to the preset step, also
resetting CT10. Contact X2 still works as a manual reset.
f F F f f F
14
Initializing Drum Outputs
The outputs of a drum are enabled any time the CPU is in run mode. On program-to-run A
mode transitions, the drum goes to the preset step, and the outputs energize according to the
pattern of that step. If your application requires all outputs to be off at powerup, make the B
preset step in the drum a “reset step”, with all outputs off.
Using Complex Event Step Transitions C
Each event-based transition accepts only one contact reference for the event. However, this
does not limit events to just one contact. Just use a control relay contact such as C0 for the
step transition event. Elsewhere in ladder logic, you may use C0 as an output coil, making it
D
dependent on many other “events” (contacts).
1 Drum Instruction
The DL06 drum instructions may be programmed using DirectSOFT 5 or for the EDRUM
2 instruction only you can use a handheld programmer (firmware version v2.21 or later). This
section covers entry using DirectSOFT 5 for all instructions plus the handheld mnemonics
for the EDRUM instruction.
3 Timed Drum with Discrete Outputs (DRUM)
The Timed Drum with Discrete Outputs is the most basic of the DL06’s drum instructions.
4 It operates according to the principles covered on the previous pages. Below is the instruction
in chart form as displayed by DirectSOFT 5.
5 Direct SOFT 5 Display
Step Preset
Start
7
8
Control
Inputs { Reset
9 Step Number
12
13 The Timed Drum features 16 steps and 16 outputs. Step transitions occur only on a timed
basis, specified in counts per step. Unused steps must be programmed with “counts per step”
= 0 (this is the default entry). The discrete output points may be individually assigned as X, Y,
14 or C types, or may be left unused. The output pattern may be edited graphically with
DirectSOFT 5.
A Whenever the Start input is energized, the drum’s timer is enabled. It stops when the last step
is complete, or when the Reset input is energized. The drum enters the preset step chosen
upon a CPU program-to-run mode transition, and whenever the Reset input is energized.
B
Drum Parameters Field Data Types Ranges
C Counter Number
Preset Step
aaa --
bb
0 --174
K 1 -- 16
Timer base cccc K 0 -- 99.99 seconds
D Counts per step dddd K 0 -- 9999
Discrete Outputs Fffff X, Y, C see memory map
Drum instructions use four counters in the CPU. The ladder program can read the counter
values for the drum’s status. The ladder program may write a new preset step number to 1
CTA(n+2) at any time. However, the other counters are for monitoring purposes only.
Counter Number Ranges of (n) Function Counter Bit Function 2
CTA(n) 0 -- 174 Counts in step CT(n) = Drum Complete
CTA( n+1)
CTA( n+2)
1 -- 175
2 -- 176
Timer value
Preset Step
CT(n+1) = (not used)
CT(n+2) = (not used)
3
CTA( n+3) 3 -- 177 Current Step CT(n+3) = (not used)
4
The following ladder program shows the DRUM instruction in a typical ladder program, as
shown by DirectSOFT 5. Steps 1 through 10 are used, and twelve of the sixteen output
points are used. The preset step is step 1. The timebase runs at (K10 x 0.01) = 0.1 second per
5
count. Therefore, the duration of step 1 is (25 x 0.1) = 2.5 seconds. In the last rung, the
Drum Complete bit (CT10) turns on output Y0 upon completion of the last step (step 10). 6
A drum reset also resets CT10.
7
Start
8
Reset
9
10
11
12
13
Drum Complete
14
Direct SOFT 5 Display A
B
C
D
5
6
Control
Inputs { Jog
Reset
Step Number
7 Counts per Step
Output Pattern
9 쏔= Off, 쐽= On
10
The Event Drum features 16 steps and 16 discrete outputs. Step transitions occur on timed
11 and/or event basis. The jog input also advances the step on each off-to-on transition. Time is
specified in counts per step, and events are specified as discrete contacts. Unused steps and
12 events must be left blank. The discrete output points may be individually assigned.
Drum Parameters Field Data Types Ranges
13 Counter Number aa -- 0 -- 174
Preset Step bb K 1 -- 16
14 Timer base
Counts per step
cccc
dddd
K
K
0 -- 99.99 seconds
0 -- 9999
Event Eeeee X, Y, C, S, T, CT, SP see memory map
A Discrete Outputs ffff X, Y, C see memory map
Whenever the Start input is energized, the drum’s timer is enabled. As long as the event is true
B for the current step, the timer runs during that step. When the step count equals the counts
per step, the drum transitions to the next step. This process stops when the last step is
C complete, or when the Reset input is energized. The drum enters the preset step chosen upon
a CPU program-to-run mode transition, and whenever the Reset input is energized.
D
Drum instructions use four counters in the CPU. The ladder program can read the counter
values for the drum’s status. The ladder program may write a new preset step number to 1
CTA(n+2) at any time. However, the other counters are for monitoring purposes only.
$ A
Store X0 STR 0
E NT
9 After the Store instructions, enter the EDRUM (using Counter CT0) as shown:
After entering the EDRUM mnemonic as above, the handheld programmer creates an input
10 form for all the drum parameters. The input form consists of approximately fifty or more
default mnemonic entries containing DEF (define) statements. The default mnemonics are
already “input” for you, so they appear automatically. Use the NXT and PREV keys to move
11 forward and backward through the form. Only the editing of default values is required, thus
eliminating many keystrokes. The entries required for the basic timer drum are in the chart
12 below.
NOTE: Default entries for output points and events are “DEF 0000”, which means they are unassigned. If
13 you need to go back and change an assigned output as unused again, enter “K0000”. The entry will again
show as “DEF 0000”.
Using the DRUM entry chart (two pages before), we show the method of entry for the basic
time/event drum instruction. First, we convert the output pattern for each step to the 1
equivalent hex number, as shown in the following example.
Step 1 Outputs : f f f f F f f F f f f F F f F f 2
- converts to: 15 0
0 9 1 A
3
The following diagram shows the method for entering the previous EDRUM example on the
HHP. The default entries of the form are in parenthesis. After the drum instruction entry (on 4
the fourth row), the remaining keystrokes over-write the numeric portion of each default
DEF statement. NOTE: Drum editing requires Handheld Programmer firmware version 2.21
or later.
5
NOTE: You may use the NXT and PREV keys to skip past entries for unused outputs or steps. 6
Handheld Programmer Keystrokes
Start $
STR
A
0
ENT Note: You may use the NXT and PREV keys
7
to skip past entries for unused outputs or steps.
Jog $ B ENT
Reset $
STR
STR
C
1
2
ENT
8
E D R U M E
Drum Inst.
Preset Step
SHFT
4
( DEF K0001)
3
NEXT
ORN ISG ORST 4 ENT
9
Handheld Programmer Keystrokes cont’d
Time Base
1
( DEF K0000 )
( DEF 0000 )
G
SHFT
6
E
C
4
NEXT
Y
2
B
B
1
A
0
NEXT ( DEF K0000 )
C
B
2
A
F
0
NEXT
A
11
( DEF 0000 ) SHFT NEXT ( DEF K0000 ) NEXT
MLS 1 1 5 0
2
C
4
2
NEXT
Counts/ ( DEF K0000 )
I
1
8
G
2
6
E
0
4
NEXT
14
Outputs Step
( DEF 0000 ) Y A B C A A
( DEF 0000 )
SHFT
SHFT Y
MLS
MLS
C
0
2
NEXT
NEXT
( DEF K0000 )
( DEF K0000 ) E
1
4
A
2
0
A
0
0
NEXT
0
NEXT
A
( DEF 0000 )
( DEF 0000 )
SHFT
SHFT
C
C
2
B
D
1
E
A
4
NEXT
NEXT
( DEF K0000 )
( DEF K0000 )
NEXT
NEXT
B
2 3 0
Y
MLS
G
H
6
NEXT ( DEF K0000 ) NEXT
skip over
unused steps
C
( DEF 0000 ) SHFT NEXT ( DEF K0000 ) NEXT
MLS 7
1
2 Handheld Programmer Keystrokes cont’d Handheld Programmer Keystrokes cont’d
( DEF 0000 )
NEXT
Y E
1
( DEF K0000 ) NEXT step 1 pattern = 0000
SHFT NEXT J I B C
MLS 4 ( DEF K0000 ) NEXT
9 8 1 2
2
A
2
0
NEXT
( DEF K0000 )
( DEF K0000 ) F
4
B
4
G
7
J
6
NEXT
NEXT
5 1 6 9
X
2
B
A
1
NEXT
( DEF K0000 ) J
9
D
3
E
4
D
3
NEXT
X D
Pattern
( DEF 0000 ) SHFT NEXT D I A
8 ( DEF 0000 ) SHFT Y
SET
MLS
H
3
7
NEXT
( DEF K0000 )
F
3
I
8
SHFT
G E
0
NEXT
NEXT
( DEF K0000 ) 5 8 6 4
NEXT
( DEF K0000 )
$ GY E
4 NEXT
STR CNT
13 Last rung
SHFT Y
MLS
A
0
NEXT
14 NOTE: you may use the NXT and PREV keys to skip past entries for unused outputs or steps.
A NOTE: For ease of operation when using the EDRUM instruction, we recommend using DirectSOFT 5
over the handheld programmer.
B
C
D
Reset
6
Step Number
7
Counts per Step
Drum instructions use four counters in the CPU. The ladder program can read the counter
1 values for the drum’s status. The ladder program may write a new preset step number to
CTA(n+2) at any time. However, the other counters are for monitoring purposes only.
2 Counter Number Ranges of (n) Function Counter Bit Function
CTA(n) 0 – 174 Counts in step CT(n) = Drum Complete
3 CTA( n+1)
CTA( n+2)
1 – 175
2 –176
Timer value
Preset Step
CT(n+1) = (not used)
CT(n+2) = (not used)
CTA( n+3) 3 –177 Current Step CT(n+1) = (not used)
4 The following ladder program shows the MDRMD instruction in a typical ladder program,
as shown by DirectSOFT 5. Steps 1 through 11 are used, and all 16 output points are used.
5 The output mask word is at V2000. The final drum outputs are shown above the mask word
as individual bits. The data bits in V2000 are logically ANDed with the output pattern of the
6 current step in the drum. If you want all drum outputs to be off after powerup, write zeros to
V2000 on the first scan. Ladder logic may update the output mask at any time to enable or
disable the drum outputs The preset step is step 1. The timebase runs at (K10 x 0.01)=0.1
7 second per count. Therefore, the duration of step 1 is (5 x 0.1) = 0.5 seconds. Note that step
1 is time-based only (event is left blank). In the last rung, the Drum Complete bit (CT10)
8 turns on output Y0 upon completion of the last step (step 10). A drum reset also resets CT10.
9 Start
10 Jog
Reset
11
12
13
14 Drum Complete
B
C Direct SOFT 5 Display
D NOTE: The ladder program must load constants in V2000 through V2012 to cover all mask registers for the
eleven steps used in this drum
Reset
6
Step Number
Drum instructions use four counters in the CPU. The ladder program can read the counter
1 values for the drum’s status. The ladder program may write a new preset step number to
CTA(n+2) at any time. However, the other counters are for monitoring purposes only.
2 Counter Number Ranges of (n) Function Counter Bit Function
CTA(n) 0 – 174 Counts in step CT(n) = Drum Complete
3 CTA( n+1)
CTA( n+2)
1 – 175
2 –176
Timer value
Preset Step
CT(n+1) = (not used)
CT(n+2) = (not used)
CTA( n+3) 3 –177 Current Step CT(n+1) = (not used)
4
The following ladder program shows the MDRMD instruction in a typical ladder program,
5 as shown by DirectSOFT 5. Steps 1 through 11 are used, and all sixteen output points are
used. The output mask word is at V2000. The final drum outputs are shown above the mask
word as a word at V2001. The data bits in V2000 are logically ANDed with the output
6 pattern of the current step in the drum, generating the contents of V2001. If you want all
drum outputs to be off after powerup, write zeros to V2000 on the first scan. Ladder logic
7 may update the output mask at any time to enable or disable the drum outputs. The preset
step is step 1. The timebase runs at (K50 x 0.01)=0.5 seconds per count. Therefore, the
duration of step 1 is (5 x 0.5) = 2.5 seconds. Note that step 1 is time-based only (event is left
8 blank). In the last rung, the Drum Complete bit (CT14) turns on output Y0 upon
completion of the last step (step 10). A drum reset also resets CT14.
9
10 Start
Jog
11
Reset
12
13
14
A Drum Complete
C
Direct SOFT 5 Display
D NOTE: The ladder program must load constants in V2000 through V2012 to cover all mask registers for the
eleven steps used in this drum
Let’s Compare
Right now, you may be thinking “I don’t see the big advantage to Stage Programming... in 1
fact, the stage program is longer than the plain RLL program”. Well, now is the time to
exercise a bit of faith. As control problems grow in complexity, stage programming quickly
out-performs RLL in simplicity, program size, etc.
2
For example, consider the diagram below. Notice how easy
it is to correlate the OFF and ON states of the state SG
3
S0 OFF State
transition diagram below to the stage program at the right.
Now, we challenge anyone to
X0 S1
JMP
4
easily identify the same states
in the RLL program on the
previous page!
SG
S1 ON State 5
SP1 Y0
Initial Stages X0
OUT 6
X1 S0
At powerup and Program-to- OFF ON
Run Mode transitions, the
PLC always begins with all
X1
JMP
7
normal stages (SG) off. So, the stage programs shown so far
have actually had no way to get started (because rungs are ISG
Powerup in OFF State
8
S0 Initial Stage
not scanned unless their stage is active).
Assume that we want to always begin in the Off state X0 S1
JMP
9
(motor off ), which is how the RLL program works. The
Initial Stage (ISG) is defined to be active at powerup. In
the modified program to the right, we have changed stage
SG
S1
10
S0 to the ISG type. This ensures the PLC will scan
contact X0 after powerup, because Stage S0 is active.
SP1 Y0
OUT 11
After powerup, an Initial Stage (ISG) works just like any X1 S0
X0 S1 14
JMP
Powerup in ON State
X0 X1 Y0 ISG
S1
Initial Stage A
OUT
SP1
Y0
First Scan
Y0
OUT B
X1 S0
SP0
JMP C
NOTE: If the ISG is within the retentive range for stages, the ISG will remain in the state it was in before
D
power down and will NOT turn itself on during the first scan.
9 SG
S0
S0
10
(includes all rungs in stage)
11
Stage Instruction Characteristics SG
12 The inline stage boxes on the left power rail divide the ladder
S0
SG Executes on same SG
B
S1 scan as Jmp S0
S1 Y0
X0 S1 C
JMP
OUT
D
NOTE: Assume we start with Stage 0 active and Stage 1 inactive for both examples.
(like the example shown to the right). However, this is incorrect (please keep reading).
7 Note that this example differs from the motor example, because now we have just one
pushbutton. When we press the pushbutton, both transition conditions are met. We would
just transition around the state diagram at top speed. If implemented in Stage, this solution
8 would flash the light on or off each scan (obviously undesirable)!
The solution is to make the push and the release of the pushbutton separate events. Refer to
9 the new state transition diagram below. At powerup we enter the OFF state. When switch X0
is pressed, we enter the Press-ON state. When it is released, we enter the ON state. Note that
10 X0 with the bar above it denotes X0 NOT.
11 Powerup X0 Push–ON X0
ISG
S0 OFF State
X0 S1
12 OFF ON JMP
13 X0
Push–OFF
X0
SG
S1 Push–On State
X0 S2
14 When in the ON state, another push and release cycle
JMP
The controller has two outputs to drive the motor. Down limit
X2 Y2
D Y1 is the up (raise the door) command, and Y2 is the
down (lower the door) command.
Lower
DOWN UP X0 S1 7
JMP
X2 LOWER Push–DOWN X0
SG
S1 Push–UP State 8
X0 X0 S2
X0
B
DOWN LIGHT T0 UP
C
D X0
X2 LOWER Push–DOWN X0
X0
Lower
Ladder
we then jump to the Push-UP State. We do this instead of Program
6 jumping directly to the RAISE state, to give the Lower
Down limit
X2 Y3 Light
output Y2 one scan to turn off, before the Raise output Y1 Obstruction
X3
7 energizes.
X0
8 X0 Push–UP
X0
RAISE X1
9
DOWN X3 LIGHT T0 UP
10
X0
11 X2 X3
LOWER Push–DOWN X0
X0
12 Exclusive Transitions
It is theoretically possible that the down limit (X2) and the obstruction input (X3) could
13 energize at the same moment. In that case, we would “jump” to the Push-UP and DOWN
states simultaneously, which does not make sense.
14 Instead, we give priority to the obstruction by
changing the transition condition to the DOWN SG
LOWER State
A state to [X2 AND NOT X3]. This ensures the
obstruction event has the priority. The
S5
SP1 Y2
modifications we must make to the LOWER Stage
B (S5) logic are shown to the right. The first rung
OUT
X2 X3 to DOWN S0
remains unchanged. The second and third rungs
C implement the transitions we need. Note the JMP
opposite relay contact usage for X3, which ensures X3 to Push-UP S2
D the stage will execute only one of the JMP
instructions.
JMP
4
Stage 2
5
6 Most all instructions work just like they do in standard RLL. You can think of a stage just like
a miniature RLL program which is either active or inactive.
7 Output Coils – As expected, output coils in active stages will turn on or off outputs
according to power flow into the coil. However, note the following:
8 • Outputs work as usual, provided each output reference (such as “Y3”) is used in only one stage.
• An output can be referenced from more than one stage, as long as only one of the stages is active at
9 a time.
• If an output coil is controlled by more than one stage simultaneously, the active stage nearest the
bottom of the program determines the final output status during each scan. Therefore, use the
10 OROUT instruction instead when you want multiple stages to have a logical OR control of an
output.
11 One-Shot or PD coils – Use care if you must use a Positive Differential coil in a stage.
Remember that the input to the coil must make a 0–1 transition. If the coil is already
12 energized on the first scan when the stage becomes active, the PD coil will not work. This is
because the 0–1 transition did not occur.
13 PD coil alternative: If there is a task which you want to do only once (on 1 scan), it can be
placed in a stage which transitions to the next stage on the same scan.
Counter – In using a counter inside a stage, the stage must be active for one scan before the
14 input to the counter makes a 0–1 transition. Otherwise, there is no real transition and the
counter will not count.
A The ordinary Counter instruction does have a restriction inside stages: it may not be reset
from other stages using the RST instruction for the counter bit. However, the special Stage
B counter provides a solution (see next paragraph).
Stage Counter – The Stage Counter has the benefit that its count may be globally reset from
C other stages by using the RST instruction. It has a count input, but no reset input. This is the
only difference from a standard counter.
D Drum – Realize that the drum sequencer is its own process, and is a different programming
method than stage programming. If you need to use a drum with stages, be sure to place the
drum instruction in an ISG stage that is always active.
5 SG
S0
SG
S0
S1
Equivalent
X0
6 JMP
All other rungs in stage...
X0
SG
7 S1 Power flow
transition
8 SG
S1
9 Recall that the Stage JMP instruction may occur anywhere in the current stage, and the result
is the same. However, power flow transitions (shown above) must occur as the last rung in a
10 stage. All other rungs in the stage will precede it. The power flow transition method is also
achievable on the handheld programmer, by simply following the transition condition with
the Stage instruction for the next stage.
11 The power flow transition method does eliminate one Stage JMP instruction, its only
advantage. However, it is not as easy to make program changes as using the Stage JMP.
12 Therefore, we advise using Stage JMP transitions for most programmers.
Stage View in DirectSOFT 5
13 The Stage View option in DirectSOFT 5 will let you view the ladder program as a flow chart.
The figure below shows the symbol convention used in the diagrams. You may find the stage
14 view useful as a tool to verify that your stage program has faithfully reproduced the logic of
the state transition diagram you intend to realize.
A SG
Stage Reference to Transition
J Jump S Set Stage
a Stage Logic
B R Reset Stage
The following diagram is a typical stage view of a ladder program containing stages. Note the
C left-to-right direction of the flow chart.
D ISG
SO
J
SG
S1
J
SG
S2 S
SG
S4
SG SG
J J S5
S3
S2
5
S0 S1 X0
S4 S5
JMP
S4
6
Process B JMP
Note that if we want Stages S2 and S4 to energize exactly on the same scan, both stages must
7
be located below or above Stage S1 in the ladder program (see the explanation at the bottom
of page 7–7). Overall, parallel branching is easy! 8
Converging Processes
Now we consider the opposite case of parallel branching, which is converging processes. This 9
simply means we stop doing multiple things and continue doing one thing at a time. In the
figure below, processes A and B converge when stages S2 and S4 transition to S5 at some
point in time. So, S2 and S4 are Convergence Stages.
10
Process A S1 S2 11
= Convergence Stage S5 S6
Process B S3 S4
12
Convergence Stages (CV) 13
While the converging principle is simple enough, it brings a new complication. As parallel
processing completes, the multiple processes almost never finish at the same time. In other
words, how can we know whether Stage S2 or S4 will finish last? This is an important point,
14
because we have to decide how to transition to Stage S5.
The solution is to coordinate the transition condition out of CV Convergence
A
S2
Stages
convergence stages. We accomplish this with a stage type designed
for this purpose: the Convergence Stage (type CV). In the example CV B
to the right, convergence stages S2 and S4 are required to be S4
CV
shown to the right will transition to Stage S5 when
3 X3 is active (as one might expect), but it also
S4
X3 S5
automatically resets all convergence stages in the group.
4 This makes the CVJMP jump a very powerful
CVJMP
10 • Within a convergence group, the stages may occur in any order, top to bottom. It does not matter
which stage is last in the group, because all convergence stages have to be active before the last stage
has power flow.
11 • The last convergence stage of a group may have ladder logic within the stage. However, this logic
will not execute until all convergence stages of the group are active.
12 • The convergence jump (CVJMP) is the intended method to be used to transition from the
convergence group of stages to the next stage. The CVJMP resets all convergence stages of the
group, and energizes the stage named in the jump.
13 • The CVJMP instruction must only be used in a convergence stage, as it is invalid in regular or
initial stages.
14 • Convergence Stages or CVJMP instructions may not be used in subroutines or interrupt routines.
A
B
C
D
ISG S0
Handheld Programmer Keystrokes
U A ENT
8
ISG 0
$
GX
STR
A
A
0
ENT
9
X0 Y0 ENT
OUT 0
OUT $
STR
B
1
ENT 10
X1 S2 X S C
SHFT ENT
SET
$
SET
F
RST
ENT
2
11
STR 5
X5 S1
JMP
K
2
JMP
B
B
1
ENT
12
ENT
SG 1
SG S1 $
STR
C
2
ENT 13
GX B ENT
X2 Y1 2
OUT
C
1
ENT
14
SG 2
OUT
$
GX
STR
G
C
6
ENT
A
ENT
SG S2 OUT 2
$
STR
H
7
ENT B
V SHFT S B ENT
X6 Y2
OUT K
AND
A
RST
ENT
1
C
JMP 0
X7 S1 S0
JMP
D
Jump (JMP)
7 The Jump instruction allows the program to transition from
an active stage containing the jump instruction to another
8 stage (specified in the instruction). The jump occurs when S aaa
the input logic is true. The active stage containing the Jump JMP
9 will deactivate 1 scan later.
DirectSOFT
Direct SOFT32 Handheld Programmer Keystrokes
1
ISG S0 U A
$
ISG
B
0
ENT
2
ENT
S1 STR 1
X1
JMP K
JMP
B
1
ENT
3
SG S1
2
SG
B
1
ENT
4
$ C ENT
STR 2
X2
Y5
OUT
GX
OUT
F
5
ENT
5
X7
S2
JMP
$
STR
H
7
ENT
6
K C ENT
JMP 2
X7
S3
NJMP
SHFT N
TMR
SHFT K
JMP
D
3
ENT
7
8
Converge Stage (CV) and Converge Jump (CVJMP)
The Converge Stage instruction is used to group certain stages together by defining them as 9
Converge Stages.
When all of the Converge Stages within a group become active,
the CVJMP instruction (and any additional logic in the final CV
CV 10
S aaa
stage) will be executed. All preceding CV stages must be active
before the final CV stage logic can be executed. All Converge 11
Stages are deactivated one scan after the CVJMP instruction is executed.
Additional logic instructions are only allowed following the 12
last Converge Stage instruction and before the CVJMP
instruction. Multiple CVJMP instructions are allowed.
S aaa
13
Converge Stages must be programmed in the main body of
CVJMP
the application program. This means they cannot be
programmed in Subroutines or Interrupt Routines.
14
A
Operand Data Type DL06 Range B
aaa
Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S 0–1777 C
D
In the following example, when Converge Stages S10 and S11 are both active the CVJMP
1 instruction will be executed when X4 is on. The CVJMP will deactivate S10 and S11, and
activate S20. Then, if X5 is on, the program execution will jump back to the initial stage, S0.
2 DirectSOFT
Direct SOFT32 Handheld Programmer Keystrokes
U A ENT
3 $
ISG
STR
A
0
0
ENT
ISG S0
4 GX
$
OUT
A
B
0
ENT
ENT
X0 Y0 STR 1
5 OUT K
JMP
B
1
ENT
K B A ENT
6 X1 S1
JMP 2
JMP
B
1
ENT
0
SG 1
7 S10
JMP
$
STR
C
2
ENT
K B B ENT
JMP 1 1
8 SG S1 SHFT C
2
V
AND
B
1
A
0
ENT
C V B B
9 X2 S11
$
SHFT
2
D
AND 1 1
ENT
JMP STR 3
ENT
10 GX
OUT
D
3
ENT
$ E
CV S10 ENT
11 STR
SHFT C
2
V
AND
4
SHFT K
JMP
C
2
A
0
ENT
CV S11
12 2
$
SG
C
F
2
A
0
ENT
ENT
X3 Y3 STR 5
13 OUT K
JMP
A
0
ENT
14 X4 S20
CVJMP
A SG S20
B X5 S0
JMP
C
D
9 SG S(SG) 1 0 ENT
SHFT B E N D ENT
11 SG S(SG) 1 5 ENT
The following diagram is a typical stage view of a ladder program containing stages. Note the
C left-to-right direction of the flow chart.
ISG SG SG SG
D S0 J S1 J S2 S S4
SG SG
J J S5
S3
Q. Isn’t a Stage JMP just like a regular GOTO instruction used in software?
1 A. No, it is very different. A GOTO instruction sends the program execution immediately to
the code location named by the GOTO. A Stage JMP simply resets the Stage Bit of the
2 current stage, while setting the Stage Bit of the stage named in the JMP instruction. Stage
bits are 0 or 1, determining the inactive/active status of the corresponding stages. A stage
JMP has the following results:
3 • When the JMP is executed, the remainder of the current stage’s rungs are executed, even if they
reside past(under) the JMP instruction. On the following scan, that stage is not executed, because it
4 is inactive.
• The Stage named in the Stage JMP instruction will be executed upon its next occurrence. If located
5 past (under) the current stage, it will be executed on the same scan. If located before (above) the
current stage, it will be executed on the following scan.
6 Q. How can I know when to use stage JMP, versus a Set Stage Bit or Reset Stage
Bit?
7 A. These instructions are used according to the state diagram topology you have derived:
• Use a Stage JMP instruction for a state transition... moving from one state to another.
8 • Use a Set Stage Bit instruction when the current state is spawning a new parallel state or stage
sequence, or when a supervisory state is starting a state sequence under its command.
• Use a Reset Bit instruction when the current state is the last state in a sequence and its task is
9 complete, or when a supervisory state is ending a state sequence under its command.
Q. What is an initial stage, and when do I use it?
10 A. An initial stage (ISG) is automatically active at powerup. Afterwards, it works just like any
other stage. You can have multiple initial stages, if required. Use an initial stage for ladder
11 that must always be active, or as a starting point.
Q. Can I place program ladder rungs outside of the stages, so they are always on?
12 A. It is possible, but it’s not good software design practice. Place ladder that must always be
active in an initial stage, and do not reset that stage or use a Stage JMP instruction inside
13 it. It can start other stage sequences at the proper time by setting the appropriate Stage
Bit(s).
14 Q. Can I have more than one active stage at a time?
A. Yes, and this is a normal occurrence for many programs. However, it is important to
A organize your application into separate processes, each made up of stages. And a good
process design will be mostly sequential, with only one stage on at a time. However, all the
processes in the program may be active simultaneously.
B
C
D
11 DL06
PID Loop Calculations
12
13
14
Manufacturing Process
A
B Analog Output
14 69° SETPOINT
A 67°
ON ON ON
B TIME
The ON-OFF controller is used in some industrial control applications, but is not practical
C in the majority of industrial control processes.
The most common process controller that is used in industry is the PID controller.
D
The PID controller controls a continuous feedback loop that keeps the process output
(control variable) flowing normally by taking corrective action whenever there is a deviation
from the desired value (setpoint) of the process variable (PV) such as, rate of flow,
1
temperature, voltage, etc. An “error” occurs when an operator manually changes the setpoint
or when an event (valve opened, closed, etc.) or a disturbance (cold water, wind, etc.) changes 2
the load, thus causing a change in the process variable.
The PID controller receives signals from sensors and computes corrective action to the 3
actuator from a computation based on the error (Proportional), the sum of all previous errors
(Integral) and the rate of change of the error (Derivative). 4
We can look at the PID controller in more simple terms. Take the cruise control on an
automobile as an example. Let’s say that we are cruising on an interstate highway in a car
equipped with cruise control. The driver decides to engage the cruise control by turning it
5
ON, then he manually brings the car to the desired cruising speed, say 70 miles per hour.
Once the cruise speed is reached, the SET button is pushed fixing the speed at 70 mph, the 6
setpoint. Now, the car is cruising at a steady 70 mph until it comes to a hill to go up. As the
car goes up the hill, it tends to slow down. The speed sensor senses this and causes the throttle
to increase the fuel to the engine. The vehicle speeds up to maintain 70 mph without jerking
7
the car and it reaches the top at the set speed. When the car levels out after reaching the top
of the hill it will speed up. The speed sensor senses this and signals the throttle to provide less 8
fuel to the engine, thus, the engine slows down allowing the car to maintain the 70 mph
speed. How does this application apply to PID control? Lets look at the function of P, I and
D terms:
9
• Proportional - is commonly referred to as Proportional Gain. The proportional term is
the corrective action which is proportional to the error, that is, the change of the 10
manipulated variable is equal to the proportional gain multiplied by the error (the
activating signal). In mathematical terms: 11
Proportional action = proportional gain X error
Error = Setpoint (SP) - Process Variable (PV)
Applying this to the cruise control, the speed was set at 70 mph which is the Setpoint.
12
The speed sensor senses the actual speed of the car and sends this signal to the cruise
controller as the Process Variable (PV). When the car is on a level highway, the speed is 13
maintained at 70 mph, thus, no error since the error would be SP - PV = 0. When the car
goes up the hill, the speed sensor detected a slow down of the car, SP-PV = error. The
proportional gain would cause the output of the speed controller to bring the car back to 14
the setpoint of 70 mph. This would be the Controlled Output.
• Integral - this term is often referred to as Reset action. It provides additional
compensation to the control output, which causes a change in proportion to the value of
A
the error over a period of time. In other words, the reset term is the integral sum of the
error values over a period of time. B
• Derivative - this term is referred to as rate. The Rate action adds compensation to the
control output, which causes a change in proportion to the rate of change of error. Its job
is to anticipate the probable growth of the error and generate a contribution to the output
C
in advance.
D
The analog input module receives the process variable in analog form along with an operator
A entered setpoint; the CPU computes the error. The error is used in the algorithm
computation to provide corrective action at the control output. The function of the control
B action is based on an output control, which is proportional to the instantaneous error value.
The integral control action (reset action) provides additional compensation to the control
C output, which causes a change in proportion to the value of the change of error over a period
of time. The derivative control action (rate change) adds compensation to the control output,
which causes a change in proportion to the rate of change of error. These three modes are
D used to provide the desired control action in Proportional (P), Proportional-Integral (PI), or
Proportional-Integral-Derivative (PID) control fashion.
Standard DL05/06 analog input modules are used to interface to field transmitters to obtain
the PV. These transmitters normally provide a 4-20mA current or an analog voltage of various
ranges for the control loop.
1
For temperature control, thermocouple or RTD can be connected directly to the appropriate
module. The PID control algorithm, residing in the CPU memory, receives information from 2
the user program, primarily control parameters and setpoints. Once the CPU makes the PID
calculation, the result may be used to directly control an actuator connected to a 4-20mA 3
current output module to control a valve.
With DirectSOFT 5, additional ladder logic programming, both time proportioning (eg.
heaters for temperature control) and position actuator (eg. reversible motor on a valve) type of
4
control schemes can be easily implemented. This chapter will explain how to set up the PID
control loop, how to implement the software and how to tune the loop. 5
The following block diagram shows the key parts of a PID control loop. The path from the
PLC to the manufacturing process and back to the PLC is the closed loop control. 6
7
Loop Configuring External
8
and Monitoring Disturbances
PLC System
This form of the PID equation is referred to as the position form since the actual actuator
14
position is computed. The velocity form of the PID equation computes the change in
actuator position. The CPU modifies the standard equation slightly to use the derivative of A
the process variable instead of the error as follows:
n
B
Mn = Kc * en + Ki 兺 ei + Kr (PVn - PVn-1) + Mo
i=1
C
These two forms are equivalent unless the setpoint is changed. In the original equation, a
large step change in the setpoint will cause a correspondingly large change in the error D
resulting in a bump to the process due to derivative action. This bump is not present in the
second form of the equation.
The DL06 also combines the integral sum and the initial output into a single term called the
1 bias (Mx). This results in the following set of equations:
Mxo = Mo
2 Mx = Ki * en + Mxn-1
Mn = Kc * en - Kr(PVn-PVn-1) + Mxn
3 The DL06 by default will keep the normalized output M in the range of 0.0 to 1.0. This is
done by clamping M to the nearer of 0.0 or 1.0 whenever the calculated output falls outside
this range. The DL06 also allows you to specify the minimum and maximum output limit
4 values (within the range 0 to 4095 in BCD if using 12 bit unipolar).
5 NOTE: The equations and algorithms , or parts of, in this chapter are only for references. Analysis of these
equations can be found in most good text books about process control.
14
A
B
C
D
Freeze Bias
If the “Freeze Bias” option is selected when setting up the PID loop (discussed later) then the 1
CPU simply stops changing the bias (Mx) whenever the computed normalized output (M)
goes outside the interval 0.0 to 1.0.
Mx = Ki * en + Mxn-1
2
M = Kc * en - Kr(PVn - PVn-1) + Mx
3
Mn = 0 if M < 0
4
Mn = M if 0 ⭐ M ⭐ 1
Mn = 1 if M > 1 5
Mxn = Mx if 0 ⭐ M ⭐ 1 6
Mxn = Mxn-1 otherwise
Thus in this example, the bias will probably not go all the way to zero so that, when the PV
does begin to come down, the loop will begin to open the valve sooner than it would have if
7
the bias had been allowed to go all the way to zero. This action has the effect of reducing the
amount of overshoot. 8
Adjusting the Bias 9
The normal action of the CPU is to adjust the bias term when the output goes out of range as
shown below.
Mx = Ki * en + Mxn-1 10
M = Kc * en - Kr(PVn - PVn-1) + Mx
11
Mn = 0 if M < 0
Mn = M if 0 ⭐ M ⭐ 1 12
Mn = 1 if M > 1
13
Mxn = Mx if 0 ⭐ M ⭐ 1
Mxn = Mn - Kc * en - Kr(PVn - PVn-1) otherwise
By adjusting the bias, the valve will begin to open as soon as the PV begins to come down. If
14
the loop is properly tuned, overshoot can be eliminated entirely. If the output went out of
range due to a setpoint change, then the loop probably will oscillate because we must wait for A
the bias term to stabilize again.
The choice of whether to use the default loop action or to freeze the bias is dependent on the B
application. If large, step changes to the setpoint are anticipated, then it is probably better
to select the freeze bias option (see page 8-34). C
D
Bumpless Transfer
The DL06 loop controller provides for bumpless mode changes. A bumpless transfer from 1
manual mode to automatic mode is achieved by preventing the control output from changing
immediately after the mode change.
When a loop is switched from Manual mode to Automatic mode, the setpoint and Bias are
2
initialized as follows:
Position PID Algorithm Velocity PID Algorithm
3
SP = PV SP = PV
Mx = M
4
The bumpless transfer feature of the DL06 is available in two types: Bumpless I and Bumpless
II (see page 8-26). The transfer type is selected when the loop is set up.
5
Loop Alarms 6
The DL06 allows the user to specify alarm conditions that are to be monitored for each loop.
Alarm conditions are reported to the CPU by setting up the alarms in DirectSOFT 5 using
the PID setup alarm dialog when the loop is setup. The alarm features for each loop are: 7
• PV Limit – Specify up to four PV alarm points.
High-High PV rises above the programmed High-High Alarm Limit. 8
High PV rises above the programmed High Alarm Limit.
Low
Low-Low
PV fails below the Low Alarm Limit.
PV fails below the Low-Low Limit.
9
• PV Deviation Alarm – Specify an alarm for High and Low PV deviation from the
setpoint (Yellow Deviation). An alarm for High High and Low Low PV deviation 10
from the setpoint (Orange Deviation) may also be specified. When the PV is further
from the setpoint than the programmed Yellow or Orange Deviation Limit the
corresponding alarm bit is activated.
11
• Rate of Change – This alarm is set when the PV changes faster than a specified rate-of-
change limit. 12
• PV Alarm Hysteresis – The PV Limit Alarms and PV Deviation Alarms are programmed
using threshold values. When the absolute value or deviation exceeds the threshold,
the alarm status becomes true. Real-world PV signals have some noise on them, which
13
can cause some fluctuation in the PV value in the CPU. As the PV value crosses an
alarm threshold, its fluctuations will cause the alarm to be intermittent and annoy 14
process operators. The solution is to use the PV Alarm Hysteresis feature.
A
B
C
D
B
C
D
Y n = Yn-1 +
Ts 7
* (PV n - Y n-1 )
Ts + ( Td )
Kd 8
Position Algorithm 9
Mx = Ki * en + Mxn-1
M = Kc * en - Kr * (Yn-Yn-1) + Mx 10
Velocity Algorithm
⌬M = Kc * (en - en-1) + Ki * en - Kr * (Yn - 2 * Yn-1 + Yn-2) 11
12
13
14
A
B
C
D
DL06 CPU
Input V-memory Digital
Module Output
Channel 1 PV
Loop 1 Data
SP
Loop 2 Data
OUT Channel 1 Process 1 1
Channel 2 PV SP OUT Channel 2 Process 2
Channel 3
2
Channel 4
3
Step 5: Wiring and Installation
After selection and procurement of all loop components and I/O module(s), you can
4
perform the wiring and installation. Refer to the wiring guidelines in Chapter 2 of this
manual, and to the D0–OPTIONS–M manual. The most common wiring errors when
installing PID loop controls are:
5
• Reversing the polarity of sensor or actuator wiring connections.
• Incorrect signal ground connections between loop components.
6
Step 6: Loop Parameters 7
After wiring and installation, choose the loop setup parameters. The easiest method for
programming the loop tables is using DirectSOFT 5 (5.0 or later). This software provides
PID Setup using dialog boxes to simplify the task. Note: It is important to understand the
8
meaning of all loop parameters mentioned in this chapter before choosing values to enter.
Step 7: Check Open Loop Performance
9
With the sensor and actuator wiring done, and loop parameters entered, we must manually
and carefully check out the new control system using the Manual mode). 10
• Verify that the PV value from the sensor is correct.
• If it is safe to do so, gradually increase the control output up above 0%, and see if the PV 11
responds (and moves in the correct direction!).
Step 8: Loop Tuning 12
If the Open Loop Test (page 8–40) shows the PV reading is correct and the control output
has the proper effect on the process; you can follow the closed loop tuning procedure (see 13
page 8–45). In this step, the loop is tuned so the PV automatically follows the SP.
Step 9: Run Process Cycle 14
If the closed loop test shows the PV will follow small changes in the SP, consider running an
actual process cycle. You will need to have completed the programming which will generate
the desired SP in real time. In this step, you may want to run a small test batch of product
A
through the machine, watching the SP change according to the recipe.
WARNING: Be sure the Emergency Stop and power-down provision is readily accessible, in case the
B
process goes out of control. Damage to equipment and/or serious injury to personnel can result from
loss of control of some processes. C
Step 10: Save Parameters D
When the loop tests and tuning sessions are complete, be sure to save all loop setup
parameters to disk.
transitions.
9 If you use the DirectSOFT 5 loop setup dialog box, its automatic range checking prohibits
possible setup errors. However, the setup parameters may be written using other methods
10 such as RLL, so the error flag register may be helpful in those cases. The following table lists
the errors reported in V7642.
11 Bit Error Description (0 = no error, 1 = error)
0 The starting address (in V7640) is out of the lower V-memory range.
12 1
2
The starting address (in V7640) is out of the upper V-memory range.
The number of loops selected (in V7641) is greater than 8.
3 The loop table extends past (straddles) the boundary at V7377. Use an address closer to V1200.
13 As a quick check, if the CPU is in Run mode and V7642=0000, there are no programming
errors.
14 Establishing the Loop Table Size and Location
A On a PROGRAM-to-RUN mode transition, the CPU reads the loop setup parameters as
pictured below. At that moment, the CPU learns the location of the loop table and the
number of loops it configures. Then during the ladder program scan, the PID Loop task uses
B the loop data to perform calculations, generate alarms, and so on. There are some loop table
parameters the CPU will read or write on every loop calculation.
C CPU Tasks
READ/
V–Memory Space
User Data
D Program
PID Loop
Task
DATA
CONFIGURE/
MONITOR
Setup Parameters
READ V7640, V7641
(at powerup)
DirectSOFT32 Programming Software
DirectSOFT 5
NOTE: The DL06 CPU’s PID algorithm requires DirectSOFT 5 Version 5.0 (or later) and firmware
version 2.1 (or later). See our website for more information: www.automationdirect.com. 1
The Loop Table contains data for only the number of loops
that are selected. The address for the table is stored in V7641.
V–Memory User Data
2
Each loop configuration occupies 32 words (0 to 37 octal) in
V2000
the loop table.
V2037
LOOP #1
32 words
3
For example, consider an application with 4 loops, and V2000 V2040 LOOP #2
has been chosen as the starting location. The Loop Parameter
will occupy V2000 – V2037 for loop 1, V2040 – V2077 for
V2077 32 words
LOOP #3
4
32 words
loop 2 and so on. Loop 4 occupies V2140 - V2177.
Determine the block of V-memory to be used for each PID
LOOP #4
32 words
5
loop. Besides being the beginning of the PID parameter memory block, the first address will
be the start of loop 1 parameters. Remember, there are 32 words (0 to 37 octal) needed for 6
each loop. Once you have determined the beginning V-memory address to be used, you can
setup and store the PID parameters either directly in your RLL program or by the using PID
Setup in DirectSOFT 5.
7
NOTE: Whether one or more loops are being setup, this block of V-memory will only be used for the PID
loop parameters, do not use this block of memory for anything else in your program.
8
Using DirectSOFT 5 is the simplest way to setup the parameters. To setup the PID 9
parameters, the DL06 must be powered up and connected to the programming computer.
The parameters can only be entered in PID setup when the PLC is in the Program mode.
Once the parameters have been entered and saved for each loop, changes made through the
10
PID setup can be made, but only in Program Mode. You can type the beginning address in
the PID Table Address dialog found when the PID Setup is opened in DirectSOFT 5. This 11
can be seen in the diagram below. After the address has been entered, the memory range will
appear. Also, entering the number of PID loops (1 to 8) will set the total V-memory range for
the number of loops entered. After the V-memory address has been entered, the necessary
12
PID parameters for a basic loop operation for each loop can be setup with the dialogs made
available. 13
14
A
B
C
D
NOTE: Have an edited program open, then click on PLC > Setup > PID to access the Setup PID dialog.
6 5
6
Addr + 4
Addr + 5
Bias (Integrator) Value
Control Output Value
word/binary
word/binary
Yes
Yes
7 Addr + 6 Loop Mode and Alarm Status bits –
7 8
9
Addr + 7
Addr + 10
Sample Rate Setting
Gain (Proportional) Setting
word/BCD
word/BCD
Yes
Yes
8 10
11
Addr + 11
Addr + 12
Reset (Integral) Time Setting
Rate (Derivative) Time Setting
word/BCD
word/BCD
Yes
Yes
12 Addr + 13 PV Value, Low-low Alarm word/binary No2
9 13
14
Addr + 14
Addr + 15
PV Value, Low Alarm
PV Value, High Alarm
word/binary
word/binary
No2
No2
10 15
16
Addr + 16
Addr + 17
PV Value, High-high Alarm
PV Value, deviation alarm (YELLOW)
word/binary
word/binary
No2
No2
17 Addr + 20 PV Value, deviation alarm (RED) word/binary No2
11 18
19
Addr + 21
Addr + 22
PV Value, rate-of-change alarm
PV Value, alarm hysteresis setting
word/binary
word/binary
No2
No2
12 20
21
Addr + 23
Addr + 24
PV Value, error deadband setting
PV low-pass filter constant
word/binary
word/BCD
Yes
Yes
22 Addr + 25 Loop derivative gain limiting factor setting word/BCD No3
13 23
24
Addr + 26
Addr + 27
SP value lower limit setting
SP value upper limit setting
word/binary
word/binary
Yes
Yes
14 25
26
Addr + 30
Addr + 31
Control output value lower limit setting
Control output value upper limit setting
word/binary
word/binary
No3
No3
27 Addr + 32 Remote SP Value V-Memory Address Pointer word/hex Yes
A 28
29
Addr + 33
Addr + 34
Ramp/Soak Setting Flag
Ramp/Soak Programming Table Starting Address
bit
word/hex
Yes
No3
B 30
31
Addr + 35
Addr + 36
Ramp/Soak Programming Table Error Flags
PV auto transfer, channel number
bits
word/hex
No3
Yes
32 Addr + 37 Control output auto transfer, channel number word/hex Yes
C Notes:
1
D 2
“Yes” in the column indicates the PID loop will use an updated PID parameter value immediately.
Read data only when alarm enable bit transitions from 0 to 1.
3
Read data only on PLC Mode change.
10 NOTE 1: If the value in bit 9 is 0, then the values in bits 0 and 1 are read. If the value in bit 9 is 1, then
the values in bits 0 and 1 are not read, and bit 9 defines the data format (the range is automatically
11 unipolar).
NOTE 2: If the value in bit 10 is 0, then the values in bits 0, 1 and 9 define the input and output ranges
12 and data formats (the values in bits 11, 12, and 13 are not read). If the value in bit 10 is 1, then the values
in bits 0, 1, and 9 define only the input range and data format, and bits 11, 12, and 13 are read and
13 difine the output range and data format.
14 NOTE 3: If bit 10 has a value of 1 and bit 13 has a value of 0, then bits 11 and 12 are read and define
the output range and data format. If bit 10 and bit 13 each have a value of 1, then bits 11 and 12 are not
read, and bit 13 defines the data format, (the output range is automatically unipolar).
A
B
C
D
3 In the loop table, the Ramp/Soak Table Pointer at Addr+34 must point to the start of the
ramp/soak data for that loop. This may be anywhere in user memory, and does not have to
adjoin to the Loop Parameter table, as shown to the left. Each R/S table requires 32 words,
4 regardless of the number of segments programmed.
The ramp/soak table parameters are defined in the table below. Further details are in the
5 section on Ramp/Soak Operation in chapter 8.
6 Addr
Offset
Step Description Addr
Offset
Step Description
+ 00 1 Ramp End SP Value + 20 9 Ramp End SP Value
7 V–Memory Space
User Data
+ 01 1 Ramp Slope + 21 9 Ramp Slope
+ 02 2 Soak Duration + 22 10 Soak Duration
8 V2000
V2037
LOOP #1
32 words
+ 03
+ 04
2
3
Soak PV Deviation
Ramp End SP Value
+ 23
+ 24
10
11
Soak PV Deviation
Ramp End SP Value
LOOP #2
32 words + 05 3 Ramp Slope + 25 11 Ramp Slope
9 + 06 4 Soak Duration + 26 12 Soak Duration
V3000 Ramp/Soak #1
+ 07 4 Soak PV Deviation + 27 12 Soak PV Deviation
10 32 words + 10
+ 11
5
5
Ramp End SP Value
Ramp Slope
+ 30
+ 31
13
13
Ramp End SP Value
Ramp Slope
+ 12 6 Soak Duration + 32 14 Soak Duration
11 V2034 = 3000 Octal + 13 6 Soak PV Deviation + 33 14 Soak PV Deviation
Pointer to R/S table + 14 7 Ramp End SP Value + 34 15 Ramp End SP Value
12 + 15
+ 16
7
8
Ramp Slope
Soak Duration
+ 35
+ 36
15
16
Ramp Slope
Soak Duration
+ 17 8 Soak PV Deviation + 37 16 Soak PV Deviation
13
Ramp/Soak Table Programming Error Flags (Addr + 35)
14 The individual bit definitions of the Ramp/Soak Table Programming Error Flags word
(Addr+35) is listed in the following table. Further details are given in the PID Loop Mode
A section and in the PV Alarm section later in chapter 8.
Select Forward/Reverse
It is important to know which direction the control output will respond to the error (SP-PV),
1 either forward or reverse. A forward (direct) acting control loop means that whenever the
control output increases, the process variable will also increase. The control output of most
2 PID loops are forward acting, such as a heating control loop. An increase in heat applied will
increase the PV (temperature).
3 A reverse acting control loop is one where an increase in the control output results in a
decrease in the PV. A common example of this would be a refrigeration system, where an
increase in the cooling input causes a decrease in the PV (temperature).
4 The Transfer Mode
Choose either Bumpless I or Bumpless II to provide a smooth transition of the control output
5 from Manual Mode to Auto Mode. Choosing Bumpless I will set the SP equal to the PV
when the control output is switched from Manual to Auto. If this is not desired, choose
6 BumplessII.
The characteristics of Bumpless I and II transfer types are listed in the chart below. Note that
7 their operation also depends on which PID algorithm you are using, the position or velocity
form of the PID equation. Note that you must use Bumpless Transfer type I when using the
8 Transfer
TransferType Select Bit 3 PID Algorithm Manual-to-Auto
Transfer Action
Auto-to-Cascade
Transfer Action
Forces Bias = Control Output Forces Major Loop Output =
9 Bumpless
Transfer I 0
Position Forces SP = PV
Forces
Minor Loop PV
Major Loop Output =
Velocity Forces SP = PV Minor Loop PV
10 Bumpless 1
Position Forces Bias = Control Output none
Transfer II Velocity none none
11 velocity form of the PID algorithm.
The transfer type can also be selected in a RLL program by setting bit 3 of PID Mode 1,
12 V+00 setting as shown.
PID Mode 1 Setting V+00
13 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bumpless Transfer I/II Select
In Cascade Mode, the loop operates as it does in Automatic Mode, with one important
1 difference. The data source for the SP changes from its normal location at V+02 to using the
control output value, V+05, from another loop. So in Auto or Manual modes, the loop
calculation uses the data at V+02. In Cascade Mode, the loop calculation reads the control
2 output from another loop’s parameter table, V+05.
3 Another loop
Loop
Calculation
4 Normal SP V+02
Setpoint
+
–
Loop
Calculation
Control Output
Auto/Manual
5 Process Variable
As pictured below, a loop can be changed from one mode to another, but cannot go from
6 Manual Mode directly to Cascade, or vice versa. This mode change is prohibited because a loop
would be changing two data sources at the same time, and could cause a loss of control.
7 Manual Automatic Cascade
8 Once the CPU is operating in the Run Mode, the normal operation of the PID loop
controller is to read the loop data and perform calculations on each scan of the RLL program.
9 When the CPU is placed in the Program Mode, the RLL program halts operation and all PID
loops are automatically put into the Manual Mode. The PID parameters can then be changed
if desired. Similarly, by placing the CPU in the Run mode, the PID loops are returned to the
10 operational mode which they were previously in, i.e., Manual, Automatic and Cascade. With
this selection you automatically affect the modes by changing the CPU mode.
11 CPU Modes:
12 Program
Mode change
Run
Loop
Modes:
A Manual
Mode change
Automatic
Mode change
Cascade
B
If bit 15 is set to one, then the loops will run independent of the CPU mode. It is like having
C two independent processors in the CPU...one is running the RLL program and the other is
running the process loops.
Having the ability to run loops independently of the RLL program makes it feasible to make
a ladder logic change while the process is still running. This is especially beneficial for large-
mass continuous processes that are difficult or costly to interrupt. The independent of CPU is
1
the feature used for this.
If you need to operate the PID loops while the RLL program is halted, in Program Mode,
2
either select the Independent of CPU mode in the dialog or edit your program to set and
reset bit 15 of PID Mode 1 word (V+00) in your RLL program. If the bit is set to a zero, the 3
loop will follow the CPU mode, then when the CPU is placed in the Program Mode, all
loops will be forced into the Manual Mode. 4
When Independent of CPU mode is used, you should also set the PV to be read directly from
an analog input module. This can easily be done in the PID setup dialog, SP/PV.
The SP/PV dialog has a block entitled Process
5
Variable. There is a block within this block called
Auto Transfer From (from analog input) with the 6
information grayed out. Checking the box to the left
of the Auto Transfer From will high-light the 7
information. Select I/O Module then enter the slot
number the input module resides in. Next, select the
analog input channel of your choice.
8
The second choice is V-Memory. When this is
selected, the V-memory address from where the PV 9
is transferred from must be specified.
Whichever method of auto transfer is used, it is 10
recommended to check the Enable Filter Factor (a
low pass filter) and specify the coefficient. 11
You should also select the analog output for the control output to 12
be transferred to. This is done in the PID setup Output dialog
shown here. The block of information in this dialog is “grayed-
out” until the box next to Auto transfer to I/O module is checked.
13
Once checked, enter the slot number where the output module is
residing and then enter the analog output channel number. 14
A
NOTE: To make changes to any loop table parameters, the PID loop must be in Manual mode and the PLC
must be stopped. If you have selected to operate the PID loop independent of the CPU mode, then you must B
take certain steps to make it possible to make loop parameter changes. You can temporarily make the loops
follow the CPU mode by changing bit 15 to 0. Then you will be able to place the loop into Manual Mode
using DirectSOFT 5. After you change the loop’s parameter setting/s, just restore bit 15 to a value of 1 to re-
C
establish PID operation independent of CPU.
D
You may optionally configure each loop to access its analog I/O (PV and control output) by
1 placing proper values in the associated loop table registers in your RLL program. The
following figure shows the loop table parameters at V+36 and V+37 and their auto transfer
role to access the analog values directly.
2
3 Setpoint V +02
Error Loop
Calculation
Control output V+05
Loop Table
5 V2036 0X XX Base/Slot /Channel number for PV
V2037 0X XX Base/Slot/Channel number for Output
6 XX 0X
Channel number 1 to 48
7 Slot number 1 to 4
Base 0
8 When these loop table parameters are programmed directly, a value of “0102” in register
V2036 directs the loop controller to read the PV data from channel 1 of the analog input. A
9 value of “0000” in either register tells the loop controller not to access the corresponding
analog value directly. In that case, ladder logic must be used to transfer the value between the
analog input and the loop table.
10 NOTE: When auto transfer to/from I/O is used, the analog data for all of the channels on the analog module
cannot be accessed by any other method, i.e., pointer or multiplex.
11
SP/PV Addresses
12 An SP/PV dialog will be made available to setup how the setpoint (SP) and the process
variable (PV) will be used in the loop. If this loop is the minor loop of a cascaded pair, enter
13 that control output address in the Remote SP from Cascaded Loop Output area. It is sometimes
desirable to limit the range of setpoint values allowed to be entered. To activate this feature,
check the box next to Enable Limiting. This will activate the Upper and Lower fields for the
14 values to be entered. Set the limits around the SP value to prevent an operator from entering a
A
B
C
D
setpoint value outside of a safe range. The Square root box is only checked for certain PID
loops, such as a flow control loop. If the Auto transfer from I/O module is selected, a first-order
low-pass filter can be used by checking the Enable Filter box. The filter coefficient is user
1
specified. The use of this filter is recommended during closed loop auto-tuning. If the
Independent format had been checked previously, make the Data format selections here. 2
NOTE: The SP/PV dialog can be left as it first appears for basic PID operation.
3
Set Control Output Limits
Another dialog that will be available in the PID setup will be the Output dialog. The control 4
output address, V+05, (determined by the PID loop table beginning address) will be in view.
Enter the output range limits, Upper Limit and Lower Limit, that will meet the requirement
of the process and which will agree with the data format that has been selected. For a basic
5
PID operation using a 12 bit output module, set the Upper Limit to 4095 and leave the
6
7
8
9
10
Lower Limit set to 0. Check the box next for Auto transfer to I/O module if there is a need to
11
send the control output to a certain analog output module, as in the case of using the Loop
Mode independent of CPU Mode; otherwise, the PID output signal cannot control the 12
analog output when the PLC is out of RUN Mode. If the Auto transfer to I/O module feature
is checked, all channels of the module must be used for PID control outputs. If Independent
format has been previously chosen, the Output Data Format will need to be setup here, that
13
is, select Unipolar or Bipolar format and the bit structure. This area is not available and is
grayed out if Common format has been chosen (see page 8-26). 14
A
WARNING: If the Upper Limit is set to zero, the output will never get above zero. In effect, there
will be no control output.
B
C
D
12 The P, I and D gains are 4-digit BCD numbers with values from 0000 to 9999. They contain
an implied decimal point in the middle, so the values are actually 00.00 to 99.99. Some gain
values have units – Proportional gain has no unit, Integral gain may be selected in seconds or
13 in minutes, and Derivative gain is in seconds.
Gain (Proportional Gain) – This is the most basic gain of the three. Values range from 0000
14 to 9999, but they are used internally as xx.xx. An entry of “0000” effectively removes the
proportional term from the PID equation. This accommodates applications which need
A integral-only loops.
Reset (Integral Gain) – Values range from 0001 to 9998, but they are used internally as
B xx.xx. An entry of “0000” or “9999”causes the integral gain to be “⬁”, effectively removing
the integrator term from the PID equation. This accommodates applications which need
proportional-only loops. The units of integral gain may be either seconds or minutes, as
C shown in the above dialog.
Rate (Derivative Gain) – Values which can be entered range from 0001 to 9999, but they are
D used internally as XX.XX. An entry of “0000” allows removal of the derivative term from the
PID equation (a common practice). This accommodates applications which require only
proportional and/or integral loops. Most control loops will operate as a PI loop.
NOTE: You may elect to leave the tuning dialog blank and enter the tuning parameters in the DirectSOFT
5 PID View. 1
Loop Calculation
P
Proportional
Control
2
Setpoint Error T erm + Output
I
Integral
+
–
D
Derivative 0
+
+ 3
Process Variable
Derivative,
gain-limited
1 4
Loop Table
5
P ID Mode 1 Setting V+00
V+25 00XX Derivative Gain Limit
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6
Derivative gain limit select
Enable Deadband – When selected, the enable deadband function takes a range of small error
1 values near zero, and simply substitutes zero as the value of the error. If the error is larger than
the deadband range, then the error value is used normally.
2 Freeze Bias
The term reset windup refers to an undesirable characteristic of integrator behavior which
occurs naturally under certain conditions. Refer to the figure below. Suppose the PV signal
3 becomes disconnected, and the PV value goes to zero. While this is a serious loop fault, it is
made worse by reset windup. Notice the bias (reset) term keeps integrating normally during
4 the PV disconnect, until its upper limit is reached. When the PV signal returns, the bias value
is saturated (windup) and takes a long time to return to normal. The loop output
5 consequently has an extended recovery time. Until recovery, the output level is wrong and
causes further problems.
6 PV
PV loss PV loss
0
7 Reset windup Freeze bias enabled
Bias
8
9 Output
A
B
C
D
If the process remains out of control for some time, the PV will eventually cross one of the
1 outer alarm thresholds, named High-high alarm and Low-low alarm. Their threshold values
are programmed using the loop table registers listed above. A High-high or Low-low alarm
indicates a serious condition exists, and needs the immediate attention of the operator.
2 The PV Absolute Value Alarms are reported in the four bits in PID Mode and Alarm Status V+06
the PID Mode and Alarm Status word in the loop table, as
3 shown to the right. We highly recommend using ladder logic Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
to monitor these bits. The bit-of-word instructions make this High-high Alarm
4 easy to do. Additionally, you can monitor PID alarms using
DirectSOFT 5.
High Alarm
Low Alarm
Low-low Alarm
5 PV Deviation Alarms
The PV Deviation Alarms monitor the PV deviation with respect to the SP value. The
deviation alarm has two programmable thresholds, and each threshold is applied equally
6 above and below the current SP value. In the figure below, the smaller deviation alarm is
called the “Yellow Deviation”, indicating a cautionary condition for the loop. The larger
7 deviation alarm is called the “Red Deviation”, indicating a strong error condition for the loop.
The threshold values use the loop parameter table locations V+17 and V+20 as shown.
8 Red Deviation Alarm
Yellow Deviation Alarm
Red
Yellow Loop Table
9 SP Green V+17
V+20
XXXX
XXXX
Yellow Deviation Alarm
Red Deviation Alarm
Yellow Deviation Alarm Yellow
The thresholds define zones, which fluctuate with the SP value. The green zone which
11 surrounds the SP value represents a safe (no alarm) condition. The yellow zones lie outside
the green zone, and the red zones are beyond those.
12 The PV Deviation Alarms are reported in the two bits in the
PID Mode and Alarm Status V+06
PID Mode and Alarm Status word in the loop table, as
13 shown to the right. We highly recommend using ladder logic Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
to monitor these bits. The bit-of-word instructions make this Red Deviation
easy to do. Additionally, you can monitor PID alarms using Yellow Deviation
14 DirectSOFT 5.
The PV Deviation Alarm can be independently enabled and disabled from the other PV
A alarms, using bit 13 of the PID Mode 1 Setting V+00 word.
Remember the alarm hysteresis feature works in conjunction with both the deviation and
B absolute value alarms, and is discussed at the end of this section.
C
D
PV Rate-of-Change Alarm
An excellent way to get an early warning of a process fault is to monitor the rate-of-change of 1
the PV. Most batch processes have large masses and slowly-changing PV values. A relatively
fast-changing PV will result from a broken signal wire for either the PV or control output, a
SP value error, or other causes. If the operator responds to a PV Rate-of-Change Alarm
2
quickly and effectively, the PV absolute value will not reach the point where the material in
process would be ruined. 3
The DL06 loop controller provides a programmable PV Rate-of-Change Alarm, as shown
below. The rate-of-change is specified in PV units change per loop sample time. This value is 4
programmed into the loop table location V+21.
Loop Table
5
PV slope OK PV slope excessive
PV
V+21 XXXX PV Rate-of-Change Alarm
6
rate-of-change alarm
PID Mode and Alarm Status V+06
7
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Sample time Sample time
PV Rate of
Change Alarm
8
As an example, suppose the PV is the temperature for your process, and you want an alarm 9
whenever the temperature changes faster than 15 degrees/minute. The PV counts per degree
and the loop sample rate must be known. Then, suppose the PV value (in V+03 location)
represents 10 counts per degree, and the loop sample rate is 2 seconds. Use the formula below
10
to convert our engineering units to counts/sample period:
15 degrees 10 counts / degree 150
11
Alarm Rate-of-Change = X = = 5 counts
1 minute 30 loop samples / min. 30
12
From the calculation result, you would program the value 5 in the loop table for the rate-of-
change. The PV Rate-of-Change Alarm can be independently enabled and disabled from the
other PV alarms, using bit 14 of the PID Mode 1 Setting V+00 word.
13
The alarm hysteresis feature (discussed next) does not affect the Rate-of-Change Alarm.
14
A
B
C
D
PV Alarm Hysteresis
1 The PV Absolute Value Alarm and PV Deviation Alarm are programmed using threshold
values. When the absolute value or deviation exceeds the threshold, the alarm status becomes
2 true. Real-world PV signals have some noise on them, which can cause some fluctuation in
the PV value in the CPU. As the PV value crosses an alarm threshold, its fluctuations cause
the alarm to be intermittent and annoy process operators. The solution is to use the PV
3 Alarm Hysteresis feature.
The PV Alarm Hysteresis amount is programmable from 1 to 200 (binary/decimal). When
4 using the PV Deviation Alarm, the programmed hysteresis amount must be less than the
programmed deviation amount. The figure below shows how the hysteresis is applied when
5 the PV value goes past a threshold and descends back through it.
6 Alarm threshold
Hysteresis
7 PV
V+22 XXXX
Loop Table
PV Alarm Hysteresis
Alarm 1
8 0
9 The hysteresis amount is applied after the threshold is crossed, and toward the safe zone. In
this way, the alarm activates immediately above the programmed threshold value. It delays
10 turning off until the PV value has returned through the threshold by the hysteresis amount.
Alarm Programming Error
11 The PV Alarm threshold values must have
certain mathematical relationships to be valid.
PID Mode and Alarm Status V+06
The requirements are listed below. If not met,
12 the Alarm Programming Error bit will be set, as Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
indicated to the right.
13 • PV Absolute Alarm value requirements:
Alarm Programming Error
NOTE: Overflow/underflow can be alarmed in PID View. The optional C-more operator interface panel (see
D the automationdirect.com website) can also be setup to read these error bits using the PID Faceplate
templates.
Ramp/Soak
R/S (Ramp/Soak) is the last dialog available in the PID setup. The basic PID does not require 1
any entries to be made in order to operate the PID loop. Ramp/Soak will be discussed in
another section.
2
3
4
5
6
7
Complete the PID Setup 8
Once you have filled in the necessary information for the basic PID setup, the configuration
should be saved. The icons on the Setup PID dialog will allow you to save the configuration 9
to the PLC and to disk. The save to icons have the arrow pointing to the PLC and disk. The
read from icons have the arrows pointing away from the PLC and disk.
An optional feature is available with the Doc tab in the Setup PID window. You enter a name
10
and description for the loop. This is useful if there are more than one PID loop in your
application. 11
12
13
Save to disk
14
Save to PLC A
B
NOTE: It is good practice to save your project after setting up the PID loop by selecting File from the menu C
toolbar, then Save project > to disk. In addition to saving your entire project, all the PID parameters are
also saved. D
Open-Loop Test
11 Whether you use manual or auto tuning, it is very important to verify basic characteristics of
a newly-installed process before attempting to tune it. With the loop in Manual Mode, verify
12 the following items for each new loop.
• Setpoint – verify that the SP source can generate a setpoint. Put the PLC in Run Mode and leave
13 the loop in Manual Mode, then monitor the loop table location V+02 to see the SP value(s). (If you
are using the ramp/soak generator, test it now).
• Process Variable – verify that the PV value is an accurate measurement, and the PV data arriving in
14 the loop table location V+03 is correct. If the PV signal is very noisy, consider filtering the input
either through hardware (RC low-pass filter), or using the filter in this chapter.
A • Control Output – if it is safe to do so, manually change the output a small amount (perhaps 10%)
and observe its affect on the process variable. Verify the process is direct-acting or reverse acting, and
check the setting for the control output (inverted or non-inverted). Make sure the control output
B upper and lower limits are not equal to each other.
• Sample Rate – while operating open-loop, this is a good time to find the ideal sample rate (see
C Configure the PID Loop earlier in this chapter). However, if you are going to use auto tuning, the
auto tuning procedure will automatically calculate the sample rate in addition to the PID gains.
SP 50% here 11
PV
12
The response may take awhile, but you will see that there isn’t any oscillation. This response is
not desirable since it takes a long time to correct the error; also, there is a difference between 13
the SP and the PV.
• Increase the Proportional gain, for example to 2.0. The control output will be greater and the
response time will be quicker. The trend should resemble the figure below.
14
60% here
A
10% of B
SP range
SP 50% here
PV response
C
PV
D
• Increase the Proportional gain in small increments, such as 4, 6, 7, etc. until the control output
response begins to oscillate. This is the Proportional gain that should be recorded.
Error
60% here
1
2 50% here
SP
3 PV
4 • Now, return the Proportional gain to the stable response, for example, 9.7. The error, SP-PV, should
be small, but not at zero.
• Next, add a small amount of Integral gain (reset) in order for the error to reach zero. Begin by using
5 80 seconds (adjust in minutes if necessary). The error should get smaller.
• Set the Integral gain to a lower value, such as 50 for a different response. If there is no response,
6 continue to decrease the reset value until the response becomes unstable. See the figure below.
7 60% here
10% of
8 SP range
SP 50% here
9 PV Under-damped PV response
10 • For discussion, let us say that a reset value of 35 made the control output unstable. Return the reset
value to the stable value, such as 38. Be careful with this adjustment since the oscillation can
11 destroy the process.
• The control output response should be optimal now, without a Derivative gain. The example
12 recorded values are: Proportional gain = 9.7 and Integral gain = 38 seconds. Note that the error has
been minimized.
13 Minimum Oscillations
14
A Shortest response time
B The foregone method is the most common method used to tune a PID loop. Derivative
gain is almost never used in a temperature control loop. This method can also be used for
C other control loops, but other parameters may need to be added for a stable control output.
Test your loop for a high PV of 80% and again for a low PV of 20%, and correct the values if
D necessary. Small adjustments of the parameters can make the control output more precise or
more unstable. It is sometimes acceptable to have a small overshoot to make the control
output react quicker.
The derivative gain can be helpful for those control loops which are not controlling
temperature. For these loops, try adding a value of 0.5 for the derivative gain and see if this
improves the control output. If there is little or no response, increase the derivative by
1
increments of 0.5 until there is an improvement to the output trend. Recall that the derivative
gain reacts with a rate of change of the error. 2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
B
C
D
4 Auto Tuning
Control
Setpoint Value Error Term Loop Output Manufacturing
5 +
–
Calculation Process
Process Variable
6
NOTE: In theory, the SP value does not matter in this case, because the loop is not closed. However, the
7 requirement of the firmware is that the SP value must be more than 5% of the PV range from the actual PV
before starting the auto tune cycle (for the DL06, 12 bit PV should be 205 counts or more below the SP for
forward-acting loops, or 205 counts or more above the SP for reverse-acting loops).
8
When auto tuning, the loop controller induces a step change on the output and simply
9 observes the response of the PV. From the PV response, the auto tune function calculates the
gains and the sample time. It automatically places the results in the corresponding registers in
the loop table.
10 The following timing diagram shows the events which occur in the open-loop auto tuning
cycle. The auto tune function takes control of the control output and induces a 10%-of-span
11 step change. If the PV change which the loop controller observes is less than 2%, then the
step change on the output is increased to 20%-of-span.
12 * When Auto Tune starts, step change output m=10%
* During Auto Tune, the controller output reached the full scale positive limit. Auto Tune stopped
13 and the Auto Tune Error bit in the Alarm word bit turned on.
* When PV change is under 2%, output is changed at 20%. Open Loop Auto Tune Cycle Wave: Step
Response Method
14 PV
Rr = Slope
(%) Tangent
SP
A Process Wave
Base Line
LrRr
B (%)
Lr
(sec.)
Time (sec)
C Output Value
Step Change m=10%
(%)
D PID Cycle
Auto Tune Cycle
PID Cycle
When the loop tuning observations are complete, the loop controller computes Rr
(maximum slope in %/sec.) and Lr (dead time in sec). The auto tune function computes the
gains according to the Zeigler-Nichols equations, shown below:
1
PID Tuning
P=1.2*m/LrRr
PI Tuning
P=0.9*m/LrRr
2
I=2.0* Lr I=3.33* Lr
D=0.5* Lr D=0 3
Sample Rate = 0.056* Lr Sample Rate = 0.12*Lr
m = Output step change (10% = 0.1, 20% = 0.2) 4
We highly recommend using DirectSOFT 5 for the auto tuning interface. The duration of
each auto tuning cycle will depend on the mass of the process. A slowly-changing PV will 5
result in a longer auto tune cycle time. When the auto tuning is complete, the proportional,
integral, and derivative gain values are automatically updated in loop table locations V+10,
V+11, and V+12 respectively. The sample time in V+07 is also updated automatically. You
6
can test the validity of the values the auto tuning procedure yields by measuring the closed-
loop response of the PV to a step change in the output. The instructions on how to do this 7
are in the section on the manual tuning procedure (located prior to this auto tuning section).
Closed-Loop Auto Tuning 8
During a closed-loop auto tuning cycle the loop controller operates as shown in the diagram
below. 9
PLC System
Process V ariable
10
Response Limit cycle wave
Closed Loop
Auto T uning 11
Setpoint V alue
+
Error T erm Loop
Calculation
Control
Output Manufacturing
Process
12
–
Process Variable 13
When auto tuning, the loop controller imposes a square wave on the output. Each transition 14
of the output occurs when the PV value crosses over/under the SP value. Therefore, the
frequency of the limit cycle is roughly proportional to the mass of the process. From the PV
response, the auto tune function calculates the gains and the sample time. It automatically
A
places the results in the corresponding registers in the loop table.
B
C
D
The following timing diagram shows the events which occur in the closed-loop auto tuning
1 cycle. The auto tune function examines the direction of the offset of the PV from the SP. The
auto tune function then takes control of the control output and induces a full-span step
2 change in the opposite direction. Each time the sign of the error (SP – PV) changes, the
output changes full-span in the opposite direction. This proceeds through three full cycles.
3 Process Wave
SP
Xo
PV
4 Output Value
5 M
6 To
PID Cycle PID Cycle
8 Mmax = Output Value upper limit setting. Mmin = Output Value lower limit setting.
This example is direct–acting.
9
When set to reverse–acting, the output will be inverted. When the loop tuning observations
10 are complete, the loop controller computes To (bump period) and Xo (amplitude of the PV).
Then it uses these values to compute Kpc (sensitive limit) and Tpc (period limit). From these
11 values, the loop controller auto tune function computes the PID gains and the sample rate
according to the Zeigler-Nichols equations shown below:
12 Kpc = 4M / ( *Xo) Tpc = 0
M = Amplitude of output
13 P = 0.45*Kpc
PID Tuning
P = 0.30*Kpc
PI Tuning
I = 0.60*Tpc I = 1.00*Tpc
14 D = 0.10*Tpc D=0
Sample Rate = 0.014*Tpc Sample Rate = 0.03*Tpc
A Auto tuning error
In open-loop tuning, if the auto tune error bit (bit 13 of loop Mode/Alarm status word
B V+06) is on, please verify the PV and SP values are within 5% of full scale difference, as
required by the auto tune function.
C NOTE: If your PV fluctuates rapidly, you probably need to use the built-in analog filter (see page 8–55) or
create a filter in ladder logic (see example on page 8–56).
D
3
4
5
6
7
8
9
10 The PID View will open and appear over the Ladder View which can be brought into view by
clicking on it’s tab. When using the Data View and the PID View together, each view can be
11 sized for better use as shown on the facing page.
12
13
14
A
B
C
D
The two views are now ready to be used to tune your loop. You will be able to see where the
PID values have been set and see the process that it is controlling. 1
2
3
4
5
6
7
8
The diagram below illustrates how the to use the views to see the current SP, PV and Output
values, along with the other PID addresses. Refer to the Loop Table Definitions page 8-20 for
details of each word in the table. This is also a good data type reference for each word in the
9
table.
10
Scale the time axis of the viewing The trend can be cleared and
window by using this input box. restarted from the left at anytime. 11
Process Variable and
12
Setpoint trends are
color coded. 13
The loop name area 14
turns red whenever there
is an overflow error.
A
P
B
I C
D
D
With both windows positioned in this manner, you are able to see where the PID values have
1 been set and see the process that it is controlling. In the diagram below, you can see the
current SP, PV and Output values, along with the other PID addresses. Refer to the Loop
Table Word Definitions (page 8-20) for details for each word in the table. This is also a good
2 data type reference for each word in the table.
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
3
bits are mode change requests, not commands (certain
conditions can prohibit a particular mode change – see next
page).
Cascade Manual 4
Automatic
The normal state of these mode request bits is “000”. To request a mode change, you must
SET the corresponding bit to a “1”, using a one-shot. The PID loop controller automatically
5
resets the bits back to “000” after it reads the mode change request. Methods of requesting
mode changes are: 6
• DirectSOFT 5’s PID View – this is the easiest method. Use the pull-down menu, or click on one of
the radio buttons if using older DirectSOFT versions, and the appropriate bit will get set. 7
• Ladder program– ladder logic can request any loop mode when the PLC is in Run Mode. This will
be necessary after application startup if mode changes are part of the application.
Use the program shown to the right to SET the mode bit (do not
8
use an OUT coil). On a 0–1 transition of X0, the rung sets the Go to Auto Mode
Auto bit equal to 1. The loop controller resets it.
X0 B2000.1
SET
9
• Operator panel – interface the operator’s panel to ladder logic
using standard methods, then use the logic to the right to set the
mode bit.
10
Since mode changes can only be requested, the PID loop controller will decide when to permit
mode changes and provide the loop mode status. It reports the current mode on bits 0, 1, and
11
2 of the Loop Mode/Alarm Status word, location V+06 in the loop table. The parallel
request/monitoring functions are shown in the figure below. The figure also shows the two 12
possible mode-dependent SP sources, and the two possible Control Output sources.
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
C
Mode Request Mode Monitoring
Cascade Manual
Automatic
Cascade Manual
Automatic D
Auto
6 Mode Request
Cascade
Mode Monitoring
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Loop Mode and Alarm Status V+06
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PV Analog Filter
A noisy PV signal can make tuning difficult and can cause the control output to be more 1
extreme than necessary, as the output tries to respond to the peaks and valleys of the PV.
There are two equivalent methods of filtering the PV input to make the loop more stable.
The first method is accomplished using the DL06’s built-in filter. The second method
2
achieves a similar result using ladder logic.
The DL06 Built-in Analog Filter 3
The DL06 provides a selectable first-order low-pass PV input filter. We only recommend the
use of a filter during auto tuning or PID control if there is noise on the input signal. You 4
may disable the filter after auto tuning is complete, or continue to use it if the PV input
signal is noisy. 5
+
Loop
Calculation
Control Output 6
– Unfiltered
0
PV
7
Process V ariable
1 Filtered
PV
8
P ID Mode 2 Setting V+01
Loop Table
9
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PV filter
enable/disable
V+24 XXXX FIlter constant
10
Bit 2 of PID Mode Setting 2 provides the enable/disable control for the low-pass PV filter 11
(0=disable, 1=enable). The roll-off frequency of the single-pole low-pass filter is controlled by
using register V+24 in the loop parameter table, the filter constant. The data format of the
filter constant value is BCD, with an implied decimal point 00X.X, as follows:
12
• The filter constant has a valid range of 000.1 to 001.0. The smaller the filter value, the greater the
filtering performed (for example, the value 001.0 provides no filtering.)
13
• DirectSOFT 5 converts values above the valid range to 001.0 and values below this range to 000.1
• Values close to 001.0 result in higher roll-off frequencies, while values closer to 000.1 result in lower
14
roll-off frequencies.
We highly recommend using DirectSOFT 5 for the auto tuning interface. The duration of A
each auto tuning cycle will depend on the mass of your process. A slowly-changing PV will
result in a longer auto tune cycle time. B
When the auto tuning is complete, the proportional and integral gain values are automatically
updated in loop table locations V+10 and V+11 respectively. The derivative is calculated if
you autotune for PID and updated in loop table location V+12. The sample time in V+07 is
C
also updated automatically. You can test the validity of the values the auto tuning procedure
yields by measuring the closed-loop response of the PV to a step change in the output. The D
instructions on how to do this are in the section on the manual tuning procedure.
8 SP1
LD
Loads the analog signal, which is a BCD value
and has been loaded from V-memory location
V2000 V2000, into the accumulator. Contact SP1 is
9 BIN
always on.
Converts the BCD value in the accumulator
to binary. This instruction is not needed if the
analog value is originally brought in as a
10 BTOR
binary number.
11 SUBR
Subtracts the real number stored in location
V1400 from the real number in the
V1400 accumulator, and stores the result in the
12 MULR
accumulator. V1400 is the designated
workspace in this example.
Multiplies the real number in the
accumulator by 0.2 (the filter factor),
R0.2 and stores the result in the
13 ADDR
accumulator. This is the filtered value.
Adds the real number stored in
location V1400 to the real number
V1400 filtered value in the accumulator, and
C binary number).
1 Ramp/Soak Generator
Introduction
2 Our discussion of basic loop operation noted the setpoint for a loop will be generated in
various ways, depending on the loop operating mode and programming preferences. In the
3 figure below, the ramp/soak generator is one of the ways the SP may be generated. It is the
responsibility of your ladder program to ensure only one source attempts to write the SP value
at V+02 at any particular time.
4 Setpoint Sources:
Operator Input
5 Ramp/soak generator
Ladder Program
Setpoint V+02
+
–
Loop
Calculation
Control Output
If the SP for your process rarely changes or can tolerate step changes, you probably will not
7 need to use the ramp/soak generator. However, some processes require precisely-controlled SP
value changes. The ramp/soak generator can greatly reduce the amount of programming required
8 for these applications.
The terms “ramp” and “soak” have special meanings in the SP
9 process control industry, and refer to desired setpoint (SP)
values in temperature control applications. In the figure to Soak
Ramp
the right, the setpoint increases during the ramp segment.
10 It remains steady at one value during the soak segment. slope
Complex SP profiles can be generated by specifying a series
11 of ramp/soak segments. The ramp segments are specified in
Time
SP units per second time. The soak time is also programmable in minutes.
12 It is instructive to view the ramp/soak generator as a dedicated function to generate SP values,
as shown below. It has two categories of inputs which determine the SP values generated. The
13 ramp/soak table must be programmed in advance, containing the values that will define the
ramp/soak profile. The loop reads from the table during each PID calculation as necessary.
The ramp/soak controls are bits in a special loop table word that control the real-time
14 start/stop functionality of the ramp/soak generator. The ladder program can monitor the
status of the ramp soak profile (current ramp/segment number).
A Ramp/soak table
Ramp/soak Setpoint Loop Control Output
B Ramp/soak controls Generator +
–
Calculation
Process Variable
C
D
Now that we have described the general ramp/soak generator operation, we list its specific
features:
• Each loop has its own ramp/soak generator (use is optional).
1
• You may specify up to eight ramp/soak steps (16 segments). 2
• The ramp soak generator can run anytime the PLC is in Run mode. Its operation is independent of
the loop mode (Manual or Auto).
• Ramp/soak real-time controls include Start, Hold, Resume, and Jog.
3
• Ramp/soak monitoring includes Profile Complete, Soak Deviation (SP minus PV), and current
ramp/soak step number. 4
The following figure shows a SP profile consisting of ramp/soak segment pairs. The segments
are individually numbered as steps from 1 to 16. The slope of each of the ramp may be either 5
increasing or decreasing. The ramp/soak generator automatically knows whether to increase
or decrease the SP based on the relative values of a ramp’s end points. These values come from
the ramp/soak table.
6
15 16 7
13 14 Soak
5 6
Ramp
Soak
Ramp
8
3 4 Soak
Step 1 2
Ramp
Soak
Ramp
9
Soak
Ramp
SP 10
Ramp/Soak Table V–Memory Space
11
The parameters which define the ramp/soak
profile for a loop are in a ramp/soak table. Each User Data 12
loop may have its own ramp/soak table, but it is
V2000
optional. Recall the Loop Parameter table consists
a 32-word block of memory for each loop, and
V2037
V2040
LOOP #1
32 words
V2034 =
3000 octal 13
LOOP #2
together they occupy one contiguous memory V2074 =
area. However, the ramp/soak table for a loop is
V2077 32 words
3600 octal 14
individually located, because it is optional for each
loop. An address pointer in location V+34 in the
loop table specifies the starting location of the
V3000 Ramp/Soak #1
32 words
A
ramp/soak table.
In the example to the right, the loop parameter
B
tables for Loop #1 and #2 occupy contiguous 32-
word blocks as shown. Each has a pointer to its V3600 Ramp/Soak #2
32 words
C
ramp/soak table, independently located elsewhere
in user V-memory. Of course, you may locate all
the tables in one group, as long as they do not
D
overlap.
The parameters in the ramp/soak table must be user-defined. the most convenient way is to
1 use DirectSOFT 5, which features a special editor for this table. Four parameters are required
to define a ramp and soak segment pair, as pictured below.
2 • Ramp End Value – specifies the destination SP value for the end of the ramp. Use the same data
format for this number as you use for the SP. It may be above or below the beginning SP value, so
the slope could be up or down (we don’t have to know the starting SP value for ramp #1).
3 • Ramp Slope – specifies the SP increase in counts (units) per second. It is a BCD number from
00.00 to 99.99 (uses implied decimal point).
4 • Soak Duration – specifies the time for the soak segment in minutes, ranging from 000.1 to 999.9
minutes in BCD (implied decimal point).
5 • Soak PV Deviation – (optional) specifies an allowable PV deviation above and below the SP value
during the soak period. A PV deviation alarm status bit is generated by the ramp/soak generator.
6 Ramp End
SP Value Ramp/Soak Table
Soak PV
deviation
7 V+00
V+01
XXXX
XXXX
Ramp End SP Value
Ramp Slope
Slope Soak
SP V+02 XXXX Soak Duration
8 duration
segment becomes active
V+03 XXXX Soak PV Deviation
9 The ramp segment becomes active when the previous soak segment ends. If the ramp is the
first segment, it becomes active when the ramp/soak generator is started, and automatically
10 assumes the present SP as the starting SP.
Many applications do not require all 16 R/S steps. Use all zeros in the table for unused steps.
The R/S generator ends the profile when it finds ramp slope = 0. 1
Ramp/Soak Table Flags
The individual bit definitions of the Ramp/Soak Table Flag (Addr+33) word is listed in the
following table.
2
Bit Ramp/Soak Flag Bit Description Read/Write Bit=0 Bit=1 3
0 Start Ramp / Soak Profile write – 01 Start
1
2
Hold Ramp / Soak Profile
Resume Ramp / soak Profile
write
write
–
–
01 Hold
01 Resume
4
3 Jog Ramp / Soak Profile write – 01 Jog
4
5
Ramp / Soak Profile Complete
PV Input Ramp / Soak Deviation
read
read
–
Off
Complete
On
5
6 Ramp / Soak Profile in Hold read Off On
7 Reserved read Off On 6
8–15 Current Step in R/S Profile read decode as byte (hex)
The normal state for the ramp/soak control bits is all zeros. Ladder logic must set only one
1 control bit at a time.
• Start – a 0 to 1 transition will start the ramp soak profile. The CPU must be in Run Mode, and the
2 loop can be in Manual or Auto Mode. If the profile is not interrupted by a Hold or Jog command,
it finishes normally.
• Hold – a 0 to 1 transition will stop the ramp/soak profile in its current state, and the SP value will
3 be frozen.
• Resume – a 0 to 1 transition cause the ramp/soak generator to resume operation if it is in the hold
4 state. The SP values will resume from their previous value.
• Jog – a 0 to 1 transition will cause the ramp/soak generator to truncate the current segment (step),
5 and go to the next segment.
Ramp/Soak Profile Monitoring
6 You can monitor the Ramp/Soak profile status using other bits
in the Ramp/Soak Settings V+33 word, shown to the right.
Ramp/Soak Settings V+33
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
monitor these to synchronize other parts of the program with Current Profile Step, 2–digit hex
11 the ramp/soak profile. Load this word to the accumulator and Value = 01 to 10 hex,
or 1 to 16 decimal
shift right 8 bits, and you have the step number.
12 Ramp/Soak Programming Errors
The starting address for the ramp/soak table must be a valid Ramp/Soak Table Error V+35
It’s a good idea to test your ramp/soak profile before using it to control the process. This is
B easy to do, because the ramp/soak generator will run even when the loop is in Manual Mode.
Using DirectSOFT 5’s PID View will be a real time-saver, because it will draw the profile on-
C screen for you. Be sure to set the trending timebase slow enough to display completed ramp-
soak segment pairs in the waveform window.
D
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
Cascade Control
1
Introduction
Cascaded loops are an advanced control technique that is superior to individual loop control 2
in certain situations. As the name implies, cascade means that one loop is connected to
another loop. In addition to Manual (open loop) and Auto (closed loop) Modes, the DL06
also provides Cascaded Mode.
3
NOTE: Cascaded loops are an advanced process control technique. Therefore we recommend their use only
for experienced process control engineers.
4
When a manufacturing process is complex and contains a lag time from control input to 5
process variable output, even the most perfectly tuned single loop around the process may
yield slow and inaccurate control. It may be the actuator operates on one physical property,
which eventually affects the process variable, measured by a different physical property.
6
Identifying the intermediate variable allows us to divide the process into two parts as shown
in the following figure. 7
PROCESS
Major
Minor
Loop
B
Loop PV, Process A
One of the benefits to cascade control can be seen by examining its response to external
PV, Process B
C
disturbances. Remember the minor loop is faster acting than the major loop. Therefore, if a
disturbance affects process A in the minor loop, the Loop A PID calculation can correct the D
resulting error before the major loop sees the effect.
3 NOTE: Technically, both major and minor loops are “cascaded” in strict process control terminology.
Unfortunately, we are unable to retain this convention when controlling loop modes. Remember that all
minor loops will be in Cascade Mode, and only the outer-most (major) loop will be in Auto Mode.
4
You can cascade together as many loops as necessary on the DL06, and you may have
5 multiple groups of cascaded loops. For proper operation on cascaded loops you must use the
same data range (12/15 bit) and unipolar/bipolar settings on the major and minor loop.
6 To prepare a loop for Cascade Mode operation as a minor loop, you must program its remote
Setpoint Pointer in its loop parameter table location V+32, as shown below. The pointer must
be the address of the V+05 location (control output) of the major loop. In Cascade Mode, the
7 minor loop will ignore the its local SP register (V+02), and read the major loop’s control
output as its SP instead.
8 Major Loop (Auto mode) Minor Loop (Cascade Mode)
Loop Table Loop Table
When using DirectSOFT 5’s PID View to watch the SP value of the minor loop,
12 DirectSOFT 5 automatically reads the major loop’s control output and displays it for the
minor loop’s SP. The minor loop’s normal SP location, V+02, remains unchanged.
13 Now, we use the loop parameter arrangement above and draw its equivalent loop schematic,
shown below.
14
Major loop Minor Cascaded loop
A Loop Control Output V+05 Cascade
Control
Calculation
Remote Setpoint Loop Output
B SP + Calculation
Local SP
–
V+02 Auto/Manual Process Variable
C
D Remember that a major loop goes to Manual Mode automatically if its minor loop is taken
out of Cascade Mode.
1 Time-Proportioning Control
The PID loop controller in the DL06 CPU generates a smooth control output signal across a
numerical range. The control output value is suitable to drive an analog output module,
2 which connects to the process. In the process control field, this is called continuous control,
because the output is on (at some level) continuously.
3 While continuous control can be smooth and robust, the cost of the loop components (such
as actuator, heater amplifiers) can be expensive. A simpler form of control is called time-
4 proportioning control. This method uses actuator which are either on or off (no in-between).
Loop components for on/off-based control systems are lower cost than their continuous
control counterparts.
5 In this section, we will show you how to convert the control output of a loop to time-
proportioning control for the applications that need it. Let’s take a moment to review how
6
7
8
9
10
11 alternately turning a load on and off can control a process. The diagram below shows a hot-air
balloon following a path across some mountains. The desired path is the setpoint. The balloon
pilot turns the burner on and off alternately, which is his control output. The large mass of air
12 in the balloon effectively averages the effect of the burner, converting the bursts of heat into a
continuous effect: slowly changing balloon temperature and ultimately the altitude, which is
13 the process variable.
Time-proportioning control approximates continuous control by virtue of its duty-cycle – the
14 ratio of ON time to OFF time. The following figure shows an example of how duty-cycle
approximates a continuous level when it is averaged by a large process mass.
A period
Desired
B Effect
On/Off On
Control Off
C If we were to plot the on/off times of the burner in the hot-air balloon, we would probably
see a very similar relationship to its effect on balloon temperature and altitude.
D
The example program uses two timers to generate On/Off control. It makes the following
4
assumptions, which you can alter to fit your application:
• The loop table starts at V2000, so the control output is at V2005.
5
• The data format of the control output is 12-bit, unipolar (0 – FFF).
• The time base (one full cycle) for the On/Off waveform is 10 seconds. We use a fast timer (0.01
6
sec/tick), counting to 1000 ticks (10 seconds).
• The On/Off control output is Y0. 7
The time proportioning program must match the resolution of the output (1 part in 1000) to
the resolution of the time base of T0 (also 1 part in 1000). 8
NOTE: Some processes change too fast for time proportioning control. Consider the speed of your process
when you choose this control method. Use continuous control for processes that change too fast for time
9
proportioning control. Also, consider using a solid state switch for a longer switch life instead of a relay.
T0 A fast timer (0.01 sec. timebase) establishes the primary
10
TMRF T0 time interval. The constant, K1000, sets the preset at 10
K1000 seconds (1,000 ticks). The N.C. enabling contact, T0,
makes the timer self-resetting. T0 is on for one scan
each 10 seconds, when it resets itself and T1.
11
T0 At the end of the 10 second period, T0 turns on, and
LD
V2005 loads the control output value (binary) from the loop table
V+05 location (V2005).
The BTOR instruction changes the number in the
12
BTOR
accumulator to a real number.
DIVR
Dividing the control output by 4.095, converts the
0 – 4095 range to 0 – 1000, which “matchs” the
13
R4.095 number of ticks in the 10 second timer range.
T0
V1400
The second fast timer also counts in increments of .01
B
TMRF T1 seconds, so its range is variable from 0 to a maximum
V1400 of 1000 ticks, or 10 seconds. This timer’s output, T1,
turns off the output coil, Y0, when the preset is reached.
1 Feedforward Control
Feedforward control is an enhancement to standard closed-loop control. It is most useful for
diminishing the effects of a quantifiable and predictable loop disturbance or sudden change in
2 setpoint. Use of this feature is an option available to you on the DL06. However, it’s best to
implement and tune a loop without feedforward, and adding it only if better loop
3 performance is still needed. The term “feed-forward” refers to the control technique involved,
shown in the diagram below. The incoming setpoint value is fed forward around the PID
equation, and summed with the output.
4 Feedforward path
kf
5
+
Setpoint Loop Control Output
6 Calculation
+ +
–
7 Process Variable
In the previous section on the bias term, we said that “the bias term value establishes a
8 “working region” or operating point for the control output. When the error fluctuates around
its zero point, the output fluctuates around the bias value.” Now, when there is a change in
setpoint, an error is generated and the output must change to a new operating point. This
9 also happens if a disturbance introduces a new offset in the loop. The loop does not really
“know its way” to the new operating point... the integrator (bias) must increment/decrement
10 until the error disappears, and then the bias has found the new operating point.
Suppose that we are able to know a sudden setpoint change is about to occur (common in
11 some applications). We can avoid much of the resulting error in the first place, if we can
quickly change the output to the new operating point. If we know (from previous testing)
what the operating point (bias value) will be after the setpoint change, we can artificially
12 change the output directly (which is feedforward). The benefits from using feedforward are:
• The SP–PV error is reduced during predictable setpoint changes or loop
13 offset disturbances.
• Proper use of feedforward will allow us to reduce the integrator gain. Reducing integrator gain gives
14 us an even more stable control system.
Feedforward is very easy to use in the DL06 loop controller, as shown below. The bias term
A has been made available to the user in a special read/write location, at PID Parameter Table
location V+04.
B Parameter Table location V+04.
Loop Calculation
C kp P
V+04
Setpoint Error T erm + Control Output
ki I XXXX
Bias T erm
D +
–
+
+
Process Variable kd D
To change the bias (operating point), ladder logic only has to write the desired value to V+04.
The PID loop calculation first reads the bias value from V+04 and modifies the value based
on the current integrator calculation. Then it writes the result back to location V+04. This
1
arrangement creates a sort of “transparent” bias term. All you have to do to implement feed
forward control is write the correct value to the bias term at the right time (see the following 2
example).
NOTE: When writing the bias term, one must be careful to design ladder logic to write the value only once,
3
at the moment when the new bias operating point is to occur. If ladder logic writes the bias value on every
scan, the loop’s integrator is effectively disabled. 4
Feedforward Example
How do we know when to write to the bias term, and what value to write? Suppose we have
5
an oven temperature control loop, and we have already tuned the loop for optimal
performance. Refer to the figure below. We notice that when the operator opens the oven 6
door, the temperature sags a bit while the loop bias adjusts to the heat loss. Then when the
door closes, the temperature rises above the SP until the loop adjusts again. Feedforward 7
Oven Closed
door Open Closed 8
PV PV sags
PV excess
9
10
Bias
11
control can help diminish this effect.
First, we record the amount of bias change the loop controller generates when the door opens 12
or closes. Then, we write a ladder program to monitor the position of an oven door limit
switch. When the door opens, our ladder program reads the current bias value from V+04,
adds the desired change amount, and writes it back to V+04. When the door closes, we
13
duplicate the procedure, but subtracting desired change amount instead. The following figure
Oven Closed
14
Open Closed
door
A
PV
Feed-forward Feed-forward B
Bias
C
shows the results.
The step changes in the bias are the result of our two feed-forward writes to the bias term. We
D
can see the PV variations are greatly reduced. The same technique may be applied for changes
in setpoint.
7
8
Note: The inputs will be read in binary format 0-4095 only if the temperature does not
9 go above 409.5 degrees. Full range is 65535, which equates to 6,553.5 degrees, since the
RTD card reads directly in tenths of a degree. The input resolution of the PID loop needs
to be set based on the max. temperature of the application since the RTD card is always
10 16 bit resolution.
11
12
13
14 Set to read degrees F and select up scale burnout.
A
B
C
D
Program continued on next page
Note that the modules used in the PID loop example program were set up for binary format.
1 They could have been set up for BCD format. In the later case, the BCD data would have to
be converted to binary format before being stored to the setpoint and process variable, and
the control output would have to be converted from BCD to binary before being stored to
2 the analog output.
By following the steps outlined in this chapter, you should be able to setup workable PID
3 control loops. The DirectSOFT 5 Programming Software Manual provides more information
for the use of PID View.
4 For a step-by-step tutorial, go to the Technical Support section located on our website,
www.automationdirect.com. Once you are at the website, click on Technical Support Home.
5 After this page opens, find and select Guided Tutorials located under the Using Your
Products column. An Animated Tutorial page will open. Under Available Tutorials, find
PID Trainer and select View the Powerpoint slide show and begin viewing the tutorial. The
6 Powerpoint Viewer can be downloaded if your computer does not have Powerpoint installed.
7
8
9
10
11
12
13
14
A
B
C
D
Troubleshooting Tips
1
Q. The loop will not go into Automatic Mode.
A. Check the following for possible causes: 2
• A PV alarm exists, or a PV alarm programming error exists.
• The loop is the major loop of a cascaded pair, and the minor loop is not in Cascade Mode. 3
Q. The Control Output stays at zero constantly when the loop is in Automatic
Mode. 4
A. Check the following for possible causes:
• The Control Output upper limit in loop table location V+31 is zero. 5
• The loop is driven into saturation, because the error never goes to zero value and changes (algebraic)
sign. 6
Q. The Control Output value is not zero, but it is incorrect.
A. Check the following for possible causes: 7
• The gain values are entered improperly. Remember, gains are entered in the loop table in BCD,
while the SP and PV are in binary. If you are using DirectSOFT 5, it displays the SP, PV, Bias and
Control output in decimal (BCD), converting it to binary before updating the loop table.
8
Q. The Ramp/Soak Generator does not operate when I activate the Start bit. 9
A. Check the following for possible causes:
• The Ramp/Soak enable bit is off. Check the status of bit 11 of loop parameter table location V+00.
It must be set =1.
10
• The hold bit or other bits in the Ramp/Soak control are on.
• The beginning SP value and the first ramp ending SP value are the same, so first ramp segment has
11
no slope and consequently has no duration. The ramp/soak generator moves quickly to the soak
segment, giving the illusion the first ramp is not working. 12
• The loop is in Cascade Mode, and is trying to get the SP remotely.
• The SP upper limit value in the loop table location V+27 is too low. 13
• Check your ladder program to verify it is not writing to the SP location (V+02 in the loop table). A
quick way to do this is to temporarily place an end coil at the beginning of your program, then go
to PLC Run Mode, and manually start the ramp/soak generator.
14
Q. The PV value in the table is constant, even though the analog module receives A
the PV signal.
A. Your ladder program must read the analog value from the module successfully and write it
into the loop table V+03 location. Verify the analog module is generating the value, and
B
the ladder is working.
Q. The Derivative gain doesn’t seem to have any affect on the output.
C
A. The derivative limit is probably enabled (see section on derivative gain limiting). D
4 Q. The SP and PV values I enter with DirectSOFT 5 work okay, but these values
do not work properly when the ladder program writes the data.
A. The PID View in DirectSOFT 5 lets you enter SP, PV, and Bias values in decimal, and
5 displays them in decimal for your convenience. For example, when the data format is 12
bit unipolar, the values range from 0 to 4095. However, the loop table actually requires
6 these in hex, so DirectSOFT 5 converts them for you. The values in the table range from 0
to FFF, for 12-bit unipolar format.
7 Q. The loop seems unstable and impossible to tune, no matter what gains I use.
A. Check the following for possible causes:
8 • The loop sample time is set too long. Refer to the section near the front of this chapter on selecting
the loop update time.
9 • The gains are too high. Start out by reducing the derivative gain to zero. Then reduce the integral
gain, and the proportional gain if necessary.
• There is too much transfer lag in your process. This means the PV reacts sluggishly to control
10 output changes. There may be too much “distance” between actuator and PV sensor, or the actuator
may be weak in its ability to transfer energy into the process.
11 • There may be a process disturbance that is over-powering the loop. Make sure the PV is relatively
steady when the SP is not changing.
12
13
14
A
B
C
D
PID Loop A mathematical method of closed-loop control involving the sum of three terms based on
1 proportional, integral, and derivative error values. The three terms have independent gain constants,
allowing one to optimize (tune) the loop for a particular physical system.
2 Position Algorithm The control output is calculated so it responds to the displacement (position) of the
PV from the SP (error term)
3 Process A manufacturing procedure which adds value to raw materials. Process control particularly
refers to inducing chemical changes to the material in process.
Process Variable (PV) A quantitative measurement of a physical property of the material in process,
4 which affects final product quality and is important to monitor and control.
Proportional Gain A constant that determines the magnitude of the PID proportional term in response
5 to the current error.
PV Absolute Alarm A programmable alarm that compares the PV value to alarm threshold values.
6 PV Deviation Alarm A programmable alarm that compares the difference between the SP and PV
values to a deviation threshold value.
7 Ramp/Soak Profile A set of SP values called a profile, which is generated in real time upon each loop
calculation. The profile consists of a series of ramp and soak segment pairs, greatly simplifying the task
8 of programming the PLC to generate such SP sequences.
Rate Also called differentiator, the rate term responds to the changes in the error term.
9 Remote Setpoint The location where a loop reads its setpoint when it is configured as the minor loop in
a cascaded loop topology.
10 Reset Also called integrator, the reset term adds each sampled error to the previous, maintaining a
running total called the bias.
11 Reset Windup A condition created when the loop is unable to find equilibrium, and the persistent error
causes the integrator (reset) sum to grow excessively (windup). Reset windup causes an extra recovery
delay when the original loop fault is remedied.
12 Reverse-Acting Loop A loop in which the PV increases in response to a control output decrease. In
other words, the process has a negative gain.
13 Sampling time The time between PID calculations. The CPU method of process control is called a
sampling controller, because it samples the SP and PV only periodically.
14 Setpoint (SP) The desired value for the process variable. The setpoint (SP) is the input command to the
loop controller during closed loop operation.
A Soak Deviation The soak deviation is a measure of the difference between the SP and PV during a soak
segment of the Ramp/Soak profile, when the Ramp/Soak generator is active.
B Step Response The behavior of the process variable in response to a step change in the SP (in closed
loop operation), or a step change in the control output (in open loop operation)
C Transfer To change from one loop operational mode to another (between Manual, Auto, or Cascade).
The word “transfer” probably refers to the transfer of control of the control output or the SP,
D depending on the particular mode change.
Velocity Algorithm The control output is calculated to represent the rate of change (velocity) for the PV
to become equal to the SP.
Bibliography
1
Fundamentals of Process Control Theory, Second Edition Application Concepts of Process Control
Author: Paul W. Murrill
Publisher: Instrument Society of America
Author: Paul W. Murrill
Publisher: Instrument Society of America 2
ISBN 1–55617–297–4 ISBN 1–55617–080–7
PID Controllers: Theory, Design, and Tuning, 2nd Edition Author:
K. Astrom and T Hagglund
Fundamentals of Temperature, Pressure, and Flow Measurements,
Third edition 3
Publisher: Instrument Society of America Author: Robert P. Benedict
ISBN 1–55617–516–7 Publisher: John Wiley and Sons
D Appendix B has a complete list of error messages in order by error number. Many error messages point
to supplemental V-memory locations which contain related information. Special relays (SP contacts)
also provide error indications (refer to Appendix D).
13
14
A
B
C
D
CPU Indicators
1 The DL06 Micro PLCs have indicators on the front to help you determine potential
problems with the system. In normal runtime operation only, the RUN and PWR indicators
2 are on. The table below is a quick reference to potential problems.
6
PWR Indicator
7 In general there are three reasons for the CPU power status LED (PWR) to be OFF:
1. Power to the unit is incorrect or is not applied.
8 2. PLC power supply is faulty.
3. Other component(s) have the power supply shut down.
9 If the voltage to the power supply is not correct, the PLC may not operate properly or may
not operate at all. Use the following guidelines to correct the problem.
10 WARNING: To minimize the risk of electrical shock, always disconnect the system power before
inspecting the physical wiring.
11 1. First, disconnect the external power.
2. Verify that all external circuit breakers or fuses are still intact.
12 3. Check all incoming wiring for loose connections. If you’re using a separate termination block,
check those connections for accuracy and integrity.
13 4. If the connections are acceptable, reconnect the system power and verify the voltage at the DL06
power input is within specification. If the voltage is not correct, shut down the system and correct
the problem.
14 5. If all wiring is connected correctly and the incoming power is within the specifications, the PLC
internal supply may be faulty.
A The best way to check for a faulty PLC is to substitute a known good one to see if this
corrects the problem. The removable connectors on the DL06 make this relatively easy. If
B there has been a major power surge, it is possible the PLC internal power supply has been
damaged. If you suspect this is the cause of the power supply damage, consider installing an
AC line conditioner to attenuate damaging voltage spikes in the future.
C
D
RUN Indicator
If the CPU will not enter the Run mode (the RUN indicator is off ), the problem is usually in
the application program, unless the CPU has a fatal error. If a fatal error has occurred, the 1
CPU LED should be on. (You can use a programming device to determine the cause of the
error.) 2
Both of the programming devices, Handheld Programmer and DirectSOFT 5, will return an
error message describing the problem. Depending on the error, there may also be an AUX
function you can use to help diagnose the problem. The most common programming error is
3
“Missing END Statement”. All application programs require an END statement for proper
termination. A complete list of error codes can be found in Appendix B. 4
CPU Indicator
If the CPU indicator is on, a fatal error has occurred in the CPU. Generally, this is not a
5
programming problem but an actual hardware failure. You can power cycle the system to clear
the error. If the error clears, you should monitor the system and determine what caused the 6
problem. You will find this problem is sometimes caused by high frequency electrical noise
introduced into the CPU from an outside source. Check your system grounding and install
electrical noise filters if the grounding is suspected. If power cycling the system does not reset
7
the error, or if the problem returns, you should replace the CPU.
If the CPU indicator is blinking, the backup battery is low (refer to page 3-8).
8
Communications Problems 9
If you cannot establish communications with the CPU, check these items.
• The cable is disconnected. 10
• The cable has a broken wire or has been wired incorrectly.
• The cable is improperly terminated or grounded. 11
• The device connected is not operating at the correct baud rate (9600 baud).
• The device connected to the port is sending data incorrectly, or another application is running on 12
the device.
• A grounding difference exists between the two devices. 13
• Electrical noise is causing intermittent errors.
• The PLC has a bad communication port and should be replaced. 14
For problems in communicating with DirectSOFT 5 on a personal computer, refer to the
DirectSOFT 5 programming user manual. It includes a troubleshooting section that can help A
you diagnose PC problems in communications port setup, address or interrupt conflicts, etc.
B
C
D
3 • A blown fuse in your machine or panel (the DL06 does not have internal I/O fuses)
• A loose terminal block
B
C
D
Output points can be set on or off in the DL06 series CPUs. If you want to do an I/O check-
out independent of the application program, follow the procedure below:
1
Step Action
1
2
Use a handheld programmer or DirectSOFT 5 to communicate online to the PLC.
Change to Program Mode.
2
3 Go to address 0.
4 Insert an “END” statement at address 0. (This will cause program execution to occur only at address 0 and
prevent the application program from turning the I/O points on or off).
3
5
6
Change to Run Mode.
Use the programming device to set (turn) on or off the points you wish to test.
4
7 When you finish testing I/O points delete the “END” statement at address 0.
5
WARNING: Depending on your application, forcing I/O points may cause unpredictable machine
operation that can result in a risk of personal injury or equipment damage. Make sure you have
taken all appropriate safety precautions prior to testing any I/O points.
6
Handheld Programmer Keystrokes Used to Test an Output Point
7
END
8
X0 X2 X5 X7 Y2 Insert an END statement
at the beginning of the
9
X1 X3 X4 program. This disables
the remainder of the
program.
10
END
C
D
Noise Troubleshooting
1 Electrical Noise Problems
2 Noise is one of the most difficult problems to diagnose. Electrical noise can enter a system in
many different ways and they fall into one of two categories, conducted or radiated. It may be
difficult to determine how the noise is entering the system but the corrective actions for either
3 of the types of noise problems are similar.
• Conducted noise is when the electrical interference is introduced into the system by way of an
4 attached wire, panel connection ,etc. It may enter through an I/O circuit, a power supply connection,
the communication ground connection, or the chassis ground connection.
• Radiated noise is when the electrical interference is introduced into the system without a direct
5 electrical connection, much in the same manner as radio waves.
Reducing Electrical Noise
6 While electrical noise cannot be eliminated it can be reduced to a level that will not affect the
system.
7 • Most noise problems result from improper grounding of the system. A good earth ground can be
the single most effective way to correct noise problems. If a ground is not available, install a ground
8 rod as close to the system as possible. Ensure all ground wires are single point grounds and are not
daisy chained from one device to another. Ground metal enclosures around the system. A loose wire
can act as a large antenna, introducing noise into the system. Therefore, tighten all connections in
9 your system. Loose ground wires are more susceptible to noise than the other wires in your system.
Review Chapter 2 Installation, Wiring, and Specifications if you have questions regarding how to
ground your system.
10 • Electrical noise can enter the system through the power source for the PLC and I/O circuits.
Installing an isolation transformer for all AC sources can correct this problem. DC sources should be
11 well-grounded good quality supplies.
• Separate input wiring from output wiring. Never run low-voltage I/O wiring close to high voltage
12 wiring.
13
14
A
B
C
D
ENT
(You may not get the busy display BUSY
11
if the program is not very long.)
12
One of two displays will appear
Error Display (example)
13
$00050 E401
MISSING END 14
(shows location in question)
Syntax OK display
A
NO SYNTAX ERROR
? B
See the Error Codes Section for a complete listing of programming error codes. If you get an
error, just press CLR and the Handheld will display the instruction where the error occurred.
C
Correct the problem and continue running the Syntax check until the NO SYNTAX ERROR
message appears. D
Special Instructions
There are several instructions that can be used to help you debug your program during
1 machine startup operations.
• END
2 • PAUSE
• STOP
3 END Instruction: If you need a way to quickly disable part of the program, just insert an
END statement prior to the portion that should be disabled. When the CPU encounters the
4 END statement, it assumes that is the end of the program. The following diagram shows an
example.
5 Normal Program New END disables X10 and Y1
X0 X2 Y0 X0 X2 Y0
6 X1 X3 X4 X1 X3 X4
7 X10 Y1
END
8 END
X10 Y1
9 END
10 PAUSE Instruction: This instruction provides a quick way to allow the inputs (or other logic)
to operate while disabling selected outputs. The output image register is still updated, but the
output circuits are not. For example, you could make this conditional by adding an input
11 contact or CR to control the instruction with a switch or a programming device. Or, you
could just add the instruction without any conditions so the selected outputs would be
12 disabled at all times.
PAUSE disables Y0 and Y1
Normal Program
13 X0 X2 Y0 Y0 – Y1
PAUSE
X1 X3 X4
14 X0 X2 Y0
X10 Y1 X1 X3 X4
A X10 Y1
END
B END
C STOP Instruction: Sometimes during machine startup you need a way to quickly turn off all
the outputs and return to Program Mode. You can use the STOP instruction. When this
instruction is executed the CPU automatically exits Run Mode and enters Program Mode.
D Remember, all outputs are turned off during Program Mode. The following diagram shows an
example of a condition that returns the CPU to Program Mode.
X0 X2 Y0
X1 X3 X4
X7
ST OP 1
X0 X2 Y0
X5 Y1 X1 X3 X4 2
END
X5 Y1
3
END
4
In the example shown above, you could trigger X7 which would execute the STOP
instruction. The CPU would enter Program Mode and all outputs would be turned off. 5
Duplicate Reference Check
You can also check for multiple uses of the same output coil. Both programming devices offer 6
a way to check for this condition.. For example, you can AUX 21, CHECK PROGRAM to
check for duplicate references from a Handheld Programmer, or you can use the PLC
Diagnostics menu option within DirectSOFT 5. The following example shows how to
7
perform the duplicate reference check with a Handheld Programmer.
Use AUX 21 to perform syntax check
8
CLR C
2
B
1
AUX ENT AUX 21 CHECK PRO
1:SYN 2:DUP REF
9
Select duplicate reference check 10
(You may not get the busy BUSY
ENT
display if the program is not
very long.)
11
One of two displays will appear 12
$00024 E471
Error Display (example)
(shows location in question)
DUP COIL REF 13
NO DUP REFS
14
Syntax OK display
?
A
If you get an error, just press CLR and the Handheld will display the instruction where the
error occurred. Correct the problem and continue running the Duplicate Reference check
B
until no duplicate references are found.
C
NOTE: You can use the same coil in more than one location, especially in programs containing Stage
instructions and / or OROUT instructions. The Duplicate Reference check will find occurrences, even though
they are acceptable.
D
7 Not all instructions can be edited during a Run Time Edit session. The following list shows
the instructions that can be edited.
8 Mnemonic
TMR Timer
Description Mnemonic Description
Or greater than or equal or less than
OR, ORN (Comparative Boolean)
TMRF Fast timer
9 TMRA Accumulating timer
LD
LDD
Load data (constant)
Load data double (constant)
TMRAF Accumulating fast timer
10 CNT
UDC
Counter
Up / Down counter
ADDD
SUBD
Add data double (constant)
Subtract data double (constant)
MUL Multiply (constant)
SGCNT Stage counter
11 STR, STRN Store, Store not (Boolean)
DIV
CMPD
Divide (constant)
Compare accumulator (constant)
AND, ANDN And, And not (Boolean)
ANDD And accumulator (constant)
12 OR, ORN
STRE, STRNE
Or, Or not (Boolean)
Store equal, Store not equal
ORD Or accumulator (constant)
XORD Exclusive or accumulator (constant)
ANDE, ANDNE And equal, And not equal
13 ORE, ORNE Or equal, Or not equal
LDF
OUTF
Load discrete points to accumulator
Output accumulator to discrete points
STR, STRN Store greater than or equal
14 Store less than (Comparative Boolean)
And greater than or equal
SHFR
SHFL
Shift accumulator right
Shift accumulator left
AND, ANDN And less than (Comparative Boolean) NCON Numeric constant
A
B
C
D
*MODE CHANGE*
3
MODE NEXT NEXT ENT
RUN TIME EDIT?
4
Press ENT to confirm the Run Time Edits
5
(Note, the RUN LED on the D2–HPP *MODE CHANGE*
ENT
Handheld starts flashing to indicate RUNTIME EDITS
6
Run T ime Edits are enabled.)
Find the instruction you want to change (X0) 7
SHFT X A SHFT FD REF
8
SET 0 FIND
$00000 STR X0
9
Press the arrow key to move to the X. Then enter the new contact (C10).
10
SHFT C B A ENT
RUNTIME EDIT?
2 1 0
STR C10 11
Press ENT to confirm the change. 12
ENT (Note, once you press ENT , the next
address is displayed. OR C0
13
14
A
B
C
D
The following diagrams show how the bit override works for both input and output points.
The example uses a simple rung, but the concepts are similar for any type of bit memory.
Program Rung Override holds
1
X0 Y0 previous state and disables
OUT
X0
image register update by CPU
2
override enabled
X0 at input
module
3
X0 in
image register
4
Y0 in
image register 5
The following diagram shows how the bit override works for an output point. Notice the bit
override maintains the output in the current state. If the output is on when the bit override is 6
enabled, then the output stays on. If it is off, then the output stays off.
Program Rung Override holds
7
X0 Y0 previous state and disables
OUT image register update by CPU
8
Y0
override enabled
X0 at
9
input mdoule
Y0 in
image register
10
Y0 at
output module
11
The following diagram shows how you can use a programming device in combination with
the bit override to change the status of the point. Remember, bit override only disables CPU
12
changes. You can still use a programming device to force the status of the point. Plus, since
bit override maintains the current status, this enables true forcing. The example shown is for 13
an output point, but you can also use the other bit data types.
Program Rung The force operation from the
14
X0 Y0 programming device can still
OUT
Y0
change the point status.
A
override enabled
X0 at
input mdoule
B
Y0 force
from programmer C
Y0 in
image register
D
Y0 at
output module
7 Use the PREV or NEXT keys to select the Y data type. (Once the Y appears, press 0 to start
at Y0.)
8 NEXT A ENT
Y 10 Y 0
0
9
Use arrow keys to select point, then use ON and OFF to change the status
10 Y2 is now on
11 SHFT ON
INS
Y 10 Y 0
A MLS 1 0 INS
BIT FORCE
Y10
B From a clear display, use the following keystrokes to force Y10 OFF No fill indicates point is
off.
C No fill indicates point is off.
D SHFT Y
MLS
B
1
A
0
SHFT OFF
DEL
BIT FORCE
Y10
B A
11
STAT ENT NEXT
1 0
ENT Y 20 Y 10
12
Point is on
Override bit is on
13
14
A
B
C
D
4 The seven function keys on the face of the LCD Display Panel give the user access to clock
and calendar setup, V-memory data values or I/O status, etc. Individuals with password
authorization can:
5 • Change clock or calendar
settings or formats
6 • Monitor or change V-memory
values (including DWord values)
7 • Force individual bits on or off
(up to 16 per screen)
06LOGIC
K oyo
ESC MENU ENT
12 Keypad
The LCD Display Panel keypad has seven keys you can use to navigate through the menu
13 hierarchy. Each screen displayed has a specific set of active keys associated with it. All other
keys (those not associated with the current screen) are inactive.
14 Function Keys
Name Label Function
Left Up Right
A Up arrow
Down arrow
none
none
Move to selection above or increase value
Move to selection below or decrease value
Left arrow none Move to next digit to the left
B Down
Right arrow none Move to next digit to the right
Escape ESC Return to previous screen or next level up in
the menu hierarchy
C Escape
Menu
Enter
Menu MENU Scroll down through main menu or
sub-menu selections
Enter the domain of the menu screen selected
D Enter ENT or save new value
Snap-in installation
The LCD Display Panel installs easily 1
into any model DL06 PLC.
Remove the plastic cover (located
between the input and output
OUTPUT: 6-240V
Y
0 1
G
2
LG 0V
AC(L) AC(N) 24V C0
3
Y0
Y1
Y2
Y3
50 - 60Hz
4
C1
Y4
Y5
Y6
5
Y7 Y10 Y12
C2
6
C3 Y15 Y17
Y11 Y13 Y14 Y16 N.C.
2.0A, 6 - 27V
7 10 11
2.0A
12 13
PWR: 100-240V
14 15 16 17
50-60Hz 40VA
20
D0-06DR
21 22 23
2
X
terminals). Press the locking tab of the
cover to release it from its catch, and
INPUT: 12 - 24V 3 - 15mA
press tab
3
slide the cover to the left about 3/8ths
inch. LOGIC 06
K oyo 4
plastic C0 X1 X3 X4 X6 C2 X11 X13 X14 X16 C4 X21 X23 N.C.
X0 X2 C1 X5 X7 X10 X12 C3 X15 X17 X20 X22 N.C.
cover
PORT
5
The cover should now lift straight out OUTPUT: 6-240V
Y
50 - 60Hz 2.0A, 6 - 27V 2.0A PWR: 100-240V 50-60Hz 40VA
D0-06DR
6
from the slot on the face of the DL06. X
0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20 21 22 23
slide
INPUT: 12 - 24V 3 - 15mA
7
and lift cover
LOGIC 06
K oyo
8
WARNING: Remove power to the PLC C0 X1 X3 X4 X6 C2 X11 X13 X14 X16 C4 X21 X23 N.C.
POR
9
display.
Place the LCD Display Panel over the AC(L) AC(N) 24V C0 Y1 Y3 Y4 Y6 C2 Y11 Y13 Y14 Y16 N.C.
10
opening but offset approximately 3/8ths OUTPUT: 6-240V 50 - 60Hz 2.0A, 6 - 27V 2.0A PWR: 100-240V 50-60Hz 40VA
D0-06DR
inch to the left. The Display Panel
Y
X
0
INPUT: 12 - 24V
1 2 3
3 - 15mA
4 5 6 7 10 11 12 13 14 15 16 17 20 21 22 23
11
should fit easily into the opening.
place
12
LOGIC 06
LCD Display Panel over K oyo
opening C0
X0
X1
X2
X3
C1
X4
X5
X6
X7
C2 X11 X13 X14 X16 C4 X21 X23 N.C.
X10 X12 C3 X15 X17 X20 X22 N.C. 13
POR
Slide the Display Panel to the right until 14
the left side of the Display Panel is flush
with the left side of the PLC. The
Display Panel connector will click into
OUTPUT: 6-240V
Y
X
0
INPUT: 12 - 24V
1 2 3
50 - 60Hz
3 - 15mA
4 5
2.0A, 6 - 27V
6 7 10 11
2.0A
12 13
PWR: 100-240V
14 15 16
50-60Hz 40VA
17 20
D0-06DR
21 22 23 A
place.
slide
B
LCD until it clicks 06
into place
LOGIC
C0
K oyo
X0
X1
X2
X3
C1
X4
X5
X6
X7
C2 X11 X13 X14 X16 C4 X21 X23 N.C.
X10 X12 C3 X15 X17 X20 X22 N.C.
C
PORT
D
Display Priority
1 The LCD Display Panel will show one of the following (unless power is removed from the
PLC):
2 • Default screen (user defined or factory default)
• Menu selection
3 • Message from ladder program
• Error message
4 The built-in keypad allows you to navigate through these message displays.
5
On power-up the default message is
6 normally displayed. The default message D L 0 6 P L C M a y 0 8
is set at the factory but can be 1 3 : 5 7 : 0 1
customized by the user. Loading a
7 custom default message is described later
in this chapter.
8 If a system error occurs, the error
message supercedes the default message D i a g n o s t i c E r r o r
9 (or other current display screen), and the
appropriate error code is displayed for
E 4 * * N O P R O G R A M
diagnostic purposes.
10
11
12
13
14
A
B
C
D
Menu Navigation
Beginning at the default screen, each time you press the MENU key the display will scroll to 1
the next menu option. The up arrow and down arrow keys also scroll through the list of
menus (in the direction indicated by the arrow), but you must initially press the MENU key
(at the default screen) to activate the up and down arrow keys.
2
There are seven built-in menus selections. Some of the menu items have sub-menus. The
menus and sub-menus are described in this chapter. Each menu selection requires that you 3
press the ENT key to view or change settings or values within the domain of that main menu
selection. 4
Seven Menu Choices
Pressing and holding the MENU key will cause the display to scroll through the following 5
menu options:
M E N U S C R E E N
> M 1 : P L C I N F O .
6
• M1 : PLC information
• M2 : System configuration > M 2 : S Y S T E M C F G 7
• M3 : Monitor > M 3 : MO N I T O R
• M4 : Calendar read/write
> M 4 : C A L E N D A R R / W
8
• M5 : Password read/write > M 5 : P A S SWO R D R / W
• M6 : Error history read
> M 6 : E R R H I S T O R Y
9
• M7 : LCD test and set
> M 7 : L C D T E S T & S E T
10
In this section we use illustrations of the LCD Display Panel keypad and display area to show
how to navigate through the menu hierarchy. The example below shows the factory default
screen as Screen 1 and the main menu entry screen as Screen 2.
11
The illustration of the keypad between the display screens indicates that pressing the MENU
key causes a transition from Screen 1 to Screen 2. This type of representation is used
12
throughout this section. When inside the menu hierarchy, the ESC key returns the display to
the previous screen. 13
Screen 1 - factory default
D L 0 6 P L C M a y 0 8
14
1 4 : 1 2 : 0 1
A
Press
the MENU key to
transition from screen 1 to B
screen 2.
9 M 1 : P L C T Y P E
D 0 - 0 6 D D 1
10
11
12 Step 1.3
ESC MENU ENT
B
C NOTE: The menu screen examples shown in this section assume the password/lock feature is not turned on.
If the password/lock feature is turned on, the user will be prompted by a message on the Display Panel to
enter the password at the appropriate time. Users without password authorization will have access to a
D limited number of screens.
Step 1.4
Press MENU again to sequence to 1
FIRMWARE REV. M 1 : F I R MWA R E R E V .
V 1 . 0 0 0
2
3
Step 1.5 ESC MENU ENT 4
Press MENU again to sequence to
LADDER MEMORY USED. The
number of words used and the total
M 1 : L A D D E R
U S E D 2 1
M E MO R Y
/ 7 6 8 0
5
number available in the PLC are
displayed. 6
7
Step 1.6 ESC MENU ENT
7 NOTE: This is an example only and may not represent the contents of this or any option slot on your system.
8
9
10 Pressing the MENU key four times will
Step 2.3 ESC MENU ENT
M 2 : O P T I O N S L O T 3
14 F 0 - 0 4 A D - 1
A
B ESC MENU ENT
C
D
Step 2.5
Press the ESC key twice to return to the
default screen.
M 2 : O P T I O N S L O T 4 1
E M P T Y I / O S L O T
2
3
Return to Step 2.1
ESC MENU ENT
4
> M 1 : P L C I N F O .
> M 2 : S Y S T E M C F G . 5
6
Return to default screen ESC MENU ENT
7
D L 0 6 P L C M a y 0 8
1 4 : 5 7 : 2 1
8
9
10
11
12
13
14
A
B
C
D
Data Monitor
9 Data type = V for V-memory or P for pointer. Step 3.3
Press MENU to change data type, or press
10 ENT to designate the register whose data you
M 3 : D A T A T Y P E V
A D D R E S S 0 0 0 0 0
want to view or change.
11
12
V-memory values Step 3.4 ESC MENU ENT
Step 3.5
B This screen allows you to view two
adjacent V-memory locations in BCD
ESC MENU ENT
M 3 : V 1 V 0
format. The lower word is to the right.
C Pressing ENT makes it possible to change
V A L 0 0 0 0 0 0 0 0
the value in the lower word. At this level The data values on this screen will be four digits
D of the menu hierarchy, you can also use in length for BCD/HEX unless bit 8 of V7742
is set. Bit 8 of V7742 changes the data format to
the up and down arrow keys to scroll to
other memory locations. decimal (five digits).
1
Step 3.6 ESC MENU ENT
2
Use the right or left arrow key to move
the cursor to the digit you want to
M 3 : D A T A
C H G = 0 0 0 0
V 0
0 0 0 0
3
change. Use the up or down arrow key to
move to another digit. The V-memory
value is expressed as a BCD number so
4
you will see values (in the range: 0 - F)
available for each digit. The data format 5
can be changed to decimal by setting bit Step 3.7 ESC MENU ENT
8 of V7742.
M 3 : D A T A V 0
6
C H G = A F 0 6 0 0 0 0
7
8
Step 3.8 ESC MENU ENT
9
M 3 : V 1 V 0
V A L 0 0 0 0 A F 0 6 10
11
Returns to
Step 1.1 ESC MENU ENT
12
M 3 : D A T A T Y P E V 13
A D D R E S S 0 0 0 0 0
14
Returns to
A
default screen ESC MENU ENT
B
Push the ESC key five (5) times to return D L 0 6 P L C M a y 0 8
to the default screen. 1 5 : 0 2 : 1 3 C
D
3
Step 3.4a
4 ESC
M 3 : D A T A
MENU ENT
T Y P E P
A D D R E S S 0 0 0 0 0
5
6
Use the up or down arrow keys to change
7 the value of the current digit. Use the left Step 3.5a ESC MENU ENT
9
10 Step 3.6a ESC MENU ENT
M 3 : D A T A T Y P E P
11 A D D R E S S 1 0 0 0 0
12
13
14 At Step 3.7a, the up and down arrow
keys can be used to cycle through data
Step 3.7a ESC MENU ENT
M 3 : D A T A P 1 0 0 0 0
words. Each time you press the up or
A down arrow key, the address increments
( V 0 0 0 0 0 ) 2 0 0 0
or decrements by one 16-bit word
B (addresses are expressed in octal).
Return to
C To change from the data monitor to the Step 3.3 ESC MENU ENT
T Y P E C
7
as necessary.
A D D R E S S 0 0 0 0 0
8
9
ESC MENU ENT 10
Press ENT to view the selected bits. M 3 : B I T T Y P E V
A D D R E S S 0 2 5 0 0 11
12
ESC MENU ENT
13
Use the left and right arrow keys to select
a bit whose status you want to change.
Press ENT once to see the change status
M 3 : B I T - 0 0 V 2 5 0 0
o o o o o o o o o o o o o o o o
14
screen. Press ENT again to change the
status from OFF to ON or ON to OFF. A
ESC MENU ENT
B
M 3 : B I T - 0 2
C H G = O N
V 2 5 0 0
S T A T : O F F
C
D
M 4 : D A T E 0 5 - 0 8 - 0 2
6 T I M E 0 1 : 2 1 : 2 8
7
8 Step 4.3 ESC MENU ENT
M 4 : > C H A N G E D A T E
9 > C H A N G E T I M E
10
11 Step 4.4 ESC MENU ENT
M 4 : D A T E
MENU ENT
MM - D D - Y Y
You will be asked if you want to set the
S E T ? 0 5 - 0 8 - 0 2
B date to the chosen value. Press ENT
again if the date is correct. You will
automatically return to Step 4.2, and the
C new date will be displayed.
Returns to 1
Step 4.2
In order to change the time or date/time M 4 : D A T E 0 5 - 0 8 - 0 2
2
format, press ENT again at Step 4.2. T I M E 0 1 : 2 1 P M
3
4
Use the up or down arrow keys or the
ESC MENU ENT
5
MENU key to scroll through the sub- M 4 : > C H A N G E D A T E
menu choices. At this point in our > C H A N G E T I M E 6
example, we will change the time setting.
7
ESC MENU ENT
8
M 4 : > C H A N G E
> C H A N G E
T I M E
F O R MT
9
10
11
At Step 4.4, use the up and down arrows ESC MENU ENT
Returns to
If you want to change the format for the Step 4.2
1 date or time, return to Step 4.2 and press
M 4 : D A T E 0 5 - 0 8 - 0 2
ENT.
T I M E 0 1 : 2 1 P M
2
3
4 Press ENT, MENU, MENU to arrive at ESC MENU ENT
6
7 Press ENT again to enter the date format ESC MENU ENT
M 4 : D A T E F O R M A T
MM-DD-YY (US format)
12 DD-MM-YY (European format)
C H G = MM - D D - Y Y
M 5 : > P A S SWD C H G ?
B
> L O C K / U N L O C K ?
C
D
ESC MENU ENT
M 5 : P SWD * * * * * * * *
9 S E T ? 2 1 7 0 8 3 0 3
10
11 Return to
ESC MENU ENT
Step 5.2
12 M 5 : > P A S SWD C H G ?
> L O C K / U N L O C K ?
13
14
It is not possible to lock the display ESC MENU ENT
Return to
H I S T O R Y
“NO ERROR” if there is no record of N O E R R O R
6 errors. If errors have occurred, they can
be identified by their Error Code. The
7 Error Code table (see appendix B) will
explain the source of the error message.
The last 16 messages are displayed.Error
8 messages are displaced when a new error D i a g n o s t i c E r r o r
message arrives E 4 * * N O P R O G R A M
9
10
11 To review past error messages use the
ESC MENU ENT
13
14
A
B
C
D
9 :D [:D]
V2001 = 0001
V2000:D
1 2 3 4 5 6 7
s s s s s s 6
8
5
9 10 11
5 3 6
(32 bit binary) S [:DS] V2000:DS 6 5 5 3 6
10 C0 [:DC0] V2000:DC0 0 0 0 0 0 0 6 5 5 3 6
0 [:D0] V2000:D0 s s s s s s 6 5 5 3 6
11 V2000 = 0000
V2001 = 0001 1 2 3 4 5 6 7 8
:DB [:DB] V2000:DB 0 0 0 1 0 0 0 0
12 (8 digit BCD) S [:DBS] V2000:DBS 1 0 0 0 0
C0 [:DBC0] V2000:DBC0 0 0 0 1 0 0 0 0
13 0 [:DB0] V2000:DB0
Value = 222.11111
s s s 1 0 0 0 0
V2000 = 1C72
14 :R V2001 = 435E 1 2 3 4 5 6 7 8 9 10 11 12 13
(Floating point [:R] V2000:R s s s f 2 2 2 . 1 1 1 1 1
number)
A S
C0
[:RS] V2000:RS
[:RC0] V2000:RC0
f 2 2 2 . 1 1
f 0 0 0 2 2 2
1
.
1
1
1
1 1 1 1
0 [:R0] V2000:R0 s s s f 2 2 2 . 1 1 1 1 1
B Value = 222.1
V2000 = 199A
:E
C (Floating point [:E]
V2001 = 435E
V2000:E
1 2 3 4 5 6 7
s f 2 . 2 2 1
8
0
9 10 11 12 13
0 E + 0 2
number with
exponent) S [:ES] V2000:ES f 2 . 2 2 1 0 0 E + 0 2
D C0 [:EC0] V2000:EC0 f 2 . 2 2 1 0 0 E + 0 2
0 [:E0] V2000:E0 f 2 . 2 2 1 0 0 E + 0 2
s = space f = plus/minus flag (plus = no symbol, minus = - )
The S, C0 and 0 modifiers alter the presentation of leading zeros and spaces. S removes
leading spaces and left justifies the result. C0 replaces leading spaces with leading zeros.
0 is a modification of C0. 0 eleminates any leading zeros in the C0 format version and
1
converts them to spaces.
2
Reserved memory registers for the LCD Display Panel
Two V-memory registers are reserved for making changes to LCD functions via ladder logic.
3
V7742 allows for bit flags to be set in the ladder program. The bit flags control such things as
data formats, the back light, and the beeper. All V7742 bit flags are defined in the table on 4
the next page.
The other reserved register is V7743. This register is used to write a customized default screen 5
message to the LCD. A sample program for this purpose is illustrated later in this chapter.
6
V-memory address Contents
Various LCD flags
7
• Calendar date and time format
V7742
• Default operation menu
• Data format of data monitor
8
• LCD password status flag
• Key press acknowledgement buzzer on/off setting
• Back light on/off setting
9
Default message location (writing 0 to this address returns the
V7743 default message to the factory setting) 10
The following program segment uses the SET and RST coils to turn on and off bit 12 of
V7742. When C0 is on, bit 12 is turned on. Bit 12 turns on the beeper in the LCD Display
11
Panel. The C1 contact resets bit 12 to the off state.
12
C0 B7742.12
SET 13
B7742.12
C1
RST 14
A
B
C
D
12 1 = New LCD message leaves previous message, overwrites specified char. only
LCD password status flag (Read only)
Bit 11 0 = Password unlock
13 1 = Password lock
Status flag beep on/off control (default = 0)
14 Bit 12 0
1
= Beep OFF
= Beep ON (LCD beeps continuously during ON status of this flag)
After running this program, press MENU, then ESC or cycle power. The new default
B
message should look as indicated. See Menu A u t o m a t i o n D i r e c t
4 instructions for changing date and time C
information.
NOTE: It is possible to return to the factory default screen by writing 0 to V7743 and cycling power.
D
B NOTE: The LCD Display Panel instruction is supported by DirectSOFT 5, Ver. 5 or later. It is not
supported by the D2-HPP handheld programmer.
C
D
2 3 4 5 6 7 3
0
1
4
2 5
3
4 6
5
7
Second Digit
Example:
6
To display an upper case A, write 41
HEX to the memory location identified
7 8
by the LCD instruction. 8
9 9
A
B
10
C 11
D
E 12
F
13
14
A
B
C
D
5 C1
LCD
Line Number: K1
6 "Alarm 1 "
LCD
7 Line Number:
_date:us " " _time:12
K2
8 END
9
A l a r m 1
10 0 5 / 0 8 / 0 4 5 : 2 3 P M
11
12
13
14
A
B
C
D
END
10
A l a r m 1
11
P a r t s = 2 4 3 7
12
13
14
A
B
C
D
Example program: alarm text from V-memory with embedded V-memory data
This program example uses the VPRINT instruction to write ASCII text (in the appropriate
1 character sequence) to V10000 and V10010. The LCD instruction is used as a pointer to the
V-memory location where the text for each line of the display resides.
2 Alarm 2 LCD Msg
Alarm 2 Active One-shot
3 C0 C1
PD
5 C1
VPRINT
Byte Swap: None
"Print to" Address: V10000
"Alarm 2 "
6 VPRINT
Byte Swap: None
8 C1 LCD
Line Number: K1
Starting V Memory Address: V10000
9 Number of Characters: K16
10 LCD
Line Number: K2
Starting V Memory Address: V10010
11 Number of Characters: K16
12 END
13
A l a r m 2
14 P a r t s = 3 5 8 9
A
B
C
D
Introduction
A Purpose of Auxiliary Functions
Many CPU setup tasks involve the use of Auxiliary (AUX) Functions. The AUX Functions
perform many different operations, including clearing ladder memory, displaying the scan
2 time, and copying programs to EEPROM in the handheld programmer. They are divided
into categories that affect different system resources. You can access the AUX Functions from
3 DirectSOFT 5 or from the D2–HPP Handheld Programmer. The manuals for those products
provide step-by-step procedures for accessing the AUX Functions. Some of these AUX
Functions are designed specifically for the Handheld Programmer setup, so they will not be
4 needed (or available) with the DirectSOFT 5 package. Even though this Appendix provides
many examples of how the AUX functions operate, you should supplement this information
5 with the documentation for your choice of programming device.
NOTE: the Handheld Programmer may have additional AUX functions that are not supported with the
6 DL06 PLCs.
7 AUX Function and Description DL06 AUX Function and Description DL06
AUX 2* — RLL Operations AUX 6* — Handheld Programmer Configuration
8 21 Check Program * 61 Show Revision Numbers *
22 Change Reference * 62 Beeper On / Off HP
5 The Syntax check will find a wide variety of programming errors, such as missing END
statements. If you perform this check and get an error, see Appendix B for a complete listing
of programming error codes. Correct the problem and then continue running the Syntax
6 check until the message
“NO SYNTAX ERROR” appears.
7 Use the Duplicate Reference check to verify you have not used the same output coil reference
more than once. Note, this AUX function will also find the same outputs even if they have
8 been used with the OROUT instruction, which is perfectly acceptable.
This AUX function is available from the PLC Diagnostics sub-menu in DirectSOFT 5.
9 AUX 22 Change Reference
There will probably be times when you need to change an I/O address reference or control
10 relay reference. AUX 22 allows you to quickly and easily change all occurrences, (within an
address range), of a specific instruction. For example, you can replace every instance of X5
with X10.
11 AUX 23 Clear Ladder Range
There have been many times when we’ve taken existing programs and added or removed
12 certain portions to solve new application problems. By using AUX 23 you can select and
delete a portion of the program. DirectSOFT 5 does not have a menu option for this AUX
13 function, but you can just select the appropriate portion of the program and cut it with the
editing tools.
14 AUX 24 Clear Ladders
AUX 24 clears the entire program from CPU memory. Before you enter a new program, you
A should always clear ladder memory. This AUX function is available on the PLC/Clear PLC
sub-menu within DirectSOFT 5.
B AUX 3* — V-memory Operations
C AUX 31 Clear V-memory
AUX 31 clears all the information from the V-memory locations available for general use.
D This AUX function is available on the PLC/Clear PLC sub-menu within DirectSOFT 5.
AUX 54 resets the system memory to the default values. You can also perform this operation
A
from within DirectSOFT 5 by using the PLC/Setup sub-menu.
AUX 55 Set Watchdog Timer
B
DL06 PLCs have a “watchdog” timer that is used to monitor the scan time. The default value
set from the factory is 200 ms. If the scan time exceeds the watchdog time limit, the CPU C
automatically leaves RUN mode and enters PGM mode. The Handheld displays the
following message E003 S/W TIMEOUT when the scan overrun occurs. D
Use AUX 55 to increase or decrease the watchdog timer value. You can also perform this
Use AUX 56 to set the network address and communication parameters. You can also
7 perform this operation from within DirectSOFT 5 by using the PLC/Setup sub-menu.
AUX 57 Set Retentive Ranges
8 DL06 CPUs provide certain ranges of retentive memory by default. Some of the retentive
memory locations are backed up by a super-capacitor, and others are in non-volatile FLASH
9 memory. The FLASH memory locations are V7400 to V7577 (may be non-volatile if MOV instruction
is used). The default ranges are suitable for many applications, but you can change them if
your application requires additional retentive ranges or no retentive ranges at all. The default
10 settings are:
11 Memory Area
Default Range
DL06
Available Range
Control Relays
12 V-memory
C1000 – C1777
V400 – V37777
C0 – C1777
V0 – V37777
Timers None by default T0 – T377
13 Counters CT0 – CT177 CT0 – CT177
Stages None by default S0 – S1777
14 Use AUX 57 to change the retentive ranges. You can also perform this operation from within
DirectSOFT 5 by using the PLC/Setup sub-menu.
A WARNING: The DL06 CPUs have optional battery-backed RAM which is set as retentive. The
super-capacitor will retain the values in the event of a power loss, but only up to 3 weeks. (The
B retention time may be as short as 4 1/2 days in 60° C operating temperature.
You can also enter or modify a password from within DirectSOFT 5 by using the
PLC/Password sub-menu. This feature works slightly differently in DirectSOFT 5. Once
A you’ve entered a password, the CPU is automatically locked when you exit the software
package. It will also be locked if the CPU is power cycled.
2 WARNING: Make sure you remember the password before you lock the CPU. Once the CPU is
locked you cannot view, change, or erase the password. If you do not remember the password, you
3 have to return the CPU to the factory for password removal. It is the policy of Automationdirect to
clear the PLC memory along with the password.
4 NOTE: The DL06 CPUs support multi-level password protection of the ladder program. This allows
password protection while not locking the communication port to an operator interface. The multi-level
5 password can be invoked by creating a password with an upper case “A” followed by seven numeric characters
(e.g. A1234567).
8 E2**
I/O MODULE FAILURE An I/O module has failed. Run AUX42 to determine the actual error.
E202 An I/O module has failed to communicate with the DL06 or is missing from the slot. SP45
9 MISSING I/O MODULE will be on and the error code will be stored in V7756. Run AUX42 to determine the slot and
base location of the module reporting the error.
E210 A short duration power drop-out occurred on the main power line supplying power to the
10 POWER FAULT DL06.
This error occurs when the auto configuration check is turned on in the DL06 and the actual
E252 I/O configuration has changed either by moving modules in a base or changing types of
11 NEW I/O CFG modules in a base. You can return the modules to the original position/types or run AUX45
to accept the new configuration. SP47 will be on and the error code will be stored in V7755.
E262 An out of range I/O address has been encountered in the application program. Correct the
12 I/O OUT OF RANGE invalid address in the program. SP45 will be on and the error code will be stored in V7755.
E263 Out of range addresses have been assigned while manually configuring the I/O.
13 CONFIGURED I/O ADDRESS
OUT OF RANGE Correct the address assignments using AUX46.
E311 A request from the handheld programmer could not be processed by the DL06. Clear the
14 HP COMM
ERROR 1
error and retry the request. If the error continues replace the DL06 SP46 will be on and the
error code will be stored in V7756.
E312 A data error was encountered during communications with the DL06. Clear between the two
A HP COMM
ERROR 2
devices, replace the handheld programmer, then if necessary replace the DL06. The error
code will be stored in V7756.
An address error was encountered during communications with the DL06. Clear the error
B E313
HP COMM and retry the request. If the error continues check the cabling between the two devices,
replace the handheld programmer, then if necessary replace the DL06 The error code will be
ERROR 3 stored in V7756.
C E316
HP COMM
A mode error was encountered during communications with the DL06. Clear the error and
retry the request. If the error continues replace the handheld programmer, then if necessary
ERROR 6 replace the DL06. The error code will be stored in V7756.
D E320
HP COMM
The DL06 did not respond to the handheld programmer communication request. Check to
insure cabling is correct and not defective. Power cycle the system. If the error continues,
TIME-OUT replace the DL06 first and then the handheld programmer if necessary.
E401
MISSING END STATEMENT
All application programs must terminate with an END statement. Enter the END statement in
appropriate location in your program. SP52 will be on and the error code will be stored in
4
V7755.
E402
MISSING LBL
A MOVMC or LDLBL instruction was used without the appropriate label. Refer to Chapter 5
for details on these instructions. SP52 will be on and the error code will be stored in V7755.
5
E403 A subroutine in the program does not end with the RET instruction. SP52 will be on and the
MISSING RET error code will be stored in V7755. 6
E404 A NEXT instruction does not have the corresponding FOR instruction. SP52 will be on and
MISSING FOR
E405
the error code will be stored in V7755.
A FOR instruction does not have the corresponding NEXT instruction. SP52 will be on and
7
MISSING NEXT the error code will be stored in V7755.
E406 An interrupt routine in the program does not end with the IRT instruction. SP52 will be on 8
MISSING IRT and the error code will be stored in V7755.
E412
SBR/LBL>256
There is greater than 256 SBR or DLBL instructions in the program. This error is also
returned if there is greater than 4 INT instructions used in the program. SP52 will be on and
9
the error code will be stored in V7755.
E421
DUPLICATE STAGE REFERENCE
Two or more SG or ISG labels exist in the application program with the same number. A
unique number must be allowed for each Stage and Initial Stage. SP52 will be on and the
10
error code will be stored in V7755.
E422
DUPLICATE LBL
Two or more LBL instructions exist in the application program with the same number. A
unique number must be allowed for each and label. SP52 will be on and the error code will
11
REFERENCE be stored in V7755.
E423
NESTED LOOPS
Nested loops (programming one FOR/NEXT loop inside of another) are not allowed. SP52
will be on and the error code will be stored in V7755.
12
E431
INVALID ISG/SG An ISG or SG instruction must not be placed after the end statement (such as inside a
subroutine). SP52 will be on and the error code will be stored in V7755.
13
ADDRESS
E432
INVALID JUMP (GOTO) ADDRESS
A LBL that corresponds to a GOTO instruction must not be programmed after the end
statement such as in a subroutine. SP52 will be on and the error code will be stored in
14
V7755.
E433
INVALID SBR A SBR must be programmed after the end statement, not in the main body of the program A
ADDRESS or in an interrupt routine. SP52 will be on and the error code will be stored in V7755.
E434
INVALID RTC A RTC must be programmed after the end statement, not in the main body of the program
B
ADDRESS or in an interrupt routine. SP52 will be on and the error code will be stored in V7755.
E435 A RT must be programmed after the end statement, not in the main body of the program or
C
INVALID RT in an interrupt routine. SP52 will be on and the error code will be stored in V7755.
ADDRESS
E436 An INT must be programmed after the end statement, not in the main body of the program.
D
INVALID INT SP52 will be on and the error code will be stored in V7755.
ADDRESS
E441 An ACON or NCON must be programmed after the end statement, not in the main body of
4 ACON/NCON
E451
the program. SP52 will be on and the error code will be stored in V7755.
MLS instructions must be numbered in ascending order from top to bottom.
BAD MLS/MLR
5 E452
X AS COIL An X data type is being used as a coil output.
E453 A timer or counter contact is being used where the associated timer or counter does not
6 MISSING T/C
E454
exist.
One of the contacts is missing from a TMRA instruction.
BAD TMRA
E455
7 BAD CNT/UDC One of the contacts is missing from a CNT or UDC instruction.
E456 One of the contacts is missing from the SR instruction.
BAD SR
8 E461 More than nine levels of logic have been stored on the stack. Check the use of OR STR and
STACK AND STR instructions.
OVERFLOW
9 E462 An unmatched number of logic levels have been stored on the stack. Insure the number of
STACK AND STR and OR STR instructions match the number of STR instructions.
UNDERFLOW
10 E463
LOGIC ERROR An STR/STRN instruction was not used to begin a rung of ladder logic.
11 E464
MISSING CKT A rung of ladder logic is not terminated properly.
12 E471
DUPLICATE COIL Two or more OUT instructions reference the same I/O point.
REFERENCE
13 E472
DUPLICATE TMR Two or more TMR instructions reference the same number.
REFERENCE
14 E473
DUPLICATE CNT Two or more CNT instructions reference the same number.
REFERENCE
A E480
INVALID CV ADDRESS
The CV instruction is used in a subroutine or program interrupt routine. The CV instruction
may only be used in the main program area (before the END statement).
B E481
CONFLICTING INSTRUCTION An instruction exists between convergence stages.
E482
C MAX. CV INSTRUCTIONS EXCEEDED Number of CV instructions exceeds 17.
E499 Invalid PRINT instruction usage. Quotations and/or spaces were not entered or entered
9
PRINT incorrectly.
INSTRUCTION
E501 An invalid keystroke or series of keystrokes was entered into the handheld programmer.
10
BAD ENTRY
E502
BAD ADDRESS An invalid or out of range address was entered into the handheld programmer. 11
E503
BAD COMMAND An invalid command was entered into the handheld programmer. 12
E504 An invalid value or reference number was entered with an instruction.
BAD REF/VAL 13
E505 An invalid instruction was entered into the handheld programmer.
INVALID INSTRUCTION
E506 An invalid operation was attempted by the handheld programmer.
14
INVALID OPERATION
E520
BAD OP–RUN An operation which is invalid in the RUN mode was attempted by the handheld programmer. A
E521
BAD OP–TRUN
An operation which is invalid in the TEST RUN mode was attempted by the handheld
programmer. B
E523 An operation which is invalid in the TEST PROGRAM mode was attempted by the handheld
BAD OP–TPGM programmer. C
E524 An operation which is invalid in the PROGRAM mode was attempted by the handheld
BAD OP–PGM programmer.
E525 An operation was attempted by the handheld programmer while the DL06 mode switch was
D
MODE SWITCH in a position other than the TERM position.
CPU MODE The operation attempted is not allowed during a Run Time Edit.
3 E540
CPU LOCKED The DL06 has been password locked. To unlock the DL06 use AUX82 with the password.
4 E541
WRONG PASSWORD The password used to unlock the DL06 with AUX82 was incorrect.
E542 The DL06 powered up with an invalid password and reset the password to 00000000. A
5 PASSWORD RESET
E601
password may be re-entered using AUX81.
Attempted to enter an instruction which required more memory than is available in the
MEMORY FULL DL06.
6 E602
INSTRUCTION MISSING A search function was performed and the instruction was not found.
7 E603
DATA MISSING A search function was performed and the data was not found.
E604 A search function was performed and the reference was not found.
8 REFERENCE MISSING
E610
BAD I/O TYPE The application program has referenced an I/O module as the incorrect type of module.
9 E620
OUT OF MEMORY
An attempt to transfer more data between the DL06 and handheld programmer than the
receiving device can hold.
10 E621
EEPROM NOT BLANK
An attempt to write to a non-blank EEPROM in the handheld programmer was made. Erase
the EEPROM and then retry the write.
E622 A data transfer was attempted with no EEPROM (or possibly a faulty EEPROM) installed in
11 NO HPP EEPROM
E623
the handheld programmer.
A function was requested with an EEPROM in the handheld programmer which contains
SYSTEM EEPROM system information only.
12 E624
V-MEMORY ONLY
A function was requested with an EEPROM in the handheld programmer which contains
V-memory data only.
13 E625
PROGRAM ONLY
A function was requested with an EEPROM in the handheld programmer which contains
program data only.
E627 An attempt to write to a faulty EEPROM in the handheld programmer was made. Replace
14 BAD WRITE
E628
the EEPROM if necessary.
B E642
CHECKSUM ERROR
An error was detected while data was being transferred to the handheld programmer’s
EEPROM. Check cabling and retry the operation.
E650 A system error has occurred in the handheld programmer. Power cycle the handheld
C HPP SYSTEM ERROR
E651
programmer. If the error returns replace the handheld programmer.
A ROM error has occurred in the handheld programmer. Power cycle the handheld
HPP ROM ERROR programmer. If the error returns replace the handheld programmer.
D E652
HPP RAM ERROR
A RAM error has occurred in the handheld programmer. Power cycle the handheld
programmer. If the error returns replace the handheld programmer.
Introduction
1 This appendix contains several tables that provide the instruction execution times for DL06
Micro PLCs. Many of the execution times depend on the type of data used with the
2 instruction. Registers may be classified into the following types:
• Data (word) Registers
C • Bit Registers
V-Memory Data Registers
4 Some V-memory locations are considered data registers, such as timer or counter current
values standard user V-memory is classified as a V-memory data register. Note that you can
load a bit pattern into these types of registers, even though their primary use is for data
5 registers. The following locations are data registers:
6 Data Registers
Timer Current Values V0 - V377
DL06
C
D
10 1st 2nd
V: Data Reg. V:Data Reg. 7.6 µs 7.6 µs
V:Bit Reg. 7.6 µs 7.6 µs
11 K:Constant
P:Indir. (Data)
4.8 µs
30.2 µs
4.8 µs
30.2 µs
P:Indir. (Bit) 30.2 µs 30.2 µs
12 V: Bit Reg. V:Data Reg. 7.6 µs 7.6 µs
V:Bit Reg 7.6 µs 7.6 µs
13 K:Constant
P:Indir. (Data)
P:Indir. (Bit)
4.8 µs
30.2 µs
30.2 µs
4.8 µs
30.2 µs
30.2 µs
14 ANDNE
P:Indir. (Data) V:Data Reg.
V:Bit Reg.
29.9 µs
29.9 µs
29.9 µs
29.9 µs
K:Constant 27.4 µs 27.4 µs
A P:Indir. (Data)
P:Indir. (Bit)
51.0 µs
51.0 µs
51.0 µs
51.0 µs
8 1st
T, CT
2nd
V Data Reg 7.6 µs 7.6 µs
V:Bit Reg 7.6 µs 7.6 µs
9 K:Constant
P:Indir. (Data)
4.8 µs
30.2 µs
4.8 µs
30.2 µs
P:Indir. (Bit) 30.2 µs 30.2 µs
10 V Data Reg. V:Data Reg. 7.6 µs 7.6 µs
V:Bit Reg 7.6 µs 7.6 µs
K:Constant 4.8 µs 4.8 µs
11 P:Indir. (Data)
P:Indir. (Bit)
30.2 µs
30.2 µs
30.2 µs
30.2 µs
12
13
14
A
B
C
D
A
B
C
D
1st 2nd 8
TMRAF T V Data Reg. 54.2 µs 7.3 µs
V:Bit Reg 7.3 µs
K:Constant
P:Indir. (Data)
54.2 µs
50.3 µs
81.2 µs
4.6 µs
30.2 µs
9
P:Indir. (Bit) 81.2 µs 30.2 µs
CNT CT V:Data Reg. 25.8 µs 7.3 µs
10
V:Bit Reg 25.8 µs 7.3 µs
K:Constant
P:Indir. (Data)
22.2 µs
53.5 µs
4.6 µs
30.2 µs 11
P:Indir. (Bit) 53.5 µs 30.2 µs
SGCNT CT V:Data Reg.
V:Bit Reg
27.3 µs 7.3 µs
7.3 µs
12
27.3 µs
K:Constant 23.5 µs 4.6 µs
P:Indir. (Data)
P:Indir. (Bit)
54.9 µs
54.9 µs
30.2 µs
30.2 µs
13
UDC CT V:Data Reg
V:Bit Reg
39.8 µs
39.8 µs
7.3 µs
7.3 µs 14
K:Constant 35.4 µs 4.6 µs
P:Indir. (Data) 30.2 µs
P:Indir. (Bit)
67.8 µs
67.8 µs 30.2 µs A
SR C (N points to shift) 17.8 µs + 9.8 µs
0.9 µs x N B
C
D
10 LDX
V:Data Reg.
V:Bit Reg.
10.8 µs
10.8 µs
1.0 µs
1.0 µs
P:Indir. (Data) 45.2 µs 1.0 µs
P:Indir. (Bit) 45.2 µs 1.0 µs
11 V:Data Reg. 9.3 µs 1.0 µs
V:Bit Reg. 9.3 µs 1.0 µs
12 OUT P:Indir. (Data)
P:Indir. (Bit)
35.2 µs
35.2 µs
0.9 µs
0.9 µs
13 OUTD
V:Data Reg.
V:Bit Reg.
10.2 µs
10.2 µs
1.0 µs
1.0 µs
P:Indir. (Data) 35.8 µs 0.9 µs
P:Indir. (Bit) 35.8 µs 0.9 µs
14 1st 2nd
OUTF K:Constant 54 µs+1.0 µsxN 0.9 µs
X, Y, C
A OUTL V:Data Reg.
V:Bit Reg.
13.5 µs
13.5 µs
1.0 µs
1.0 µs
Logical Instructions
1
Logical (Accumulator) nstructions DL06
Instruction Legal Data Types
V:Data Reg.
Execute
7.9 µs
Not Execute
1.0 µs
2
AND V:Bit Reg. 7.9 µs 1.0 µs
P:Indir. (Data)
P:Indir. (Bit)
33.4 µs
33.4 µs
0.9 µs
0.9 µs
C
V:Data Reg. 8.9 µs 1.0 µs
ANDD V:Bit Reg.
K:Constant
8.9 µs
5.7 µs
1.0 µs
1.0 µs
4
P:Indir. (Data) 34.4 µs 0.9 µs
P:Indir. (Bit) 34.4 µs 0.9 µs
1st: X, Y, C, S 5
ANDF T, CT, SP, GX, GY 21.6 µs + 0.9 µs x N 1.0 µs
2nd: K:Constant
ANDS None 10.0 µs 1.0 µs 6
V:Data Reg 8.1 µs 1.0 µs
OR V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
8.1 µs
33.8 µs
33.8 µs
1.0 µs
0.9 µs
0.9 µs
7
V:Data Reg. 9.0 µs 1.0 µs
ORD V:Bit Reg.
K:Constant
9.0 µs
5.8 µs
1.0 µs
1.0 µs
8
P:Indir. (Data) 34.5 µs 0.9 µs
P:Indir. (Bit)
1st: X, Y, C, S
34.5 µs 0.9 µs
9
ORF T, CT, SP, GX, GY 20.9 µs + 1.0 µs
0.9 µs x N
ORS
2nd: K:Constant
None 10.2 µs 1.0 µs
10
V:Data Reg. 8.0 µs 1.0 µs
XOR V:Bit Reg.
P:Indir. (Data)
8.0 µs
33.6 µs
1.0 µs
0.9 µs
11
P:Indir. (Bit) 33.6 µs 0.9 µs
V:Data Reg.
V:Bit Reg.
9.0 µs
9.0 µs
1.0 µs
1.0 µs
12
XORD K:Constant 5.4 µs 1.0 µs
P:Indir. (Data)
P:Indir. (Bit)
34.4 µs
34.4 µs
0.9 µs
0.9 µs 13
1st: X, Y, C, S 20.9 µs +
XORF T, CT, SP, GX, GY
2nd: K:Constant 0.9 µs x N 1.0 µs
14
XORS None 10.1 µs 1.0 µs
V:Data Reg.
V:Bit Reg.
9.4 µs
9.4 µs
1.0 µs
1.0 µs
A
CMP P:Indir. (Data) 34.9 µs 0.9 µs
P:Indir. (Bit)
V:Data Reg.
34.9 µs
9.9 µs
0.9 µs
1.0 µs
B
V:Bit Reg. 9.9 µs 1.0 µs
CMPD K:Constant
P:Indir. (Data)
6.7 µs
35.4 µs
1.0 µs
1.0 µs C
P:Indir. (Bit) 35.4 µs 1.0 µs
Math Instructions
6
Math Instructions (Accumulator) DL06
7 Instruction Legal Data Types Execute Not Execute
V:Data Reg. 78.4 µs 0.9 µs
8 ADD V:Bit Reg.
P:Indir. (Data)
78.4 µs
101.2 µs
0.9 µs
0.9 µs
P:Indir. (Bit) 101.2 µs 0.9 µs
9 V:Data Reg.
V:Bit Reg.
83.3 µs
83.3 µs
0.9 µs
0.9 µs
ADDD K:Constant 67.7 µs 0.9 µs
P:Indir. (Daa) 101.2 µs 0.9 µs
10 P:Indir. (Bit) 101.2 µs 0.9 µs
V:Data Reg. 77.4 µs 0.9 µs
11 SUB V:Bit Reg
P:Indir. (Data)
P:Indir. (Bit)
77.4 µs
95.1 µs
95.1 µs
0.9 µs
0.9 µs
0.9 µs
12 V:Data Reg.
V:Bit Reg.
82.5 µs
82.5 µs
0.9 µs
0.9 µs
SUBD K:Constant 66.0 µs 0.9 µs
P:Indir. (Data) 99.7 µs 0.9 µs
13 P:Indir. (Bit) 99.7 µs 0.9 µs
V:Data Reg. 266.1 µs 0.9 µs
V:Bit Reg. 266.1 µs 0.9 µs
14 MUL K:Constant
P:Indir. (Data)
286.9 µs
290.0 µs
0.9 µs
0.9 µs
P:Indir. (Bit) 290.0 µs 0.9 µs
A V:Data Reg.
V:Bit Reg.
839.1 µs
839.1 µs
0.9 µs
0.9 µs
MULD P:Indir. (Data) 863.1 µs 0.9 µs
B P:Indir. (Bit)
V:Data Reg.
863.1 µs
363.9 µs
0.9 µs
0.9 µs
V:Bit Reg 363.9 µs 0.9 µs
C DIV K:Constant
P:Indir. (Data)
384.4 µs
419.8 µs
0.9 µs
0.9 µs
P:Indir. (Bit) 419.8 µs 0.9 µs
D DIVD
V:Data Reg.
V:Bit Reg.
398.3 µs
398.3 µs
0.9 µs
0.9 µs
P:Indir. (Data) 390.9 µs 0.9 µs
P:Indir. (Bit) 390.9 µs 0.9 µs
V:Data Reg.
V:Bit Reg.
13.2 µs
13.2 µs
1.0 µs
1.0 µs
5
INCB P:Indir. (Data) 38.6 µs 0.9 µs
P:Indir. (Bit) 38.6 µs 0.9 µs 6
V:Data Reg. 13.2 µs 1.0 µs
DECB V:Bit Reg.
P:Indir. (Data)
13.2 µs
38.0 µs
1.0 µs
0.9 µs 7
P:Indir. (Bit) 38.0 µs 0.9 µs
V:Data Reg.
V:Bit Reg.
24.9 µs
24.9 µs
1.0 µs
1.0 µs
8
ADDB K:Constant 23.5 µs 1.0 µs
P:Indir. (Data)
P:Indir. (Bit)
51.1 µs
51.1 µs
1.0 µs
1.0 µs 9
V:Data Reg. 24.4 µs 1.0 µs
ADDBD
V:Bit Reg.
K:Constant
P:Indir. (Data)
24.4 µs
20.7 µs
50.7 µs
1.0 µs
1.0 µs
1.0 µs
10
P:Indir. (Bit) 50.7 µs 1.0 µs
V:Data Reg.
V:Bit Reg.
24.7 µs
24.7 µs
1.0 µs
1.0 µs
11
SUBB K:Constant 23.3 µs 1.0 µs
P:Indir. (Data)
P:Indir. (Bit)
50.6 µs
50.6 µs
1.0 µs
1.0 µs
12
V:Data Reg. 24.2 µs 1.0 µs
SUBBD
V:Bit Reg.
K:Constant
24.2 µs
20.2 µs
1.0 µs
1.0 µs
13
P:Indir. (Data) 50.2 µs 1.0 µs
P:Indir. (Bit) 50.2 µs 1.0 µs
V:Data Reg. 10.8 µs 1.0 µs 14
V:Bit Reg. 10.8 µs 1.0 µs
MULB K:Constant 8.2 µs 1.0 µs
P:Indir. (Data)
P:Indir. (Bit)
37.1 µs
37.1 µs
1.0 µs
1.0 µs
A
V:Data Reg. 28.7 µs 1.0 µs
DIVB
V:Bit Reg.
K:Constant
28.7 µs
26.1 µs
1.0 µs
1.0 µs
B
P:Indir. (Data) 54.9 µs 1.0 µs
P:Indir. (Bit)
V:Data Reg.
54.9 µs
48.1 µs
1.0 µs
1.0 µs
C
V:Bit Reg. 48.1 µs 1.0 µs
ADDR K:Constant
P:Indir. (Data)
41.7 µs
74.3 µs
1.0 µs
1.0 µs D
P:Indir. (Bit) 74.3 µs 1.0 µs
Differential Instructions
1
Differential Instructions DL06
Instruction Legal Data Types Execute Not Execute 2
PD X, Y, C 14.4 µs 14.4 µs
STRPD
STRND
X, Y, C, S, T, CT
X, Y, C, S, T, CT
5.4 µs
7.3 µs
5.4 µs
7.3 µs
C
ORPD X, Y, C, S, T, CT 6.8 µs 5.2 µs
ORND X, Y, C, S, T, CT 7.1 µs 4.9 µs 4
ANDPD X, Y, C, S, T, CT 6.8 µs 5.2 µs
ANDND X, Y, C, S, T, CT 7.1 µs 4.9 µs
5
Bit Instructions
6
Bit Instructions (Accumulator) DL06 7
Instruction Legal Data Types Execute Not Execute
SUM None 6.7 µs 1.0 µs 8
12.1 µs +
V:Data Reg. (N bits) 0.1 x N
SHFR V:Bit Reg. (N bits)
K:Constant (N bits) 8.4 µs +
0.9 µs 9
0.1 x N
12 MOVMC
Move V:Bit Reg to EEPROM
35 µs + 10.4 µs x N 0.9 µs
Move from Date Label to V: Data Reg
13 Move from Data Label to V: Bit Reg
N= #of words
LDLBL K 6.4 µs 1.3 µs
14 V: Data Reg
V:Bit Reg 29.4 µs + 8.0 µs x N 1.0 µs
A FILL K:Constant 26.2 µs + 8.0 µs x N
1.0 µs
P:Indir. (Data) 55.1 µs + 8.0 µs x N
1.0 µs
B P:Indir. (bit)
V: Data Reg (N bits) 66.8 µs 1.0 µs
C FIND V:Bit Reg. (N bits)
K:Constant(N bits)
66.8 µs
64.0 µs
1.0 µs
1.0 µs
RFB
V:Bit Reg
V: Data Reg
66.9 µs
66.8 µs
1.0 µs
1.0 µs
5
V:Bit Reg 66.8 µs 1.0 µs
STT
V: Data Reg
V:Bit Reg
67.8 µs
67.8 µs
1.0 µs
1.0 µs 6
K:Constant 65.0 µs 1.0 µs
V: Data Reg 51.1 µs 1.0 µs
RFT V:Bit Reg 51.1 µs 1.0 µs 7
V: Data Reg 53.5 µs 1.0 µs
ATT V:Bit Reg 53.5 µs 1.0 µs
K:Constant
V: Data Reg
50.8 µs
134.0 µs
1.0 µs
1.0 µs
8
TSHFL V:Bit Reg 134.0 µs 1.0 µs
TSHFR V: Data Reg
V:Bit Reg
133.9 µs
133.9 µs
1.0 µs
1.0 µs
9
ANDMOV V: Data Reg 80.2 µs 1.0 µs
V:Bit Reg
V: Data Reg
80.2 µs
80.4 µs
1.0 µs
1.0 µs
10
ORMOV V:Bit Reg 80.4 µs 1.0 µs
XORMOV V: Data Reg
V:Bit Reg
80.4 µs
80.4 µs
1.0 µs
1.0 µs
11
SWAP V: Data Reg 84.1 µs 1.0 µs
SETBIT
V:Bit Reg
V: Data Reg (N bits)
84.1 µs
59.5 µs
1.0 µs
1.0 µs
12
V:Bit Reg. (N bits) 59.5 µs 1.0 µs
RSTBIT V: Data Reg (N bits)
V:Bit Reg. (N bits)
59.5 µs
59.5 µs
1.0 µs
1.0 µs 13
14
A
B
C
D
8 SBR
RTC
K
None
1.5 µs
25.7 µs
1.5 µs
12.1 µs
RT None 21.2 µs 21.2 µs
9 MLS
MLR
K
K
(1–7) 35.2 µs
(0–7) 30.9 µs
35.2 µs
30.9 µs
10 Interrupt Instructions
11 Interrupt Instructions DL06
Instruction Legal Data Types Execute Not Execute
12 ENI
DISI
None
None
24.2 µs
9.4 µs
2.7 µs
2.3 µs
INT O(0,1) 7.5 µs –
13 IRTC None 0.9 µs 1.3 µs
IRT None 6.6 µs –
14
Network Instructions
A
Network Instructions DL06
B Instruction Legal Data Types
X, Y, C, T, CT, SP, S, $
Execute
852.0 µs
Not Execute
4.4 µs
V:Data Reg. 852.0 µs 4.4 µs
C RX V:Bit Reg.
P:Indir. (Data)
852.0 µs
868.2 µs
4.4 µs
4.2 µs
P:Indir. (Bit) 868.2 µs 4.2 µs
D X, Y, C, T, CT, SP, S, $
V:Data Reg.
1614.0 µs
1614.0 µs
4.4 µs
4.4 µs
WX V:Bit Reg. 1614.0 µs 4.4 µs
P:Indir. (Data) 1630.0 µs 4.4 µs
P:Indir. (Bit) 1630.0 µs 4.4 µs
FAULT
V:Data Reg.
V:Bit Reg.
65.0 µs
65.0 µs
4.4 µs
4.4 µs 6
K:Constant 204.7 µs 4.4 µs
DLBL
NCON
K
K
–
– –
–
7
ACON A – –
PRINT ASCII 631.0 µs 3.6 µs 8
RLLPLUS Instructions
9
RLLplus Instructions DL06 10
Instruction Legal Data Types Execute Not Execute
ISG
SG
S
S
44.0 µs
44.0 µs
41.1 µs
41.1 µs
11
JMP
NJMP
S
S
76.0 µs
77.4 µs
9.3 µs
9.3 µs
12
CV S 42.1 µs 27.5 µs
CVJMP
BCALL
S
C
89.5 µs
22.1 µs
17.6 µs
22.6 µs
13
BLK
BEND
C
None
17.1 µs
8.7 µs
14.6 µs
0.0 µs
14
Drum Instructions A
Drum Instructions DL06 B
Instruction Legal Data Types Execute Not Execute
DRUM CT 840.0 µs 339.6 µs C
EDRUM CT 753.2 µs 357.0 µs
MDRMD
MDRMW
CT
CT
411.3 µs
378.6 µs
216.4 µs
147.0 µs
D
4 MODBUS Instructions
5 Clock / Calender Instructions DL06
Instruction Execute Not Execute
6 MRX Input, Input Register
Coil, Holding Register 120.2 µs 1.3 µs
13
14
A
B
C
D
14
A
B
C
D
System Monitoring
SP36 Override setup relay On when the override function is used. 1
SP37 Scan controller On when the actual scan time runs over the prescribed scan time.
SP40 Critical error On when a critical error such as I/O communication loss has occurred.
2
SP41 Warning On when a non critical error has occurred.
SP42 Diagnostics error On when a diagnostics error or a system error occurs.
3
SP43
SP44
Low battery error
Program memory error
On when the CPU battery voltage is low.
On when a memory error such as a memory parity error has occurred.
D
SP45 I/O error On when an I/O error such as a blown fuse occurs. 5
SP46 Communications error On when a communication error occurs on any of the CPU ports.
SP50 Fault instruction On when a Fault Instruction is executed. 6
SP51 Watch Dog timeout On if the CPU Watch Dog timer times out.
SP52 Grammatical error On if a grammatical error has occurred either while the CPU is running or if the
syntax check is run. V7755 will hold the exact error code.
7
SP53 Solve logic error On if CPU cannot solve the logic.
SP54 Communication error On when RX, WX, instructions are executed with the wrong parameters.
8
SP56 Table instruction overrun On if a table instruction with a pointer is executed and the pointer value is outside the
table boundary. 9
Accumulator Status 10
SP60 Value less than On when the accumulator value is less than the instruction value. 11
SP61 Value equal to On when the accumulator value is equal to the instruction value.
SP62 Greater than On when the accumulator value is greater than the instruction value. 12
SP63 Zero On when the result of the instruction is zero (in the accumulator).
SP64 Half borrow On when the 16 bit subtraction instruction results in a borrow. 13
SP65 Borrow On when the 32 bit subtraction instruction results in a borrow.
SP66 Half carry On when the 16 bit addition instruction results in a carry.
14
SP67 Carry On when the 32 bit addition instruction results in a carry.
SP70 Sign On anytime the value in the accumulator is negative.
A
SP71
SP72
Pointer reference error
Floating point number
On when the V-memory specified by a pointer (P) is not valid.
On anytime the value in the accumulator is a valid floating point number.
B
SP73 Overflow On if overflow occurs in the accumulator when a signed addition or subtraction
results in an incorrect sign bit. C
SP74 Underflow On anytime a floating point math operation results in an underflow error.
SP75 Data error On if a BCD number is expected and a non–BCD number is encountered. D
SP76 Load zero On when any instruction loads a value of zero into the accumulator.
D
Communication Monitoring Relay
5 SP116 CPU port busy Port 2 On when port 2 is the master and sending data.
Communications error
SP117 On when port 2 is the master and has a communication error.
6 Port 2
2 SP571 Current = target value On when the counter current value equals the value in V3713/3712
SP572 Current = target value On when the counter current value equals the value in V3715/3714
3 SP573 Current = target value On when the counter current value equals the value in V3717/3716
SP574 Current = target value On when the counter current value equals the value in V3721/3720
D SP575 Current = target value On when the counter current value equals the value in V3723/3722
SP576 Current = target value On when the counter current value equals the value in V3725/3724
5 SP577 Current = target value On when the counter current value equals the value in V3727/3726
SP600 Current = target value On when the counter current value equals the value in V3731/3730
6 SP601 Current = target value On when the counter current value equals the value in V3733/3732
SP602 Current = target value On when the counter current value equals the value in V3735/3734
7 SP603 Current = target value On when the counter current value equals the value in V3737/3736
SP604 Current = target value On when the counter current value equals the value in V3741/3740
8 SP605 Current = target value On when the counter current value equals the value in V3743/3742
9 SP606 Current = target value On when the counter current value equals the value in V3745/3744
SP607 Current = target value On when the counter current value equals the value in V3747/3746
10 SP610 Current = target value On when the counter current value equals the value in V3751/3750
SP611 Current = target value On when the counter current value equals the value in V3753/3752
11 SP612 Current = target value On when the counter current value equals the value in V3755/3754
SP613 Current = target value On when the counter current value equals the value in V3757/3756
12 SP614 Current = target value On when the counter current value equals the value in V3761/3760
SP615 Current = target value On when the counter current value equals the value in V3763/3762
13 SP616 Current = target value On when the counter current value equals the value in V3765/3764
SP617 Current = target value On when the counter current value equals the value in V3767/3766
14
A
B
C
D
Introduction
1 Built-in Motion Control Solution
2 Many machine control applications require various
types of simple high-speed monitoring and control.
These applications usually involve some type of motion
3 control, or high-speed interrupts for time-critical
events. The DL06 Micro PLC solves this traditionally
4 expensive problem with built-in CPU enhancements.
Let’s take a closer look at the available high-speed I/O
features.
E The available high-speed input features are:
• High Speed Counter (7 kHz max.) with up to 24 counter presets and built-in interrupt subroutine,
6 counts up only, with reset
• Quadrature encoder inputs to measure counts and clockwise or counter clockwise direction (7 kHz
7 max.), counts up or down, with reset
• High-speed interrupt inputs for immediate response to critical or time-sensitive tasks
8 • Pulse catch feature to monitor one input point, having a pulse width as small as 100µs (0.1ms)
• Programmable discrete filtering (both on and off delay up to 99ms) to ensure input signal integrity
9 (this is the default mode for inputs X0–X3)
The available pulse output features are:
10 • Single-axis programmable pulse output (10 kHz max.) with three profile types, including
trapezoidal moves, registration, and velocity control
13 • Only one HSIO feature may be in use at one time. You cannot use a high–speed input feature and
the pulse output at the same time.
14 Specifications
DL06 Part Number Discrete Input Type Discrete Output Type High-Speed Input Pulse Output
A D0–06AA AC AC No No
D0–06AR AC Relay No No
D0–06DA
B D0–06DD1
DC
DC
AC
DC
Yes
Yes
No
Yes
D0–06DD2 DC DC Yes Yes
C D0–06DR DC Relay Yes No
D0–06DD1–D DC DC Yes Yes
D0–06DD2–D
D D0–06DR–D
DC
DC
DC
Relay
Yes
Yes
Yes
No
DL06
3
PLC Output Circuit
Y0, Y1 Y2 - Y17 4
High-Speed
I/O Circuit
CPU
E
X0 - X3 X4 - X23
Input Circuit
6
20 Discrete Inputs
7
The high-speed I/O circuit (HSIO) is dedicated to the first four inputs (X0 – X3) and the
first two outputs (Y0 – Y1). We might think of this as a “CPU helper”. In the default
8
operation (called “Mode 60”) the HSIO circuit just passes through the I/O signals to or from
the CPU, so that all twenty inputs behave equally and all sixteen outputs behave equally. 9
When the CPU is configured in any other HSIO Mode, the HSIO circuit imposes a
specialized function on the portion of inputs and outputs shown. The HSIO circuit operates
independently of the CPU program scan. This provides accurate measurement and capturing of
10
high-speed I/O activity while the CPU is busy with ladder program execution.
Wiring Diagrams for Each HSIO Mode
11
After choosing the appropriate HSIO mode for your application, you’ll need to refer to the
section in this appendix for that specific mode. Each section includes wiring diagrams to help 12
you connect the High-Speed I/O points correctly to field devices. An example of a High
Speed Counter mode diagram is shown below. 13
C0 X1 X3 X4 X6 C2 X11 X13 X14 X16 C4 X21 X23 N.C.
X0 X2 C1 X5 X7 X10 X12 C3 X15 X17 X20 X22 N.C.
TERM
14
PORT1 PORT2 RUN STOP
A
Counter Input Wiring B
Signal
– + Signal Common C
12-24 VDC Supply
D
4 Mode
High Speed I/O Basic Modes
Mode Features
Two 7 kHz counters with 24 presets and reset input, counts up only, cause
E 10 High-Speed Counter interrupt on preset
7 kHz up/down counter with 24 presets and reset, causes interrupt on
preset
6 20 Up/Down Counter
Channel A / Channel B 7 kHz quadrature input, counts up and down
Stepper control – pulse and direction signals, programmable motion
30
7 40
Pulse Output
High-Speed Interrupt
profile (10kHz max.)
Generates an interrupt based on input transition or time
50 Pulse Catch Captures narrow pulses on a selected input
8 60 Filtered Input Rejects narrow pulses on selected inputs
In choosing one of the six high-speed I/O modes, the I/O points listed in the table below
9 operate only as the function listed. If an input point is not specifically used to support a
particular mode, it usually operates as a filtered input by default. Similarly, output points
10 operate normally unless Pulse Output mode is selected.
11
12
13
14
A
B
C
D
4 PLC
Y0 - Y1 Y2 - Y17
CPU
E High-Speed
I/O Circuit
I/O Data
Mode Select
V-Memory
V7633 xxxx
6 X0 - X3 X4 - X23
Input Circuit
7
The contents of V7633 is a 16-bit word, to be entered in binary–coded decimal. The figure
8 below defines what each 4-bit BCD digit of the word represents.
10 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0
0 0 5 0
11
Miscellaneous Setup (BCD) HSIO Mode Setup (BCD)
12 00 = Not Used (default)
10 = Battery Enabled
00 = Not Used
10 = High-Speed Counter
20 = Power-up in RUN 20 = Up/Down Counter
13 30 = Battery Enabled and
Power-up in RUN
30 = Pulse Output
40 = High-Speed Interrupts
50 = Pulse Catch
14 60 = Filtered Inputs (default)
Bits 0 – 7 define the mode number 00, 10.. 60 previously referenced in this appendix. The
A example data “0050” shown selects Mode 50 – Pulse Catch (BCD = 50).
Configuring Inputs X0 – X3
B In addition to configuring V7633 for the HSIO mode, you’ll
need to program the next four locations in certain modes
V-Memory
Mode V7633 xxxx
according to the desired function of input points X0 – X3.
C Other memory locations may require configuring, depending on
X0
X1
V7634
V7635
xxxx
xxxx
the HSIO mode (see the corresponding section for particular X2 V7636 xxxx
D HSIO modes).
X3 V7637 xxxx
Counter 1 Counter 2
I/O data
V-memory
9
Filter Mode Select
CLK Reset CLK Reset V7633 0010
X0 X2 X1 X3 X4 - X23
10
Input Circuit 11
Instead of using X2 and X3 as dedicated reset inputs, you can configure X2 and X3 as normal
12
filtered inputs. In this way, the counter reset must be generated in ladder logic.
13
DL06
PLC
Output Circuit 14
Y0 - Y1 Y2 - Y17
HSIO
I/O data
CPU A
Counter 1 Counter 2 V-memory
CLK Reset CLK Reset Filter Mode Select
V7633 0010 B
X0 X1 X2 - X3
Input Circuit
X4 - X23
C
D
Wiring Diagram
A general wiring diagram for counters/encoders to the DL06 in HSIO Mode 10 is shown
1 below. Many types of pulse-generating devices may be used, such as proximity switches, single-
channel encoders, magnetic or optical sensors, etc. Devices with sinking outputs (NPN open
2 collector) are probably the best choice for interfacing. If the counter sources to the inputs, it
must output 12 to 24 VDC. Note that devices with 5V sourcing outputs will not work with
3 DL06 inputs.
C0
X0
X1
X2
X3
C1
X4
X5
X6
X7
C2 X11 X13 X14 X16 C4 X21 X23 N.C.
X10 X12 C3 X15 X17 X20 X22 N.C.
TERM
E
Counter Input Wiring
6 Signal
– + Signal Common
12 Ground
12-24 VDC Supply
– + Common
13
In the circuit diagram below, an encoder has open-emitter PNP transistor outputs. It sources
14 current to the PLC input point, which sinks the current back to ground. Since the encoder
sources current, no additional power supply is required. However, note that the encoder
A output must be 12 to 24 volts (5V encoder outputs will not work).
Encoder Output
B +12 to 24 VDC
Input
X0 - X3 Input
(sinking)
C Output (sourcing)
Ground Common
D
0 0 1 0
3
For the function of bits 8 - 15,
refer to page 3-6.
HSIO Mode Setup (BCD) 4
10 = High-Speed Counter
Choose the most convenient method of programming V7633 from the following: E
• Include load and out instructions in your ladder program
• DirectSOFT 5’s memory editor or Data View 6
• Use the Handheld Programmer D2–HPP
We recommend using the first method above so that the HSIO setup becomes an integral part of 7
your application program. An example program later in this section shows how to do this.
Presets and Special Relays 8
Presets are used to cause a particular action to occur when the count reaches the preset value.
Refer to the figure below. Each counter features 24 presets, which you can program. Presets
are double word numbers so they occupy two V-memory registers. The user selects the preset
9
values, and the counter continuously compares the current count with the preset. When the
two are equal, a special relay contact is energized and program execution jumps to the 10
interrupt routine.
We recommend using the special relay(s) in the interrupt service routine to cause any immediate action you 11
desire. After the interrupt service routine is complete, the CPU returns to the ladder program, resuming
program execution from the point of interruption. The compare function is ready for the next preset event. 12
X0, up counter clock
Current CPU Scan
X2, external reset
Counter 1
Reset 1 Value
Does =
Input
Update
13
X1, up counter clock Count 1 =
Current
X3, external reset
Counter 2
Reset 2 Value
Preset?
Ladder
Program
INT 14
Counter 2: Preset Data Execution
HSIO
V3710 0000
V3712 0000
1500
2500 Does
= Current
Interrupt
Routine
A
V3632
Counter 0000 Data2000
1: Preset Count 2 =
Instruction Program
V3630
V3634 0000
V3632 0000
V3636
V3634 0000
0000 1000
0000
2500
2000
3175
2500
Preset?
Output
SPxxx B
V3636 0000 3175 Update IRT
4 Event C
Preset = 150
Event C
Preset = 150
(A + B + C)
E Event B Event B (A + B)
Preset = 100 Preset = 100
6
Event A Event A
7 Preset = 50 Preset = 50
9 In the example above, presets are established at 50, 100, and 150. The difference between
absolute and incremental modes is shown. Absolute presets trigger events at the preset values,
10 50, 100, and 150. Incremental presets trigger events at the cumulative totals: 50, 150, and
300.
11
12
13
14
A
B
C
D
OUT
result in accumulator.
Output this address to Preset Table
3
V7630, the location of the
V7630 V2001 V2000 0000 1000
As shown in the table above, each of the “table-end” signals has a different meaning. Use the
10
LDD Kffff instruction to insert the table-end code into the next register pair beyond the
preset table. In the example, four presets are used. The 0000 FFFF in V3641-V3640 indicates 11
the previous preset was the last preset.
LDD
Load 0000 FFFF
Default Preset Table Example
V3631 V3630 0000 1000
12
into accumulator.
Kffff V3633 V3632 0000 2000
OUTD
Output this value to V3635 V3634 0000 2500 13
V3640/V3641, the registers V3637 V3636 0000 3175
V3640 beyond the Preset Table.
V3641 V3640 0000 FFFF 14
In incremental mode, you can choose not to reset the counter or the cumulative total, or you
can choose to reset only the counter, or you can choose to reset the counter and the
cumulative total when the table-end code is read. In the example, FFFF has been placed in
A
V3640 since the last preset was in V3636, and we are using fewer than 24 presets.
NOTE: In absolute mode each successive preset must be greater than the previous preset value. If a preset
B
value is less than a lower-numbered preset value, the CPU cannot compare to that value, since the counter
can only count upwards. C
D
11 17
18
V3671 / V3670
V3673 / V3672
SP560
SP561
17
18
V3751/V3750
V3753/V3752
SP610
SP611
19 V3675 / V3674 SP562 19 V3755/V3754 SP612
12 20
21
V3677 / V3676
V3701 / V3700
SP563
SP564
20
21
V3757/V3756
V3761/V3760
SP613
SP614
13 22
23
V3703 / V3702
V3705 / V3704
SP565
SP566
22
23
V3763/V3762
V3765/V3764
SP615
SP616
24 V3707 / V3706 SP567 24 V3767/V3766 SP617
14 The consecutive addresses shown above for each relay are those assigned by the CPU as
default addresses. The Pointer for the start of Counter 1 addresses is stored by the CPU at
A V7630. V7631 is the pointer for the start of Counter 2 addresses. If you have a conflict of
addresses because of pre-existing code written to these addresses, you can change the default
B block of addresses merely by having your ladder logic place a different pointer value in V7630
for Counter 1 or V7631 for Counter 2. To change the table location, use the LDA and OUT
instructions as shown on the previous page.
C
D
INPUT: 12 - 24V
G
3
LG 0V
AC(L) AC(N) 24V C0
3 - 15mA
Y0
50 - 60Hz
Y1
5
Y2
Y3
C1
6
Y4
Y5
Y6
7
Y7 Y10 Y12
2.0A, 6 - 27V
C2
10 11
C3 Y15 Y17
Y11 Y13 Y14 Y16 N.C.
2.0A
12
PWR: 100-240V
13 14 15 16
50-60Hz 40VA
17 20
D0-06DR
21 22 23
PWR
RUN
CPU
TX1
RX1
TX2
RX2
E
LOGIC
C0 X1
06
K oyo
7
to X0 and X1 Encoder Motor
quadrature pulses
Start lead screw cutter head
8
The timing diagram below shows the duration of each equal relay contact closure. Each 9
contact remains on until the next one closes. All go off when the counter resets.
10
Equal Relays A B C
11
SP540
SP541
12
SP542
13
NOTE: Each successive preset must be two numbers greater than the previous preset value. In the industrial
lathe example, B>A+2 and C>B+2.
14
A
B
C
D
X Input Configuration
The configurable discrete input options for High-Speed Counter Mode are listed in the table
1 below. Input X0 is dedicated for the first counter clock input. Input X1 can be the clock for
the second counter or a filtered input. The section on Mode 60 operation at the end of this
2 appendix describes programming the filter time constants. Inputs X2 and X3 can be
configured as the counter resets, with or without the interrupt option. The interrupt option
allows the reset input (X2 and X3) to cause an interrupt like presets do, but there is no SP
3 relay contact closure (instead, X2 and X3 will be on during the interrupt routine, for 1 scan).
Or finally, X2 and X3 may be left simply as a filtered input.
4 Input Options
Input Configuration Register Function Hex Code Required
E X0 V7634 Counter #1 Clock
0001 (absolute) (default)
0101 (incremental)
6 Counter #2 Clock
0001 (absolute) (default)
0101 (incremental)
X1 V7635 Interrupt 0004
7 Pulse Input 0005
xx06, xx = filter time
Filtered Input 0 - 99 ms (BCD)
8 Counter #1 Reset (no interrupt) 0007* (default)
0207*
0107*
9 X2 V7636
Counter #1 Reset (with interrupt)
Interrupt
0307*
0004
Pulse Input 0005
10 Filtered Input xx06, xx= filter time
0 - 99 ms (BCD)
0007* (default)
11 Counter #2 Reset (no interrupt) 0207*
0107*
Counter #2 Reset (with interrupt) 0307*
12 X3 V7637 Interrupt
Pulse Input
0004
0005
xx06, xx= filter time
13 Filtered Input 0 - 99 ms (BCD)
14 *With the counter reset, you have the option of a normal reset or a faster reset. However, the
fast reset does not recognize changed preset values during program execution. When ‘0007’ or
‘0107’ are set in V7636 or V7637 and preset values are changed during program execution,
A the DL06 recognizes the changed preset values at the time of the reset. When ‘0207’ or ‘0307’
are set in V7636 or V7637 the CPU does not check for changed preset values, so the DL06
B has a faster reset time.
C
D
XX
Preload Input
(or CT176)
Kxxxxxxxx
13
XX
Reset Input Preset Range: 14
1-99999999
A
When the enable input is energized, the up/down counter CT174 will respond to pulses on
X0 and increment. The up/down counter CT176 will respond to pulses on X1 and B
increment. The reset input contact behaves in a logical OR fashion with the physical reset
input. X2 (when selected) resets counter 1. X3 (when selected) resets counter 2. So,the high
speed counter can receive a reset form either the contact(s) on the reset rung in the ladder,
C
OR the external reset X2 or X3, if you have configured X2 or X3 as an external reset.
D
4 Direct SOFT 5
First Scan Only
E SP0
LD
K10
Load constant K10 into the accumulator. This
selects Mode 10 as the HSIO mode.
6 Mode 10 OUT
V7633
Output the constant K10 to V7633, the
location of HSIO Mode select register.
13 OUT
V7637
Output the constant K7 to V7637, the location of
the setup parameter for X3.
14 SP1
UDC CT174 CT174 is the HSIO counter. The first rung’s SP1
always enables the counter. The Preload Input in
SP1 the middle is always off. The third rung’s Reset
A K99999999 input is always off, because we will use the
external reset.
SP1
B
continued on next page
C
D
SP1
3
CT176
SP1
UDC
K99999999
CT176
always enables the counter. The Preload Input in
the middle is always of f. The third rung’s Reset
4
input is always off, because we will use the
external reset.
SP1 E
SP1
LDD
V1174
Load the current count of the HSIO counter in
V1174 and V1175 into the accumulator
6
CMPD
K123456
Use the Compare-double instruction to compare
the double word in the accumulator to the constant
7
K123456.
SP62 Y0
OUT The execution of the above CMPD instruction turns
8
on special relay contact SP62 if the current count
SP1
is greater than the comparison number (K123456).
CMPD
Use the Compare-double instruction to compare
10
K345678 the double word in the accumulator to the constant
SP62 Y1
K345678
11
OUT The execution of the above CMPD instruction turns
on special relay contact SP62 if the current count
is greater than the comparison number (K345678). 12
END END coil marks the end of the main program.
13
14
A
B
C
D
I/O Counter
X3 - Cutter head extended
Device
6 Assignments X4 - Cutter head retracted
Y0 - Lead screw motor
Y1 - Cutter head solenoid
Start
Cutter head Lead screw
7 SP0
Direct SOFT 5
Enable Interrupts before reaching a preset
ENI generates an interrupt. Special Relay SP0 is on
8 SP0
during the first CPU scan.
10 LD
K1
Load the constant required to configure X0 as
the counter clock.
11 OUT
V7634
Output the constant K1 to V7634, the location of
the setup parameter for X0.
13 V7635
LD
setup parameter for X1.
A LD
K1006
Load the constant required to configure X3 as
a filtered input.
B OUT
V7637
Output the constant to V7637, the location of the
setup parameter for X3.
C LDA
O3630
accumulator. This instruction automatically
converts the address into hex.
1
SP0 Load the preset A value into the accumulator .
LDD
Load Presets
K1500
LDD
Load the preset B value into the accumulator . 3
K3780
OUTD
V3632
Output the accumulator contents to the memory
location for preset 2.
4
Load the preset C value into the accumulator .
LDD
K4850 E
OUTD Output the accumulator contents to the memory
V3634 location for preset 3.
SP1 8
UDC CT174 CT174 is the HSIO counter. The first rung’ s SP1
SP1
K99999999
always enables the counter. The preload input in
the middle is off (unused in this example). 9
SP1
X4
RST
Y0
Input X3 energizes when the groove has finished
cutting. So, we retract the cutter head. 12
SET Turn lead screw on again, after cutter head has
retracted. 13
END END coil marks the end of the main program.
Some applications will require a different type of action at each preset. It is possible for the
1 interrupt routine to distinguish one preset event from another, by turning on a unique output
for each equal relay contact SPxxx. We can determine the source of the interrupt by
examining the equal relay contacts individually, as well as X2. The X2 contact will be on
2 (inside the interrupt routine only) if the interrupt was caused by the external reset, X2 input.
3
4
E
6
7
8
9
10
11
12
13
14
A
B
C
D
Select Mode 10
K10
LD
Load the constant required to configure X0 as
the counter clock.
6
K1
OUT
V7634
Output the constant K1 to V7634, the location of
the setup parameter for X0.
7
LD
K1006
Load the constant required to configure X1 as
a filtered input. 8
OUT Output the constant to V7635, the location of the
V7635 setup parameter for X1.
LD
Load the constant required to configure X3 as
a filtered input.
11
K1006
OUT
V7637
Output the constant to V7637, the location of the
setup parameter for X3.
12
C0
SET Set C0 on at powerup to enable counting. 13
C0
C1
UDC CT174 CT174 is the HSIO counter. The first rung’s C0
contact enables the counter. The dummy input is in
14
the middle.
K99999999
C2
A
The third rung’s Reset input is normally off,
SP0
because we will use the external reset. You can
optionally reset the counter value on each powerup
using the SP0 contact.
B
C
continued on next page
D
4 V1174
C1
of the accumulated count for CT76.
7
8
9
10
11
12
13
14
A
B
C
D
7
DL06 Output Circuit
PLC
8 HSIO
Y0 - Y1 Y2 - Y17
CPU
I/O data
9 Phase A
Counter
Phase B Reset Filter Mode Select
V-memory
V7633 0020
X0 X1 X2 X3 X4 - X23
10 Input Circuit
11 For standard up/down counting, input X0 is dedicated to the up counting signal, and input
X1 is dedicated to the down counting signal. The X2 input resets the counter to zero when
12 energized.
13 DL06
PLC
Y0 - Y1
Output Circuit
Y2 - Y17
CPU
14 Counter
HSIO
Filter
I/O data
Mode Select
V-memory
Up Down Reset V7633 0020
A X0 X1 X2 X3 X4 - X23
Input Circuit
B
C
D
Counterclockwise sequence
Phase A
8
Phase B 9
Leading Edge Signal one cycle
K oyo
10
C0
X0
X1
X2
X3
C1
X4
X5
X6
X7
C2 X11 X13 X14 X16 C4 X21 X23 N.C.
X10 X12 C3 X15 X17 X20 X22 N.C. 11
12
B
A
Quadrature Encoder Input
13
14
LOGIC 06
C0
K oyo
B
Reset
6
In the next circuit, an encoder has open-emitter PNP transistor outputs. It sources current to
7 the PLC input point, which sinks the current back to ground. Since the encoder sources
current, no additional power supply is required. However, note that the encoder output must
be 12 to 24 volts (5V encoder outputs will not work).
8 Encoder Output,
(one phase)
9 +12 to 24VDC Phase A or B Input
Input
10 Output (sourcing)
(sinking)
11 Ground Common
12
13
14
A
B
C
D
Choose the most convenient method of programming V7633 from the following:
6
• Include load and out instructions in your ladder program
• DirectSOFT 5’s memory editor
7
• Use the Handheld Programmer D2–HPP
We recommend using the first method above so that the HSIO setup becomes an integral part
8
of your application program. An example program later in this section shows how to do this.
Presets and Special Relays 9
The goal of counting is to cause a particular action to occur when the count reaches a preset
value. Refer to the figure below. Each counter features 24 presets, which you can program. A 10
preset is a number you select and store so that the counter will continuously compare the
current count with the preset. When the two are equal, a special relay contact is energized and
program execution jumps to the interrupt routine.
11
We recommend using the special relay(s) in the interrupt service routine to cause any
immediate action you desire. After the interrupt service routine is complete, the CPU returns
12
to the ladder program, resuming program execution from the point of interruption. The
compare function is ready for the next preset event. 13
CPU Scan
X0, up counter clock
Counter 1
Current
Input
Update
14
X1, down counter clock
Value
Counter 2
Reset 1 Ladder
Program
INT
A
X2, external reset Does = Execution
count HSIO
V-memory Preset Data
V3630 0000 1000
= Preset?
Current
Interrupt
Routine
B
V3632 0000 2000 Instruction Program
V3634 0000
V3636 0000
2500
3175
Output
Update
SPxxx
IRT
C
V3706 0921 0000
D
High Low
X Input Configuration
The configurable discrete input options for High-Speed Counter Mode are listed in the table
1 below. The section on Mode 60 operation at the end of this appendix describes programming
the filter time constants.
2 Mode 20 Up/Down Counter
3 Input
Configuration
Register Function Hex Code Required
0202 (standard, absolute)
4 Up counting
0302 (standard, incremental)
0002 (quadrature, absolute) (default)
X0 V7634
E Phase A
0102 (quadrature, incremental)
1002 (quadrature, absolute) 4x counting*
1102 (quadrature, incremental) 4x counting*
6 X1 V7635 Down counting or Phase B 0000
Counter Reset (no interrupt) 0007** (default)
7 X2 V7636
0207**
Counter Reset (with interrupt) 0107**
0307**
8 Pulse input
Filtered input
0005
xx06 (xx = filter time, 0 - 99ms (BCD)
Pulse input 0005
9 X3 V7637
Filtered input xx06 (xx = filter time, 0 - 99ms (BCD) (default)
10 * With this feature, you can count 4 times more with the same encoder.
11 4x counting 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Normal counting 1 2 3 4
12
Phase A
13
Phase B
14 ** With the counter reset you have the option of a normal reset or a faster reset. However, the fast
reset does not recognize changed preset values during program execution. When ‘0007’ or ‘0107’
A are set in V7636 and preset values are changed during program execution, the DL06 recognizes the
changed preset values at the time of the reset. When ‘0207’ or ‘0307’ are set in V7636 the CPU
B does not check for changed preset values, so the DL06 has a faster reset time.
C
D
7
Counts UP and DOWN Counts UP and DOWN (from X0, X1)
Preload counter by write to value Can use Preload Input to change count
Reset input is internal only Reset may be internal or external 8
The next figure shows the how the HSIO quadrature counter will appear in a ladder program. 9
10
Enable Input UDC CT174
Preload Input
11
Kxxxxxxxx
Reset Input
-8388608
PresettoRange:
8388607
12
1-99999999
When the enable input is energized, the counter will respond to quadrature pulses on X0 and
13
X1, incrementing or decrementing the counter at CT174 – CT175. The reset input contact
behaves in a logical OR fashion with the physical reset input X2. This means the quadrature 14
counter can receive a reset from either the contact(s) on the reset rung in the ladder, OR the
external reset X2. A
B
C
D
3 SP0
LD
Load constant K20 into the accumulator. This selects
Mode 20 as the HSIO mode.
K20
4 OUT
V7633
Output this value to V7633, the location of the HSIO
Mode select register.
6 LD
K107
Load the constant required to configure X2 as an external
reset with interrupt.
7 OUT
V7636
Output the constant to V7636, the location of the setup
register for X2.
8 K2006
OUT
input.
9 LDD
K5000
Load the preset 1 value into the accumulator.
10 OUTD
V3630
Output the accumulator contents to the memory
location for preset 1.
11 K10000
12 LDD
K15000
Load the preset 3 value into the accumulator.
14 OUTD
V3636
Output the accumulator contents to the memory
location for preset 4 (end of preset marker).
A SP1
UDC CT174 CT174 is the HSIO quadrature counter
. The first rung’s SP1
always enables the counter. The dummy input is used by
SP1 the built-in compiler.
B SP1
K18724
D
continued on next page
INT O0
1
SP540 Y0
OUT
Set Y0 to ON when the counter reaches or exceeds
our comparison value while COUNTING UP.
2
SP541 Y1
OUT
Set Y1 to ON when the counter reaches or goes below
our comparison value while COUNTING DOWN. 3
IRT
4
The Load Accumulator instructions have set up the V-memory as required, i.e. 20 in V7633 E
for the mode and 0202 in V7634 to designate the standard up/down with the absolute preset
mode. By placing 0107 in V7636, an external reset for counter CT174 is selected and it will
execute interrupt 0 on the rising edge of the reset. Presets for up/down counting have been
6
stored in memory locations V3630 through V3635. The next even numbered location
following this has FFFF to indicate we have no more presets. 7
8
9
10
11
12
13
14
A
B
C
D
8 LD
K202 Standard counting
Absolute preset mode at X0 and X1
9 OUT
V7634
LD
10 K0
OUT
Must be zero with mode 20
V7635
11 LD
K7
External reset without interrupt (X2)
12 OUT
V7636
13 LD
K1006
Discrete filtered input at (X3) 10 ms.
OUT
14 V7637
SP1
A SP1
UDC CT174 Up/Down counter
Only one counter is used with mode 20. The actual
K500 count (32-bit) is stored in V1175/V1174. When pulses
B SP1
are received at point X1, the value in V1175/V1174
will decrement.
C Actual counts
V1174 K450
Y20
When the pulse count reaches and exceeds 450,
OUT
D the "over 450" light (Y20) will turn on.
OUT
the preset value of 500, the output of the
counter (CT174) goes high and turns on
Over 500 latch the "over 500" light (Y21) and latches C5.
2
C5
SET 3
Over 500 latch
When the count is 500 or greater, the
C5 Y22
OUT
rerouting gate (Y22) turns on and will stay
on for 30 seconds after the count falls
4
below 500.
Counter output
CT174 TMR
E
TIMER 0 OUTPUT
TO
K300
Over 500 latch
6
T0 C5
RST 7
END END coil marks the end of the main program.
8
9
10
11
12
13
14
A
B
C
D
4 SP0
ENI Enable interrupts
LD
K20
E OUT
V7633
Mode 20
6 LD
K2
Quadrature counting
absolute mode at X0 and X1
OUT
7 V7634
LD
K0
Must be zero
8 OUT
V7635
LD
9 K107
OUT
External reset w/interrupt (X2)
V7636
10 LD
K1006 Discrete filtered input at (X3)
10 ms.
11 OUT
V7637
SP0
LDD Presets for up counting.
12 K5000
OUTD
This rung loads the counter's presets.
In this case, the absolute preset
mode has been selected.
V3630
13 LDD
K6000
14 OUTD
V3632
LDD
K7500
A OUTD
V3634
B LDD
K8000
OUTD
C V3636
LDD
KFFFF Tell CPU that there are
D OUTD
V3640
no more presets.
Drilling sequence
RST
Drilling sequence
3
completed completed
(one hole only).
1st preset
(one hole only).
Reversing
4
actual counts. Position Table. Glue injection.
SP1
8
SP1
UDC CT174
K8388607
9
SP1
10
Drilling sequence initiation.
C5
One-shot bit.
C6
11
One-shot bit.
PD
2 Drill turning.
Y21
RST
4 SET
END
6 INT O0
7 SP540
Forwarding
Positioning Table. Y30
OUT
9 SP541
Forwarding
Positioning Table. Y30
OUT
11 SP542 Forwarding
Positioning Table. Y30
OUT
13 SP543
Forwarding
Positioning Table. Y30
OUT
14 Reversing
Positioning
Table.
A Y31
SET
B Position Table
home limit switch
C5
SET
(resets counter to zero). Reversing
C X2
Positioning
Table.
Y31
RSTI
D IRT
10 Direction
Stepper
Motor
11 Y
0 1 2
G
3
LG 0V
AC(L) AC(N) 24V C0
OUTPUT: 6-240V
4
Y0
50 - 60Hz
Y1
5
Y2
Y3
C1
6
Y4
Y5
Y6
7
Y7 Y10 Y12
2.0A, 6 - 27V
C2
10 11
C3 Y15 Y17
Y11 Y13 Y14 Y16 N.C.
2.0A
12
PWR: 100-240V
13 14 15 16
50-60Hz 40VA
17 20
D0-06DR
21 22 23
PWR
RUN
CPU
TX1
RX1
Drive
Amplifier
TX2
X RX2
INPUT: 12 - 24V 3 - 15mA
12 LOGIC
C0 X1
06
K oyo
C NOTE: The pulse output is designed for open loop stepper motor systems. This, plus its minimum velocity of
40 pps make it unsuitable for servo motor control.
Input Circuit
9
10
IMPORTANT NOTE: In Pulse Output Mode, Y0 and Y1 references are redefined or are used differently in 11
two ways. Physical references refer to terminal screws, while logical references refer to I/O references in the
ladder program. Please read the items below to understand this very crucial point.
12
Notice the I/O point assignment and usage in the above diagram:
• X0, X1, X2 and X3 can be filtered inputs or pulse inputs in Pulse Output Mode, and they are 13
available as input contacts to the ladder program.
• X1 behaves as an external interrupt to the pulse generator for automatic/step trapezoidal profiles. In
other profile modes, it can be used as a filtered input or pulse input just like X0 (registration mode
14
configuration shown above).
• References “Y0” and “Y1” are used in two different ways. At the discrete output connector, Y0 and
A
Y1 terminals deliver the pulses to the motion system. The ladder program uses logical references Y0
and Y1 to initiate “Start Profile” and “Load Position Value” HSIO functions in Mode 30. B
Hopefully, the above discussion will explain why some I/O reference names have dual
meanings in Pulse Output Mode. Please read the remainder of this section with care, to
avoid confusion about which actual I/O function is being discussed.
C
D
2
3 Power Input
Signal Common
+24 VDC
- +
Pulse
Direction
4
E G LG 0V Y0 Y2 C1 Y5 Y7 Y10 Y12 C3 Y15 Y17
AC(L) AC(N) 24V C0 Y1 Y3 Y4 Y6 C2 Y11 Y13 Y14 Y16 +V
OUTPUT: Sinking Output 6 - 27V 1.0A PWR: 100-240V 50-60Hz 40VA
6
Interfacing to Drive Inputs
7 The pulse signals from Y0 and Y1 outputs will typically go to drive input circuits as shown
above. It will be helpful to locate equivalent circuit schematics of the drive amplifier. The
8 following diagram shows how to interface to a sourcing drive input circuit.
Y0, Y1 Pulse Output Drive Input
9 +DC Power
Power
Output Input
10 (sinking) + (sourcing)
Common – Ground
11
12
The following circuit shows how to interface to a sinking drive input using a pullup resistor.
13 Please refer to Appendix 2 to learn how to calculate and install R pullup.
Y0, Y1 Pulse Output
14 +DC power
Power
X0 V7634
pulse input
filtered input
0005
xx06, xx = filter time, 0-9 (BCD) (default)
10
pulse input 0005
X1 V7635
filtered input xx06, xx = filter time, 0-99 (BCD) (default) 11
pulse input 0005
X2 V7636
filtered input
pulse input
xx06, xx = filter time, 0-99 (BCD) (default)
0005
12
X3 V7637
filtered input xx06, xx = filter time, 0-99 (BCD) (default)
Logical I/O Functions 13
The following logical I/O references define functions that allow the HSIO to communicate
with the ladder program. 14
Logical I/O/ Functions
Logical I/O Function A
SP104 Profile Complete – the HSIO turns on SP104 to the CPU when the profile completes.
Goes back off when Start Profile (Y0) turns on.
External Interrupt - If the interrupt feature is selected for the Automatic Trapezoidal B
X1 profile or the Step Trapezoidal Profile, the DL06 keeps outputting pulses until X1
turns on. After it is on the unit outputs the pulses that are defined as the Target
position C
Start Profile – the ladder program turns on Y0 to start motion. If turned off before
Y0 the move completes, motion stops. Turning it on again will start another profile,
unless the current position equals the target position.
Preload Position Value – if motion is stopped and Start Profile is off, you can load a
D
Y1 new value in CT174/CT175, and turn on Y1. At that transition, the value in
CT174/CT175 becomes the current position.
0 0 3 0
4
Miscellaneous Setup (BCD) HSIO Mode Setup (BCD)
E 00 = Not Used (default)
10 = Battery Enabled
30 = Pulse Output
20 = Power-up in RUN
6 30 = Battery Enabled and
Power-up in RUN
7
8 Choose the most convenient method of programming V7633 from the following:
• Include load and out instructions in your ladder program
9 • DirectSOFT 5’s memory editor
• Use the Handheld Programmer D2–HPP
10 We recommend using the first method above so that the HSIO setup becomes an integral
part of your application program. An example program later in this section shows how to do
this.
11
Memory Location V3630 (default)
12 Bits 15
0
14
0
13
0
12
0
11 10
0 1
9
1
8
1
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
13 0 7 0 0
B
C
D
* If you select to use interrupt, the DL06 will not start looking for your target count
11 until the interrupt X1 is on.
**To set a negative number, put 8 in the most significant digit. For example: -
8388608 is 88388608 in V3631 and V3632.
12
13 Velocity Control
V-Memory Function Range Units
14 V3630 Velocity Profile 2000 only –
V3631 / 3632 Direction Select 0=CW, 80000000=CCW, Pulses
A V3633 Velocity 4 to 1000 x 10 pps
V3636 Error Code (see end of section) –
B
C
D
800 11
600 Target = 7000 pulses
positioning velocity = 800 Hz
400
Ending velocity =
12
200 Starting velocity =
0 Hz or 40 to 1000 Hz
40 to 1000 Hz
100 ms to 10 secs 100 ms to 10 secs
Time 13
0 pulses 7000 pulses
Acceleration Deceleration 14
The user determines the starting velocity, the acceleration/deceleration times, and the total
number of pulses. The CPU computes the profile from these inputs. A
B
C
D
E 600
2
3 6
7
400
6 200
1
100
Time
7 0 pulses
Acceleration
1000 pulses
Deceleration
6000 pulses 7000 pulses
Define steps 1 through 4 for gradual acceleration to the target velocity and define steps 5
8 through 8 for gradual deceleration from the target velocity. This type of profile is appropriate
for applications involving large stepper motors and/or large inertia loads. It can, however, be
9 used to provide gradual ramping in applications involving smaller motors and loads.
Velocity Control Defined
10 The Velocity Control defines only the direction and speed of motion. There is no target
position specified, so the move can be of indefinite length. Only the first velocity value needs
11 to be defined. The remaining velocity values can be created while motion is in progress.
Arrows in the profile shown indicate velocity changes.
12 Velocity Control Profile
Velocity (Hz)
13 800
600
14 400
A 200
Time
B
C
D
E Time
Start position Target position = 5000
6
The following program will realize the profile drawn above, when executed. The beginning of
7 the program contains all the necessary setup parameters for Pulse Output Mode 30. We only
have to do this once in the program, so we use first-scan contact SP0 to trigger the setup.
8 Direct SOFT 5
1
SP0 Load the constant K4100 which is required to select
LD Automatic Trapzoidal Profile, absolute positioning,
K4100
without interrupt and a target velocity of 1 kHz.
Output this constant to V3630, the location of the Profile
2
Profile / Target OUT
Velocity Select / Starting Velocity setup register .
Target Position
V3630
Load the constant K5000 which selects a target
3
LDD position of 5000 pulses. Don’t forget to use double
K5000
OUTD
word size (8-digit BCD position value).
Output this constant to V3631 and V3632, the location of
4
the Target Position double-word register .
V3631
Starting Velocity LD
Load the constant K4 which is required to select a
starting velocity of 40 Hz (4 x 10 pps).
E
K4
OUT
Output this constant to V3633, the location of the starting
velocity parameter register .
6
V3633
Acceleration LD
Load the constant K20 which is required to select an
acceleration time of 2 seconds (20 x 100 mS).
7
K20
OUT
V3634
Output this constant to V3634, the location of the
acceleration parameter register .
8
Deceleration LD
K40
Load the constant K40 which is required to select a
deceleration time of 4 seconds (40 x 100 mS). 9
OUT
V3635
Output this constant to V3635, the location of the
deceleration parameter register . 10
Start Profile
X3 Y0
OUT
We use a spare filtered input to allow the operator
to start the profile. When the operator turns X3 ON,
then OFF , logical output Y0 starts the profile.
11
Profile Complete
SP 104 Y2
OUT
SP104 is the logical output of the HSIO to indicate
the move is complete. W e use Y2 to energize an
12
annunciator that the profile has finished.
13
Preload Position Value
At any time you can write (preload) a new position into the current position value. This is 14
often done after a home search (see the registration example programs).
A
C0 Load the constant K1000 as the new current position
LDD
K1000
value.
B
Profile / Target Output this constant to V1174/V1175 (CTA174/CTA175). the
OUTD
Velocity V1174
location of the current position value.
C
Y1
PD Turn on Y1 for 1 scan. The off-to-on transition
causes the HSIO to preload the current position
with the value in V1174/V1175.
D
12 Accel
Target Velocity
Decel
Starting
13 Velocity
External Interrupt X1
The time line of signal traces below the profile indicates the order of events. The CPU uses
B logical output Y0 to start the profile. Immediately the HSIO turns off the Profile Complete
signal (SP104), so the ladder program can monitor the move’s completion by sensing the
C signal’s on state.
The Automatic Trapezoidal profile we want to perform is drawn and labeled in the following
figure. It consists of a non-zero starting velocity, and moderate target velocity.
1
Automatic Trapezoidal Profile
Velocity
Target V elocity = 1 kHz
2
Accel = 2 sec Decel = 4 sec 3
Ending Velocity =
Starting
Velocity = 40 Hz
80 Hz 4
Time E
Start position Target position = 5000
6
The following program will realize the profile drawn above, when executed. The first program
rung contains all the necessary setup parameters. We only have to do this once in the
program, so we use first-scan contact SP0 to trigger the setup.
7
DirectSOFT 5
SP0 Load constant K30 into the accumulator. This selects
8
LD Mode 30 as the HSIO mode.
K30
OUT
Output this address to V7630, the location of the pointer
to the Profile Parameter Table.
11
V7630
Select Pulse / LD
K103
Load the constant K103 which is required to select
pulse and direction for physical Y0 and Y1 functions,
12
Direction respectively (Use K3 if your application requires CCW and CW).
OUT
V7632
Output this constant to V7637, configuring the pulse
output type. 13
Filtered Inputs LD
K2006
Load the constant K2006 which is required to select X0 and X1
as a filtered input with a 20 mS filter time constant. 14
Output this constant to V7634, configuring X0.
OUT
V7634 A
Output this constant to V7635, configuring X1.
OUT
V7635
Load the constant K1006 which is required to select X2 and X3 as a
B
LD filtered input with a 10 ms filter time constant.
K1006
Output this constant to V7636, configuring X2.
C
OUT
V7636
OUT
Output this constant to V7637, configuring X3.
D
V7637
1
SP0 Load the constant KF100 which is required to select
LD
2 KF100
Automatic Trapezoidal Profile, relative positioning, with interrupt a
velocity of 1 kHz (Fxxx times 10 pps).
Profile / Target Output this constant to V3630, the location of the Profile
OUT Select / StartingVelocity setup register.
3 Velocity V3630
Load the constant K5000 which selects a target
Target Position LDD position of 5000 pulses. Don’t forget to use double
K5000
4 OUTD
word size (8-digit BCD position value).
Output this constant to V3631 and V3632, the location of
the Target Position double-word register.
V3631
E Starting Velocity LD
Load the constant K4 which is required to select a
starting velocity of 40 Hz (4 x 10 pps).
K4
6 OUT
Output this constant to V3633, the location of the starting
velocity parameter register.
V3633
7 Acceleration LD
K20
Load the constant K20 which is required to select an
acceleration time of 2 seconds (20 x 100 mS).
8 OUT
V3634
Output this constant to V3634, the location of the
acceleration parameter register.
Y0
SET We use an input to allow the operator to start the
13 Profile Complete
profile. X3 is a momentary Start switch. When the
operator turns X3 ON, logical output Y0 starts the
profile.
SP104 Y2
14 OUT SP104 is the logical output of the HSIO to indicate
the move is complete. We use Y2 to energize an
annunciator that the profile has finished. This won’t
C0
A PD
occur until after the interrupt from X1 has occurred
and the profile is complete.
C0 Y0
B RST
C The profile will begin when the start input (X3) is given. Then the motion begins an
indefinite move, which lasts until an external interrupt on X1 occurs. Then the motion
continues on for 5000 more pulses before stopping.
D
Select Pulse /
V7630
Configure the Y0 and Y1
K1006 time constant.
Output this constant to
C
LD pulse outputs for pulse OUT V7630, configuring X2.
Direction K103 V7636
OUT
and direction, respectively.
2 OUT
V3630
(Dxxx times 10 pps). T0 C2
SET CCW delay done.
Starting Velocity The constant K4 selects a
LD
3 K4 starting velocity of 40 Hz
(4 x 10 pps).
CCW past home
Y0
SET Start profile again.
OUT C2 C3 X1
4 V3633 C3
SET CCW past home
The constant K20 selects
Acceleration LD an acceleration time of 2 Load a small
E K20 seconds (20 x 100 mS). LDD
K50 positive position
count (go CW).
OUT
6 Deceleration
V3634
9 C10 C0
LDD
K50
The constant K50 selects
a target position of 50
pulses (CW direction).
C4
TMR
T1
Add a timer to
create a slight
delay before
K5 reversing motor.
10 Target Position OUTD
V3631
Turn on Start Profile,
T1 C5
SET CW delay done.
Y0 searching for either the
11 SET
home limit or the CW limit
(depends on our starting Y0
position). SET Start profile again.
C0
12 SET Set C0 to indicate the CW
home search has begun. Home Limit found, CW search direction
CW Limit found C0 C1 C3 X1 Y0
13 C0 C1 X2 Y0
RST Turn off Start Profile.
C5
RST Turn off Start Profile.
14 LDD
K80000200
The constant –K200
selects a target
position of –200
K0 K0 for our initialized
position.
Y1
C1 PD
B SET
The CW limit has
been reached.
The home search profile will execute specific parts of the program, based on the order of
C detection of the limit switches. Ladder logic sets C0 to initiate a home search in the CW
direction. If the CW limit is encountered, the program searches for home in the CCW
D direction, passes it slightly, and does the final CW search for home. After reaching home, the
last ladder rung preloads the current position to “0”.
600
Accel Step
3
4 5
Step
6
Decel 3
Step Step
2 7
Target position
400
200
Step
1
Step
8 4
Time
Start
Start position E
External Interrupt
(Optional)
Y0
X1
6
SP104
Profile Complete
7
The time line of signal traces below the profile indicates the order of events. The HSIO uses
logical output Y0 as the start input to the HSIO, which starts the profile. Immediately, the
HSIO turns off the Profile Complete signal (SP104), so the ladder program can monitor the
8
progress of the move. Typically, a ladder program will monitor this bit so it knows when to
initiate the next profile move. You can also use the external interrupt (X1). Once the external 9
interrupt feature selected for the profile, the DL06 keeps outputting the pulses until X1 turns
on. Then the DL06 outputs the pulses defined as the target position.
Each acceleration and deceleration slope consists of 4 steps. You can set up the velocity and
10
the distance (number of pulses) of each step. You don’t need to use all 4 steps of each slope.
For instance, if you want to use only 2 steps, just set zero to the velocity and the distance of 11
the 3rd and 4th step. If the acceleration slope and the deceleration slope are identical, you can
just put zero into all the velocity and the distance parameters for the deceleration slope. 12
13
14
A
B
C
D
E LD
Load the constant K3 which is required to select CW
and CCW for physical Y0 and Y1 functions.
Select CW/CCW K3
6 OUT
V7632
Output this constant to V7632, configuring pulse
output type.
7 Filtered Inputs
LD
K2006
Load the constant K2006 which is required to
select X0 as a filtered input with a 20ms filter time
constant.
8 OUT
V7634
Output this constant to V7634, configuring X0.
OUT
V7636 Output this constant to V7636, configuring X2.
12 LD
Load the constant K1006 which is required to
select X3 as a filtered input with a 10ms filter time
K1006
13 OUT
constant.
14 Profile/Target
LD
K8100
Load the constant K8100 which is required to select
trapezoidal profile, relative positioning, without
interrupt and a target velocity of 1kHz.
Velocity
A OUT
V3630
Output this constant to V3630, the location of the
profile select/starting velocity setup register.
Program
Example SP0 Load the constant K20 which is required to select
1
LD the step 1 acceleration velocity of 200 Hz.
K20
Step 1 Acceleration
OUT
Output this constant to V3633, the location of the
2
V3633 step 1 acceleration velocity setup register.
Step 1 Distance
LD
Load the constant K100 which selects the step 1
distance of 100 pulses.
3
K100
OUT
V3634
Output this constant to V3634, the location of
the step 1 distance.
4
Step 2 Acceleration LD
K40
Load the constant K40 which is required to select
the step 2 acceleration velocity of 400 Hz. E
OUT
V3635
Output this constant to V3635, the location of the
step 2 acceleration velocity setup register. 6
Load the constant K200 which selects the step 2
Step 2 Distance LD
K200
distance of 200 pulses.
7
Output this constant to V3636, the location of
OUT
V3636 the step 2 distance.
LD
Load the constant K300 which selects the step 3
10
Step 3 Distance distance of 300 pulses.
K300
OUT
Output this constant to V3640, the location of
the step 3 distance.
11
V3640
Step 4 Acceleration LD
K80
Load the constant K80 which is required to select
the step 4 acceleration velocity of 800 Hz.
12
OUT
V3641
Output this constant to V3641, the location of the
step 4 acceleration velocity setup register.
13
Step 4 Distance LD
K400
Load the constant K400 which selects the step 4
distance of 400 pulses. 14
Output this constant to V3642, the location of
OUT
V3642 the step 4 distance. A
Load the constant K80 which is required to select
LD
Step 5 Deceleration K80
the step 5 deceleration velocity of 800 Hz.
B
Output this constant to V3643 which is required to select
OUT
V3643 the step 5 deceleration velocity of 800 Hz.
C
Continued on next page
D
Step 5 Distance
2 OUT
V3644
Output this constant to V3644, the location of
the step 5 distance.
3 Step 6 Deceleration
LD
K60
the step 6 deceleration velocity of 600 Hz.
8 Step 7 Distance LD
K200
Load the constant K200 which selects the step 7
distance of 200 pulses.
9 OUT
V3650
Output this constant to V3650, the location of
the step 7 distance.
10 Step 8 Deceleration
LD
K20
Load the constant K20 which is required to select
the step 8 deceleration velocity of 200 Hz.
A X0
LDD
K0
Load
value.
Y1
Start Y0
6
Profile 7
Complete SP104
The time line of signal traces below the profile indicates the order of events. Assuming the
8
velocity is set greater than zero, motion begins when the Start input (Y0) energizes. Since
there is no end position target, the profile is considered in progress as long as the Start input 9
remains active. The profile complete logical input to ladder logic (X0) correlates directly to
the Start input status when velocity profiles are in use.
While the Start input is active, the ladder program can command a velocity change by writing
10
a new value to the velocity register (V3633 by default). The full speed range of 40 Hz to 10
kHz is available. Notice from the drawing that there are no acceleration or deceleration ramps 11
between velocity updates. This is how velocity profiling works with the HSIO. However, the
ladder program can command more gradual velocity changes by incrementing or 12
decrementing the velocity value more slowly. A counter or timer can be useful in creating
your own acceleration/deceleration ramps. Unless the load must do a very complex move, it is
easier to let the HSIO function generate the accel/decel ramps by selecting the trapezoidal or
13
registration profiles instead.
Unlike the trapezoidal and registration profiles, you must specify the desired direction of
14
travel with velocity profiles. Load the direction select register (V3631/V3632 by default) with
8000 0000 hex for CCW direction, or 0 for CW direction. A
B
C
D
12 OUT
V7630
Output this address to V7630, the location of the pointer
to the Profile Parameter Table.
13 Select Pulse /
Direction
LD
K103
Load the constant K103 which is required to select
pulse and direction for physical Y0 and Y1 functions,
respectively (Use K3 if your application needs CW and CCW).
Output this constant to V7632, configuring the pulse
14 OUT
V7632
output type.
Profile / Target
Velocity
OUT
V3630
Output this constant to V3630, the location of the Profile
Select setup register.
3
Select Direction LDD
K80000000
Load the constant K80000000 which selects CCW
direction for Velocity Profiles. Don’t forget to use double
word size (8-digit BCD position value).
4
Output this constant to V3631 and V3632, the location of
OUTD
V3631
the Target Position double-word register. E
Set Velocity Load the constant K10 which is required to select an
LD
K10
initial velocity of 100 pps (uses x10 multiplier).
6
Output this constant to V3633, the location of the velocity
OUT
V3633
parameter register. After the program is running, we can
write here again, using discrete input switches. 7
Start Profile
X1 Y0
OUT We use a spare filtered input to allow the operator
8
to start the profile. When the operator turns X1 ON
X2
Go Slow
and leaves it on, logical output Y0 starts the profile.
X3
Go Moderately
Load the constant K200 which is required to select a
11
LD velocity of 2000 pps when the operator closes X3.
K200
X4
Go Fast
LD
Load the constant K600 which is required to select a
13
K600 velocity of 6000 pps when the operator closes X4.
A
B
C
D
4. Wiring – Verify the wiring to the stepper motor is correct. Remember the signal ground
connection from the PLC to the motion system is required.
5. Motion system – Verify that the drive is powered and enabled. To verify the motion system is 1
working, you can use Mode 60 operation (normal PLC inputs/outputs) as shown in the test
program below. With it, you can manually control Y0 and Y1 with X0 and X1, respectively. Using
an input simulator is ideal for this type of manual debugging. With the switches you can single-
2
step the motor in either direction. If the motor will not move with this simple control, Mode 30
operation will not be possible until the problem with the motor drive system or wiring is corrected. 3
Direct SOFT 5
SP0
LD
K60
Load constant K60 into the accumulator. This
selects Mode 60 as the HSIO mode. 4
Mode 60 OUT
V7633
Output the constant to V7633, the location of the
HSIO Mode select register. E
Load the constant K1006 which is required to configure
Filtered Inputs LD
K1006
filtered inputs with a time constant of 10 mS.
6
Output this constant to V7634, configuring X0.
OUT
V7634 7
Output this constant to V7635, configuring X1.
OUT
V7635
X0 Y0
10
OUT Use a switch on X0 input to manually control output Y0.
X1 Y1 11
OUT Use a switch on X1 input to manually control output Y1.
7 DL06
PLC
Output Circuit
Y0, Y1 Y2 -Y17
8 HSIO I/O data CPU
Interrupt Interrupt
9 Interrupt
or
Filter
Mode select
V-memory
V7633 0040
Input Circuit
11
12 Alternately, you may configure the HSIO circuit to generate interrupts based on a timer, as
shown below. In this configuration, inputs X0 is a filtered input.
13
DL06 Output Circuit
14 PLC
Y0, Y1 Y2 - Y17
HSIO
A Interrupt
I/O data
Interrupt
CPU
Timer Interrupt V-memory
or Mode select
B Filter Filter V7633 0040
Ladder INT A
X0, External Interrupt Program
Execution
Interrupt
Routine
B
TIMER Current Program
Interrupt source /
Instruction
IRT
C
Time select Input
V7634 xxx4
Update
D
X1-X3, External Interrupts
Time
E Timed Interrupt Parameters
When the timed interrupt is selected, the HSIO generates the interrupt to ladder logic. There
6 is no interrupt “pulse width” in this case, but the interrupt period can be adjusted from 5 to
999 ms.
7 5 ms to 999 ms
Timed
8 Interrupt
Time
C If you are only using one of the points for an interrupt, you may want to select a different main
mode (i.e. 10, 20, 30, 50, or 60); and then, just configure one of the terminals not taken as an
D interrupt. For example, you might want to configure your CPU for the UP counter mode (Mode
10) and use point 03 for a high speed interrupt. You should read the individual sections for any
alternate mode you might choose. There you will find instructions on how to select a high speed
interrupt as a secondary feature.
OUT
Output this constant to V7634, configuring the
E
external interrupt option for X0.
V7634
OUT
V7635
Output this constant to V7635, configuring the
external interrupt option for X1.
6
Filtered Inputs LD
K1006
Load the constant K1006 which is required to select
filtered inputs with a 10 mS filter time constant. 7
Output this constant to V7636, configuring X2.
OUT
V7636 8
Output this constant to V7637, configuring X3.
OUT
V7637
Y5
9
RST Reset output Y5.
Y6
RST Reset output Y6.
10
INT Enable ENI Enable Interrupts at the beginning of the program.
Interrupt Routine
service routine program.
13
Insert interrupt service routine rungs here for your
application.
SP1 Y5
SETI Set output Y5
14
IRT Return to the main ladder program. A
INT O1
Interrupt Routine Insert interrupt service routine rungs here for your
B
application.
SP1 Y6
SETI Set output Y6.
C
IRT Return to the main ladder program. D
3 Inputs X0, X1, X2, and X3, are configured as filtered inputs with a 10 ms time constant.
Time
Note that X0 uses the time constant from X1. The program is otherwise generic, and may be
4 adapted to your application.
Direct SOFT5
E SP0
LD
Load constant K40 into the accumulator. This
selects Mode 40 as the HSIO mode.
K40
6 Mode 40 OUT
V7633
Output this constant to V7633, the location of the
HSIO Mode select register.
7 Timed Interrupt
LD
K1004
the timed interrrupt option, with a period of 100 mS.
9 OUT
V7635
Output this constant to V7635, configuring X1 and X0.
12 Main Program
Insert Main Program rungs here for your application.
B OUT
V2000
Output the result into memory location V2000.
D NOTE: X0 cann ot be used in the main program logic; however, using X0 to set C10, for instance, will
allow the use of C10 in the main program logic. Do not forget to reset C10.
Latch Latch
or V-memory
9
Filter Mode select
Set Reset V7633 0050
10
X0 scan X1, X2, X3 X4 - X23
Input Circuit 11
Pulse Catch Timing Parameters 12
Signal pulses at X0 - X3 must meet certain timing criteria to guarantee a pulse capture will
result. Refer to the timing diagram below. The input characteristics of X0 are fixed (it is not a 13
programmable filtered input). The minimum pulse width is 0.1 ms. There must be some
delay before the next pulse arrives, such that the pulse period cannot be smaller than 0.5 ms.
If the pulse period is smaller than 0.5 ms, the next pulse will be considered part of the current
14
pulse.
0.5 ms minimum
A
0.1 ms minimum B
Pulse
Input X0
Time
C
NOTE: The pulse catch and filtered input functions are opposite in nature. The pulse catch feature seeks to D
capture narrow pulses, while the filter input feature seeks to reject narrow pulses.
4 X0
SP100
E
Input Status Relay
6 X0 SP100
X1 SP101
7 X2
X3
SP102
SP103
8 The status relay for X0 is SP100. The other status relays are shown in the table below.
X Input Configuration
The configurable discrete input options for Pulse Catch Mode are listed in the table below.
Each input has its own configuration register and filter time constant. 1
Input
X0
Configuration Register
V7634
Function
Pulse Catch Input
Hex Code Required
0005 (default)
2
Interrupt 0004
X1 V7635 Pulse Catch Input 0005 (default) 3
Filtered Input xx06 (xx = filter time) 0 - 99 ms (BCD)
X2 V7636
Interrupt
Pulse Catch Input
0004
0005 (default)
4
Filtered Input xx06 (xx = filter time) 0 - 99 ms (BCD)
Interrupt 0004 E
X3 V7637 Pulse Catch Input 0005 (default)
Filtered Input xx06 (xx = filter time) 0 - 99 ms (BCD) 6
7
8
9
10
11
12
13
14
A
B
C
D
3 SP0
LD
Load constant K50 into the accumulator. This
selects Mode 50 as the HSIO mode.
K50
4 Mode 50 OUT
V7633
Output this constant to V7633, the location of the
HSIO Mode select register.
E Pulse Catch LD
K5
Load the constant K5 which is required to configure X0
as the pulse catch input.
6 OUT
V7634
Output this constant to V7634, configuring the pulse
catch option for X0.
12 SP100 Y0
SET Use the pulse catch input to set output Y0 on. This will
work even for a very short pulse on X0.
13 SP101 Y1
SET Use the pulse catch input to set output Y1 on. This will
work even for a very short pulse on X1.
A
B
C
D
FILTERS
I/O data
X0-X3
9
V-memory
Mode select
V7633 0060 10
X0 X1 X2 X3
Input Circuit
X4-X23
11
12
Input Filter Timing Parameters
Signal pulses at inputs X0 – X3 are filtered by using a delay time. In the figure below, the
input pulse on the top line is longer than the filter time. The resultant logical input to ladder
13
is phase-shifted (delayed) by the filter time on both rising and falling edges. In the bottom
waveforms, the physical input pulse width is smaller than the filter time. In this case, the 14
logical input to the ladder program remains in the OFF state (input pulse was filtered out).
A
Filter Time Filter Time
Physical Input X0 B
Logical Input X0
C
Time
Physical Input X0 D
Logical Input X0
3 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0
0 0 6 0
4
Miscellaneous Setup (BCD) HSIO Mode Setup (BCD)
E 00 = Not Used (default) 60 = Filtered Inputs
10 = Battery Enabled
20 = Power-up in RUN
6 30 = Battery Enabled and
Power-up in RUN
7 Choose the most convenient method of programming V7633 from the following:
• Include load and out instructions in your ladder program
8 • DirectSOFT 5’s memory editor
• Use the Handheld Programmer D2–HPP
9 We recommend using the first method above so that the HSIO setup becomes an integral
part of your application program. An example program later in this section shows how to to
10 this.
X Input Configuration
11 The configurable discrete input options for Discrete Filtered Inputs Mode are listed in the
table below. The filter time constant (delay) is programmable from 0 to 99 mS (the input acts
as a normal discrete input when the time constant is set to 0). The code for this selection
12 occupies the upper byte of the configuration register in BCD. We combine this number with
the required “06” in the lower byte to get “xx06”, where xx = 0 to 99. Input X0, X1, X2, and
13 X3 can only be filtered inputs. Each input has its own configuration register and filter time
constant.
14
Input Configuration Register Function Hex Code Required
A X0
X1
V7634
V7635
Filtered Input
Filtered Input
xx06 (xx = filter delay time) 0 - 99 ms (BCD) (default)
xx06 (xx = filter delay time) 0 - 99 ms (BCD) (default)
X2 V7636 Filtered Input xx06 (xx = filter delay time) 0 - 99 ms (BCD) (default)
B X3 V7637 Filtered Input xx06 (xx = filter delay time) 0 - 99 ms (BCD) (default)
C
D
SP0
LD
K60
Load constant K60 into the accumulator. This
selects Mode 60 as the HSIO mode.
3
Mode 60 OUT
V7633
Output the constant to V7633, the location of the
HSIO Mode select register. 4
Filtered Inputs LD
K1006
Load the constant K1006 which is required to configure
filtered inputs with a 10 ms filter time constant. E
Output this constant to V7634, configuring X0.
OUT
V7634 6
Load the constant K2006 which is required to select
LD
K2006
filtered inputs with a 20 ms filter time constant.
7
Output this constant to V7635, configuring X1.
OUT
V7635
Load the constant K5006 which is required to select
8
LD filtered inputs with a 50 ms filter time constant.
K5006
OUT
Output this constant to V7636, configuring X2.
9
V7636
LD
Load the constant K7006 which is required to select
filtered inputs with a 70 ms filter time constant.
10
K7006
OUT
V7637
Output this constant to V7637, configuring X3. 11
Main Program Insert Main Program rungs here for your application. 12
END END coil marks the end of the main program..
13
14
A
B
C
D
7
H
9
10
11
12
13
14
A
B
C
D
Introduction
1 As almost anyone who uses a computer is somewhat aware, the actual operations of a
computer are done with a binary number system. Traditionally, the two possible states for a
2 binary system are represented by the digits for "zero" (0) and "one" (1) although "off" and
"on" or sometimes "no" and yes" are closer to what is actually involved. Most of the time a
typical PC user has no need to think about this aspect of computers, but every now and then
3 one gets confronted with the underlying nature of the binary system.
A PLC user, specifically the PLC programmer, should be familiar with the binary system.
4 This appendix will provide an explaination of the numbering systems most commonly used
by a PLC.
E Binary Numbering System
6 Computers, includeing PLCs, use the Base 2 numbering system, which is called Binary and
often called Decimal. Like in a computer there are only two valid digits a PLC relys on, zero
and one, or off and on respectively. You would think that it would be hard to have a
7 numbering system built on Base 2 with only two possible values, but the secret is by encoding
using several digits.
H Each digit in the base 2 system when referenced by a computer is called a bit. When four bits
are grouped together, they form what is known as a nibble. Eight bits or two nibbles would
I be a byte. Sixteen bits or two bytes would be a word (Table 1). Thirty-two bits or two words
is a double word.
10 Byte
Word
Byte
Nibble Nibble Nibble Nibble
11 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 1
12
Binary is not “natural” for us to use since we grow up using the base 10 system. Base 10 uses
13 the numbers 0-9, as we are all well aware. From now on, the different bases will be shown as a
subscripted number following the number. Example; 10 decimal would be 10 . 10
14 Table 2 shows how base 2 numbers relate to their decimal equivalents.
3 0
A nibble of 1001 would be equal to a decimal number 9 (1*2 + 1*2 or 8 + 1 ). A byte of
2 10 10
A 7
11010101 would be equal to 213 (1*2 + 1*2 +1*2 + 1*2 +1*2 or 128 + 64 + 16 +
4 + 1 ).
2
6 4 2 0
10 10 10
10 10
B Bit # 15 14
Binary/Decimal Bit Pattern
13 12 11 10 9 8 7 6 5 4 3 2 1 0
Power 215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20
C
16384
32678
Decimal
4096
1024
2048
8192
512
256
128
64
32
16
1
2
4
8
Bit Value
D Max Value 6553510
Table 2
Note that “10” and “11” in hex are not the same as “10” and “11” in decimal. Only the first
10
ten numbers 0-9 are the same in the two representations. For example, consider the hex
number “D8AF”. To evaluate this hex number use the same method used to write decimal 11
numbers. Each digit in a decimal number represents a multiple of a power of ten (base 10).
Powers of ten increase from right to left. For example, the decimal number 365 means 3x102
+ 6x10 + 5. In hex each digit represents a multiple of a power of sixteen (base 16). Therefore,
12
the hex number D8AF translated to decimal means 13x163 + 8x162 + 10x16 + 15 = 55471.
However, going through the arithmetic for hex numbers in order to evaluate them is not 13
really necessay. The easier way is to use the calculator that comes as an accessory in Windows.
It can convert between decimal and hex when in “Scientific” view. 14
Note that a hex number such as “365” is not the same as the decimal number “365”. Its
actual value in decimal terms is 3x162 + 6x16 + 5 = 869. To avoid confusion, hex numbers are A
often labeled or tagged so that their meaning is clear. One method of tagging hex numbers is
to append a lower case “h” at the end. Another method of labeling is to precede the number
with 0x. Thus, the hex number “D8AF” can also be written “D8AFh”, where the lower case B
“h” at the end is just a label to make sure we know that it is a hex number. Also, D8AF can be
written with a labeling prefix as “0xD8AF”. C
D
3 Octal
0
Decimal
0
Octal
20
Decimal
16
1 1 21 17
4 2 2 22 18
3 3 23 19
E 4
5
4
5
24
25
20
21
6 6 26 22
6 7 7 27 23
10 8 30 24
7 11
12
9
10
31
32
25
26
13 11 33 27
H 14 12 34 28
15 13 35 29
I 16
17
14
15
36
37
30
31
Table 4
10
This follows the DirectLOGIC PLCs. Refer to Chapter 3 bit maps and notice that the
11 memory addresses are numbered in octal, as well as each bit. The octal system is much like
counting in the decimal system without the digits 8 and 9 being available.
12 The general format for four digits of the octal number is:
(d x 80) + (d x 81) + (d x 82) + (d x 83)
13 where “d” means digit. This is the same format used in the binary, decimal, or hexadecimal
systems except that the base number for octal is 8.
Using the powers of expansion, the example below shows octal 4730 converted to decimal.
14
positional
A value 512
4
64
7 3
8
0
1
B 0 x 80 = 0 x 1= 0
1
3x8 =3x 8= 24
C 7 x 82 = 7 x 64 = 448
4 x 83 = 4 x 512 = 2048
D 2520 decimal
equivalent
Bit Value
Max Value
8 4
9
2 1 8 4
9
2 1 8 4
9
2 1 8 4
9
2 1
E
Table 5
6
One plus for BCD is that it reads like a decimal number, for example, 867 in BCD would be
expressed the same as 867 decimal. No conversion is needed; however, within the PLC, BCD
calculations can be performed if numbers are adjusted to BCD after normal binary
7
arithmetic.
H
Real (Floating Point) Numbering System
The terms Real and floating-point both describe IEEE-754 floating point arithmetic. This I
standard specifies how single precision (32 bit) and double precision (64 bit) floating point
numbers are to be represented as well as how arithmetic should be carried out on them. 10
Real (Floating Point 32) Bit Pattern
Bit # 31 30
Sign
29 28 27 26
Exponent
25 24 23 22 21 20 19 18
Mantissa
17 16 11
Bit # 15 14 13 12 11 10 9 8 7 6 5
Mantissa (continues from above)
4 3 2 1 0
12
Table 6
Most PLCs use the 32-bit format for floating point (or Real) numbers.
13
Floating point numbers which DirectLOGIC PLCs use have three basic components: sign,
exponent and mantissa. The 32 bit word required for the IEEE standard floating point
14
numbers is shown in Table 6. It is represented as a number from 0 to 31, left to right. The
first bit (31) is the sign bit, the next eight bits (30-23) are the exponent bits and the final 23 A
bits (22-0) are the fraction bits. In summary:
The sign bit is either “0” for positive or “1” for negative; B
The exponent uses base 2;
The first bit of the mantissa is typically assumed to be “1.fff ”, where “f ” is the field of
fraction bits.
C
The Internet can provide a more indepth explaination of the floating point numbering
system. One website to look at is:
D
http://www.psc.edu/general/software/packages/ieee/ieee.html
BCD/Binary/Decimal/Hex/Octal -
1 What is the Difference?
Sometimes there is confusion about the differences between the data types used in a PLC.
2 The PLC’s native data format is BCD, while the I/O numbering system is octal. Other
numbering formats used are binary and Real. Although data is stored in the same manner (0’s
3 and 1’s), there are differences in the way that the PLC interprets it.
While all of the formats rely on the base 2 numbering system and bit-coded data, the format
4 of the data is dissimilar. Table 7 below shows the bit patterns and values for various formats.
2048
4096
1024
8192
1024
4096
2048
Decimal
8192
512
256
128
512
256
128
64
6
32
16
64
32
16
11
22
44
88
Bit Value
Max Value 65535
7 Bit # 15 14 13 12 11 10
Hexadecimal Bit Pattern
9 8 7 6 5 4 3 2 1 0
Decimal
H Bit Value 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1
Max Value F F F F
I Bit # 15 14 13 12 11 10
BCD Bit Pattern
9 8 7 6 5 4 3 2 1 0
Decimal 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1
10 Bit Value
Max Value 9 9 9 9
11 Bit # 15 14 13 12 11 10
Octal Bit Pattern
9 8 7 6 5 4 3 2 1 0
Bit Value 1 4 2 1 4 2 1 4 2 1 4 2 1 4 2 1
12 Max Value 1 7 7 7 7 7
Real (Floating Point 32) Bit Pattern
13 Bit # 31 30
Sign
29 28 27 26
Exponent
25 24 23 22 21 20 19 18
Mantissa
17 16
14 Bit # 15 14 13 12 11 10 9 8 7 6 5
Mantissa (continued from above)
4 3 2 1 0
A Table 7
As seen in Table 7, the BCD and hexadecimal formats are similar, although the maximum
B number for each grouping is different (9 for BCD and F for hexadecimal). This allows both
formats to use the same display method. The unfortunate side effect is that unless the data
type is documented, it’s difficult to know what the data type is unless it contains the letters
C A-F.
4 Bit # 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MSB LSB
E Table 10
There are two ways to encode a negative number: two’s complement and Magnitude Plus
sign. The two methods are not compatible.
6 The simplest method to represent a negative number is to use one bit of the PLC word as the
sign of a number while the remainder of the word gives its magnitude. It is general
7 convention to use the most significant bit (MSD) as the sign bit: a 1 will indicate a negative,
and a 0 a positive number. Thus, a 16 bit word allows numbers in the range ±32767. Table 12
H shows a representations of 100 and a representation of -100 in this format.
Table 11
11 Two’s complement is a bit more complicated. Without getting involved with a full
explanation, a simple formula for two’s complement is to invert the binary and add one (see
12 Table 12). Basically, 1’s are being changed to 0’s and all 0’s are being changed to 1.
13 Decimal
Two’s Compliment
Binary
100 0000 0000 0110 0100
14 -100 1111 1111 1001 1100
Table 12
A More information about 2’s complement can be found on the Internet at the following
websites:
B http://www.evergreen.edu/biophysics/technotes/program/2s_comp.htm
C
D
This area of certification and approval is absolutely vital to anyone who wants to do business
4 in Europe. One of the key tasks that faced the EU member countries and the European
Economic Area (EEA) was the requirement to bring several similar yet distinct standards
5 together into one common standard for all members. The primary purpose of a single
standard was to make it easier to sell and transport goods between the various countries and
to maintain a safe working and living environment. The Directives that resulted from this
H merging of standards are now legal requirements for doing business in Europe. Products that
meet these Directives are required to have a CE mark to signify compliance.
7 Member Countries
As of January 1, 2007, the members of the EU are Austria, Belgium, Bulgaria, Cyprus, Czech
10 Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,
Latvia, Lithonia, Luxembourg, Malta, Netherlands, Poland, Portugal, Romania, Slovakia,
9 Slovenia, Spain, Sweden, and United Kingdom. Iceland, Liechtenstein, and Norway together
with the EU members make up the European Economic Area (EEA) and all are covered by
the Directives.
10 Applicable Directives
There are several Directives that apply to our products. Directives may be amended, or added,
J as required.
• Electromagnetic Compatibility Directive (EMC) — this Directive attempts to ensure that devices,
12 equipment, and systems have the ability to function satisfactorily in an electromagnetic
environment without introducing intolerable electromagnetic disturbance to anything in that
13 environment.
• Machinery Safety Directive — this Directive covers the safety aspects of the equipment,
installation, etc. There are several areas involved, including testing standards covering both electrical
14 noise immunity and noise generation.
• Low Voltage Directive — this Directive is also safety related and covers electrical equipment that
A has voltage ranges of 50–1000VAC and/or 75–1500VDC.
• Battery Directive — this Directive covers the production, recycling, and disposal of batteries.
B Compliance
Certain standards within each Directive already require mandatory compliance. The EMC
C Directive, which has gained the most attention, became mandatory as of January 1, 1996.
The Low Voltage Directive became mandatory as of January 1, 1997.
D Ultimately, we are all responsible for our various pieces of the puzzle. As manufacturers, we
must test our products and document any test results and/or installation procedures that are
necessary to comply with the Directives. As a machine builder, you are responsible for
installing the products in a manner which will ensure compliance is maintained. You are also
responsible for testing any combinations of products that may (or may not) comply with the
Directives when used together. The end user of the products must comply with any Directives 1
that may cover maintenance, disposal, etc. of equipment or various components. Although we
strive to provide the best assistance available, it is impossible for us to test all possible configurations
of our products with respect to any specific Directive. Because of this, it is ultimately your
2
responsibility to ensure that your machinery (as a whole) complies with these Directives and to keep
up with applicable Directives and/or practices that are required for compliance. 3
As of January 1, 1999, the DL05, DL06, DL205, DL305, and DL405 PLC systems
manufactured by Koyo Electronics Industries or FACTS Engineering, when properly installed 4
and used, conform to the Electromagnetic Compatibility (EMC), Low Voltage Directive, and
Machinery Directive requirements of the following standards.
• EMC Directive Standards Relevant to PLCs
5
EN50081–1 Generic emission standard for residential, commercial, and light industry
EN50081–2 Generic emission standard for industrial environment. H
EN50082–1 Generic immunity standard for residential, commercial, and light industry
EN50082–2 Generic immunity standard for industrial environment.
• Low Voltage Directive Standards Applicable to PLCs
7
EN61010–1 Safety requirements for electrical equipment for measurement, control, and laboratory
use. 10
• Product Specific Standard for PLCs
EN61131–2 Programmable controllers, equipment requirements and tests. This standard replaces
the above generic standards for immunity and safety. However, the generic emissions standards must
9
still be used in conjunction with the following standards:
-EN 61000-3-2 Harmonics 10
-EN 61000-3-2 Fluctuations
• Warning on Electrostatic Discharge (ESD)
We recommend that all personnel take necessay precautions to avoid the risk of transferring
J
static charges to inside the control cabinet, and clear warnings and instructions should be
provided on the cabinet exterior. Such precautions may include, the use of earth straps, simila 12
devices or the powering off of the equipment inside the enclosure before the door is opened.
• Warning on Radio Interference (RFI)
This is a class A product. In a domestic environment this product may cause radio
13
interference in which case the user may be required to take adequate measures.
General Safety
14
• External switches, circuit breaker or external fusing, are required for thes devices.
• The switch or circuit breaker should be mounted near the PLC equipment.
A
AutomationDirect is currently in the process of changing their testing procedures from the
generic standards to the product specific standards. B
C
D
AC Mains Filters
The DL305 AC powered base power
supplies require extra mains filtering to 1
comply with the EMC Directive on Schaf fner
conducted RF emissions. All PLC
equipment has been tested with filters
Filter
FN2010
2
from Schaffner, which reduce emissions
levels if the filters are properly grounded 3
(earth ground). A filter with a current To AC
rating suitable to supply all PLC power Transient
Input
Circuitry 4
supplies and AC input modules should be Suppressor
selected. We suggest the FN2080 for
DL305 systems. Earth
Fused
Terminals
5
Terminal
L N H
NOTE: Very few mains filters can reduce problem emissions to negligible levels. In some cases, filters may 7
increase conducted emissions if not properly matched to the problem emissions.
Equi–potential Grounding
1
2
3
4
Serial Communication Cable
Key Equi-potential Bond
5 Adequate site earth grounding must be provided for equipment containing modern electronic
circuitry. The use of isolated earth electrodes for electronic systems is forbidden in some
H countries. Make sure you check any requirements for your particular destination. IEC
1000–5–2 covers equi-potential bonding of earth grids adequately, but special attention
7 should be given to apparatus and control cubicles that contain I/O devices, remote I/O racks,
or have inter-system communications with the primary PLC system enclosure. An equi-
potential bond wire must be provided alongside all serial communications cables, and to any
10 separate items of the plant which contain I/O devices connected to the PLC. The diagram
shows an example of four physical locations connected by a communications cable.
9 Communications and Shielded Cables
Conductive
10 Screened
Cable
Adapter
Serial
J I/O
12 To Earth
Block
13 Equi-potential
Bond
14
Control Cubicle
A Good quality 24 AWG minimum twisted-pair shielded cables, with overall foil and braid
shields are recommended for analog cabling and communications cabling outside of the PLC
B enclosure. To date it has been a common practice to only provide an earth ground for one end
of the cable shield in order to minimize the risk of noise caused by earth ground loop currents
C between apparatus. The procedure of only grounding one end, which primarily originated as
a result of trying to reduce hum in audio systems, is no longer applicable to the complex
industrial environment. Shielded cables are also efficient emitters of RF noise from the PLC
D system, and can interact in a parasitic manner in networks and between multiple sources of
interference.
The recommendation is to use shielded cables as electrostatic “pipes” between apparatus and
systems, and to run heavy gauge equi-potential bond wires alongside all shielded cables.
When a shielded cable runs through the metallic wall of an enclosure or machine, it is 1
recommended in IEC 1000–5–2 that the shield should be connected over its full perimeter to
the wall, preferably using a conducting adapter, and not via a pigtail wire connection to an
earth ground bolt. Shields must be connected to every enclosure wall or machine cover that
2
they pass through.
Analog and RS232 Cables
3
Providing an earth ground for both ends of the shield for analog circuits provides the perfect
electrical environment for the twisted pair cable as the loop consists of signal and return, in a 4
perfectly balanced circuit arrangement, with connection to the common of the input circuitry
made at the module terminals. RS232 cables are handled in the same way. 5
Multidrop Cables
RS422 twin twisted pair, and RS485 single twisted pair cables also require a 0V link, which H
has often been provided in the past by the cable shield. It is now recommended that you use
triple twisted pair cabling for RS422 links, and twin twisted pair cable for RS485 links. This
is because the extra pair can be used as the 0V inter-system link. With loop DC power
7
supplies earth grounded in both systems, earth loops are created in this manner via the inter-
system 0v link. The installation guides encourage earth loops, which are maintained at a low 10
impedance by using heavy equi-potential bond wires. To account for non–European
installations using single-end earth grounds, and sites with far from ideal earth ground
characteristics, we recommend the addition of 100 ohm resistors at each 0V link
9
connection in network and communications cables.
Last Slave
TXD 0V RXD
Slave n
TXD 0V RXD
Master
RXD 0V TXD
10
+ – + – + – + – + – + –
100 ⏲ 100 ⏲
Termination Termination
100 ⏲ J
12
Shielded Cables within Enclosures 13
When you run cables between PLC items within an enclosure which also contains susceptible
electronic equipment from other manufacturers, remember that these cables may be a source
of RF emissions. There are ways to minimize this risk. Standard data cables connecting PLCs
14
and/or operator interfaces should be routed well away from other equipment and their
associated cabling. You can make special serial cables where the cable shield is connected to A
the enclosure’s earth ground at both ends, the same way as external cables are connected.
B
C
D
12
13
14 1.5"
38mm
min
A
1.5"
B 38mm
min
C 1.5"
38mm
min
6
9 Point-to-point
11
1
DTE Device Signal GND
GND
1 0V Signal GND RXD
TXD
3 RXD RXD
CTS
RXD
RTS
PORT1 RTS
10
15
6P6C CTS
5
K Phone Jack
OR
Loop
RTS
12 RS-422 is
a multi-point wiring standard with a practical wiring distance 0f 1000 meters, or 3280 feet,
maximum total length. The RS-422 wiring standard does not specify a network topology, but
13 in practice, a daisy-chain topology with the master at one end is the only way to ensure
network reliablility. Belden 8102, or equivalent is recommended for RS-422 networks. Use a
14 terminating resistor equal in value to the characteristic impedance of the cable being used
(100 액 for Belden 8102).
A RXD+
RXD–
B TXD+
TXD–
Signal GND
9 TXD+ Termination
D 14
15
7
CTS+
CTS–
0V
PORT 2
Master
RS-485 is a multi-point wiring standard with a practical wiring distance of 4000 feet
maximum. This wiring standard provides for the possibility of up to 32 masters
communicating to up to 32 slaves all within the maximum distance of 4000 feet. Note that 1
while the RS-485 wiring standard provides for multiple masters on the same network, the
DirectLOGIC PLCs do not support multiple masters on a single network. The RS-485
wiring standard does not specify a network topology, but in practice, a daisy-chain topology
2
with the master at one end is the only way to ensure network reliablility. Belden 9841, or
equivalent is recommended for RS-485 networks. Use a terminating resistor equal in value to 3
the characteristic impedance of the cable being used (120 액 for Belden 9841).
TXD+ / RXD+
Termination
Resistor
TXD+ / RXD+ TXD+ / RXD+
4
TXD– / RXD– TXD– / RXD– TXD– / RXD–
E
Signal GND Signal GND Signal GND
RXD–
Connect shield
to signal ground
RXD– 6
6
6
11
11
1
1
0V
RTS+ 0V RTS+
7
TXD+ RXD+ RTS– TXD+ RTS–
RXD+
CTS+ Cable: Use Belden
9841 or equivalent
CTS+ H
CTS– CTS–
10
10
9
15
15
5
5
TXD– TXD–
DL06 CPU Port 2 DL06 CPU Port 2
10
Communications Protocols
A communications protocol is the ‘language’ the devices on a network use to communicate K
with each other. All the devices on the network must use the same communications protocol
in order to be able to communicate with each other. The protocols avalable in the
DirectLOGIC PLCs are listed in the following table.
12
Communications Protocols 13
Protocol Master Slave Port 1* Port 2 RS-232C RS-422 RS-485**
K-Sequence
DirectNET
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
14
MODBUS RTU Yes Yes Yes Yes Yes Yes Yes
ASCII Out In No Yes Yes Yes No A
* Port 1 supports slave only and is only RS-232C with fixed communications parameters of 9600
baud, 8 data bits, 1 start bit, 1 stop bit, odd parity and station address 1. It is an asynchronous, half- B
duplex DTE port and auto-selects between K-Sequence, DirectNET and MODBUS RTU protocols.
** RS-485 is available on Port 2 for MODBUS RTU protocol only. C
K-Sequence protocol is not available for use by a master DL06 PLC. Therefore, it cannot be
used for networking between PLCs. Its primary use in the DL06 PLC is as a slave to
DirectSOFT programming software and to an operator interface.
D
DirectNET protocol is available for use by a master or by a slave DL06 PLC. This, and the
fact that it is ‘native’ protocol, makes it ideal for PLC-to-PLC communication over a point-
1 to-point to multipoint network usijg the RX and WX instructions.
MODBUS RTU protocol is a very common industry standard protocol, and can be used by a
2 master or slave DL06 to communicate with a wide variety of industrial devices which support
this protocol.
3 ASCII is another very common industry standard protocol, and is commonly used where
alpha-numeric character data is to be transferred. Manyh input devices, such as, barcode
readers and electronis scales use ASCII protocol, and many output devices accept ASCII
4 commands, as well.
It doesn’t matter which wiring standard or protocol is used, there are several communications
E parameters to select for each device before they will be able to communicate. These
parameters include:
6 Baud Rate Flow Control
Data Bits Echo Suppression
7 Parity Timeouts
Stop Bits Delay Times
H Station Address Format
9 All of these parameters may not be necessary, or available, for your application. The
parameters used will depend on the protocol being used and whether the device is a master or
10 slave.
K NOTE: The point to remember is that when there is the same parameter available in the master and in the
slave (i.e. Baud Rate, Parity, Stop Bits, etc), the settings must match.
12
13
14
A
B
C
D
Communications Port 2
DL06 Port Specifications Connects to HPP, DirectSOFT 5, operator
Communications Port 1
interfaces, etc.
15-pin, multifunction port, RS232C, RS422, RS485
1
Connects to HPP, DirectSOFT 5, operator (RS485 with 2-wire is only available for MODBUS
and Non-sequence).
interfaces, etc.
6-pin, RS232C Communication speed (baud): 300, 600, 1200, 2
Communication speed (baud): 9600 (fixed) 2400, 4800, 9600, 19200, 38400
Parity: odd (fixed)
Port 1 Station Address: 1 (fixed)
Port 2
Parity: odd (default), even, none
Station Address: 1 (default)
3
8 data bits 8 data bits
1 start, 1 stop bit 1 start, 1 stop bit 4
Asynchronous, half-duplex, DTE Asynchronous, half-duplex, DTE
Protocol (auto-select): K-sequence (slave only),
DirectNET (slave only), MODBUS (slave only)
Protocols can be pre-selected: K-sequence (slave
only), DirectNET (master/slave), MODBUS E
(master/slave), non-sequence/print/ASCII in/out
1
Port 1 Pin Descriptions
0V Power (-) connection (GND)
3 RXD
4 RTS
Receive data (RS-232C)
Ready to send (RS-232C)
H
2 5V Power (+) connection
3 RXD Receive data (RS-232C)
5 CTS
6 RXD-
Clear to send (RS232C)
Receive data (-) (RS-422/485)
9
4 TXD Transmit data (RS-232C) 7 0V Power (-) connection (GND)
5
6
5V
0V
Power (+) connection
Power (-) connection (GND)
8 0V
9 TXD+
Power (-) connection (GND)
Transmit data (+) (RS-422/485)
10
10 TXD- Transmit data (-) (RS-422/485)
11 RTS+ Ready to send (+) (RS-422/485) K
12 RTS- Ready to send (-) (RS-422/485)
13 RXD+
14 CTS+
Receive data (+) (RS-422/485)
Clear to send (+) (RS-422/485)
12
15 CTS- Clear to send (-) (RS-422/485)
B NOTE: This is a Helpful Hint. Rather than build the setup words manually from the tables, use
DirectSOFT 5 to setup the port as desired then use a Dataview to view the setup words as BCD/HEX. Then
simply use these numbers in the setup code.
C
The data that is written to the port setup words has two formats. The format that is used
D depends on whether K-Sequence, DirectNET, MODBUS RTU (method 1) or ASCII
(method 2) is selected.
To setup port 2 for for MODBUS protocol for the following: RTS On-delay of 10ms, Base
timeout x1, RTS Off-delay of 5ms, Odd parity, 1 Stop bit, echo suppression for RS232-
1 C/RS422, 19,200 baud, Station Number 23 you would use the relay ladder logic shown
below.
2 SP0
LD
3 K3022
OUT
V7655
4 LD
K8617
E OUT
V7656
6
7 Port 2 Setup for RLL Using ASCII
H Word 1 RTS On-delay
Timeout
(in% of std. timeout) Protocol RTS Off-delay
12 110 = 100ms
111 = 500ms
110 = 2000%
111 = 5000%
110 = 100ms
111 = 500ms
D 110 = 19200
111 = 38400
LDA
V7656
K
O2000
OUT 12
V7650
13
14
A
B
C
D
K-Sequence Communications
The K-Sequence protocol can be used for communication with DirectSOFT 5, an operator
1 interface or any other device that can be a K-Sequence master. The DL06 PLC can be a K-
Sequence slave on either port 1 or port 2. The DL06 PLC cannot be a K-Sequence master.
2 In order to use port 2 for K-Sequence communications you first need to setup the port using
either DirectSOFT 5 or ladder logic as described above.
3 DirectNET Communications
The DirectNET protocol can be used to communicate to another PLC or to other devices
4 that can use the DirectNET protocol. The DL06 can be either be used as a master using port
2 or as a slave using either port 1 or port 2.
E In order to use port 2 for DirectNET communications you must first setup the port using
either DirectSOFT 5 or ladder logic as previously described.
6 For network slave operation, nothing more needs to be done. Port 2 will function as a slave
unless network communications instructions are executed by the ladder logic program.
7 For a network master operation you will simply need to add some ladder rungs using the
network communication instructions RX and/or WX. If you use more than one network
communidcation instruction is executed at any given time. If you have just a few network
H communications instructions in your program, you can use discrete bits to interlock them. If
you are using many network communications instructions, a counter or a shift register will be
9 a more convenient way to interlock the instructions.
The following step-by-step procedure will provide you the information necessary to set up
10 your ladder program to receive data from a network slave.
Step 1: Identify Master Port # and Slave # F 2 0 1
K The first Load (LD) instruction identifies the
communications port number on the network master
(DL06) and the address of the slave station. This Slave address (BCD)
12 instruction can address up to 99 MODBUS slaves, or Port number (BCD)
90 DirectNET slaves. The format of the word is Internal port (hex)
13 shown to the right. The “F2” in the upper byte
indicates the use of the right port of the DL06 PLC,
LD
port number 2. The lower byte contains the slave
14 address number in BCD (01 to 99).
KF201
The number of bytes specified also depends on the type of data you want to obtain. For
example, the DL06 Input points can be accessed by V-memory locations or as X input
locations. However, if you only want X0 – X27, you’ll have to use the X input data type 1
because the V-memory locations can only be accessed in 2-byte increments. The following
table shows the byte ranges for the various types of DirectLOGIC products. 2
DL05 / 06 / 205 / 350 / 405 Memory Bits per unit Bytes
V-memory 16 2 3
T / C current value 16 2
Inputs (X, SP)
Outputs
8 1
4
8 1
(Y, C, Stage, T/C bits)
Scratch Pad Memory 8 1 E
Diagnostic Status 8 1
LDA
slave.
3 • DirectNET slaves – specify the same address in the WX
O40600
10
K
12
13
14
A
B
C
D
E For network master operation the MODBUS RTU network communication instructions
MRX and/or MWX needs to be added to some ladder rungs. If more than one network
communication instruction is used, the rungs need to be interlocked to ensure that only one
6 communication instruction is executed at any given time. If only a few network
communications instructions are used in your program, discrete bits can be used to interlock
7 them. If many network communicaitons instructions are used, either a counter or a shift
register will be a more convenient way to interlock the instructions.
H
9
10
K
12
13
14
A
B
C
D
A C
Accumulating Fast Timer instruction, 5–42 C Data Type, 3–26 1
Accumulating Timer (TMRA) instruction, 5–42 C-more, I-9
Accumulator, 5–69 Cables 2
Accumulator Instructions, 5–52 programming, 1–8
Aliases, 3–31 Cascade Control, 8–65
3
Analog IBoxes, 5–230 Tuning, 8–67
Approvals, 2–10 Changing Date and Time, 10–14
4
ASCII Conversion Table, G-2 Clock / Calendar Instructions, 5–171
ASCII In/Out and PRINT, 4–11 Combination Networks, 5–7
5
Comm Port 2, 3–4
ASCII Instructions, 5–210
Auto tuning error, 8–48 Comm Ports, configuring, 4–7
6
Auto Tuning Procedure, 8–45 Communication IBoxes, 5–231
Communications from a Ladder Program, K–13
7
Automatic Trapezoidal Profile, E–47
Auxiliary Functions, 3–9, A–2 Read and Write Interlocks, K–13 8
CPU Configuration, A–5 Communications Problems, 9–7
EEPROM Operations, A–8 Communications Protocols, K–3 9
Handheld Programmer Configuration, A–8 Comparative Boolean Instructions, 5–26
Password Operations, A–9 Components, 1–6 10
RLL Operations, A–4 Connecting DC I/O, 2–18
via DirectSOFT32, A–3 Connections 11
via the Handheld Programmer, A–3 power input, 1–8
V-memory Operations, A–4 programming device, 1–8 12
toggle switches, 1–7
B Contacts in Series, 5–6 13
Basic EMC Installation Guidelines, J-4 Control Relay Bit Map, 3–36
Battery Backup, 3–8 Converge Jump instruction, 7–23 14
BCD Numbering System, I–5 Converge Stage instruction, 7–23
Binary Numbering System, I–2 Convergence Jump instruction, 7–20 A
Bit Override, 9–19 Convergence Stages, 7–19
Boolean Instructions, 5–5, 5–10 Counter Example Using Discrete Status Bits B
Bumpless Transfer, 8–2, 8–3, 8–13, 8–26, 8–76, instruction, 5–46
8–77 Counter I/O IBoxes, 5–231 C
Counter Status Bit Map, 3–38
CPU Features, 3–2
D
A X
X Data Type, 3–26
B X Input / Y Output Bit Map, 3–33
C Y
Y Data Type, 3–26
D