Objectives

 To simulate, build and test application of BJT as a switch.

 To simulate, build and test application of BJT as a single stage amplifier.
 To demonstrate the switching and amplifying operation of BJT and UJT.

Equipment / Components

 Function generator, Power supply, Oscilloscope and multimeter.

 Resistor: 56KΩ, 6.8KΩ, 4.3KΩ, 8.2KΩ, 1.5KΩ, 1KΩ and 100 Ω
 Capacitor: 10μF, 20μF electrolytic.
 Transistor 2N2222A
 SPDT switch

Task 1:

1. From the circuit given in Figure 1, calculate the base current (IB) required to turn ON
the LED. You may use ßDC = 200.

Figure 1: Switching Circuit

 Calculation for IB:

Answer:- IB = 1000μA

[2 marks]

2. Using Multisim, simulate the circuit in Figure 1 then identify the biasing conditions of
Base-Collector (BC) junction and Base-Emitter (BE) junction when input levels are
0V and 5V.

(i) Input ( 0V ) :- BC___Reversed Bias

BE___Forward Bias

(ii) Input ( 5V ) :- BC___Forward Bias

BE___Forward Bias
[8 marks]

Task 2

1. Using Multisim, simulate the circuit in Figure 2. Measure I B, IC and VCE using the
multimeter then measure the VOUT by using oscilloscope. Screenshot the results and
write down the simulation value in the space provided.

2. By using multimeter, calculate ßDC = ___220___

[1 mark]
 Figure 2: Basic BJT Amplifier – Common Emitter (CE) configuration

Simulation Results:
 [20 marks]

3. From the circuit in Figure 2, calculate the VTH, RTH and IB.

Calculations

Answer:- RTH = 7152.65 Ω VTH=2.299V IB = 4.8 μA

[5 marks]

4. From the circuit in Figure: 2, calculate the value of ICQ and VCEQ.

Calculations

Answer:- ICQ = __1.043mA VCEQ = _9.2915__Volt

[5 marks]
5. Draw the I-V characteristic to show the DC load line. Label the Q point.

[5 marks]
Task 3

R2

DRAIN
R1
GATE VDD

SOURCE
VGG

Figure 3: JFET Characteristics

* R1 = 1KΩ & R2 = 200Ω

Procedures

1 Simulate the circuit as shown in Figure: 3 using any circuit simulation software.
Print screen the simulation circuit and place the results in the report.

[4 marks]
2 Simulate the values of VDS and ID as shown in Table 1.

3 From the results obtained in Table: 1, plot the Drain Characteristics Curve for I D
versus VDS on a Graph 1.

Results

Table 1:

VGG = 0V VGG = 1.0V VGG = 2.0V

VDD VDS ID VDS ID VDS ID
1.0V 0.94 288 0.98 99.9 1 0
2.0V 1.92 399 1.98 100 2 0
4.0V 3.92 400 3.98 100 4 0
6.0V 5.92 400 5.98 100 6 0
8.0V 7.92 400 7.98 100 8 0
10.0V 9.92 400 9.98 100 10 0
 [12 marks]
[12 marks] [12 marks]
 Graph 1.

DRAIN CHARACTERISTICD CURVE

450

400

350

300
ID (uA)
250

200

150
VDS
(V) 100

50

̶̶ ̶̶ ̶ ̶ 0
0 2 4 6 8 10 12

VGG 0V ̶̶ ̶̶ ̶ ̶ VGG-1V ̶̶ ̶̶ ̶ ̶ VGG- 2V

[4 marks]
Task 4

Analysis

A switch consists of a BJT transistor that is alternately driven between the saturation
and cut-off the region. The switch (controlled) current goes between emitter and
collector, the controlling current goes between emitter and base. When a transistor has
zero current through its said to be in a state of cut-off (fully non-conducting). When
transistor has maximum current through its said to be in state of saturation (fully
conducting). The result in task 1 shown the calculation of the IB is 1mA is same result of
the simulation. As for the task 2, the figure 2 shown common emitter configuration
because (ignoring the power supply battery) both the signal source and the load share
the emitter lead as a common connection point shown in the figure above. The amplified
output is 180 of phase with the input but the value of peak to peak is increase from the
value peak to peak input. If the base current increase, the collector current increase
above the Q-point value, causing an increment in the voltage drop across R. This
increase means that the voltage at the collector decreases from its Q-point. As the
result the BDC is measured from the value Ic divided by IB that had been measured by
multimeter in the simulation. The Q-point had been shown at the results 5 where the
ICQ is 1.085mA and the VCEQ is 9.362V where the Ic is 2.17mA and the VCE is 18V
that we calculate using KVL.

[7 marks]

Conclusions

Bipolar Junction Transistor (BJT) is a three layer device constructed form two
semiconductor diode junctions joined together, one forward biased and one reverse
biased. There are two main types of bipolar junction transistors, the NPN and the PNP
transistor. Transistors are "Current Operated Devices" where a much smaller Base
current causes a larger Emitter to Collector current, which themselves are nearly equal
to flow. In fixed DC biasing technique of an N channel JFET, the gate of the JFET is
connected in such a way that the V GS of the JFET remains negative all the time. As the
input impedance of a JFET is very high there are no loading effects observed in the
input signal. The current flow through the resistor R1 remains zero. For this state the
VGS voltage should be negative for N-channel JFET and positive for P channel JFET. It
can get with the use of self-bias configuration shown in above figure.

[3 marks]