Problem 4: MOS Areal Charge Density

Consider an n+ poly-Si-gated MOS capacitor with oxide thickness xo = 3 nm and p-type Si substrate
doping NA = 1017 cm-3 maintained at T = 300K. (Gate work function M = 4.1 eV)
a) What is the flat-band voltage, VFB, of this capacitor?
b) What is the threshold voltage, VT, of this capacitor?
c) Derive formulae for the total areal charge density (in C/cm2) in the Si as a function of gate voltage,
for each of the regions of operation (accumulation, depletion and inversion). Plot the total areal
charge density as a function of VG > VFB.
d) Calculate the areal charge density in the Si for a gate voltage VG = VT + 1V, and sketch the
corresponding charge distribution within the MOS structure for this gate bias.

Problem 4: MOS Areal Charge Density

Since the substrate is p-type, this is a NMOS capacitor, i.e. a sufficiently large positive gate voltage is
required to deplete the semiconductor surface of holes and form an inversion-layer of mobile electrons
there.
a) Bulk semiconductor potential F = EiEF = (kT/q)∙ln(NA/ni) = (kT/q)∙ln(1017/1010) = 7×60mV = 0.42 V
(lecture12 slide10)
The work function of the p-type semiconductor is
 S = χ + (EG/2) + (EiEF) = 4.05 eV + 0.56 eV + 0.42 eV = 5.03 eV
Ideally, the flat-band voltage is given by the difference between the gate and the semiconductor work
functions:
qVFB=  M –  S  4.1 eV – 5.03 eV = -0.93 eV(lecture 11 slides 12)
Therefore the flat-band voltage VFB  -0.93 V
b) Areal oxide capacitance Cox = ox/xox = 3.9×8.85×10-14(F/cm)/3×10-7(cm) = 1.15×10-6 F/cm2

The threshold voltage (lecture12 slides 13)

2qN A S  2F 
VT VFB  2F 
Cox

VT  0.93  2(0.42) 
 
2(1.6 10  19 )(1017 ) 10  12  2 0.42 
0.05V
1.15 10  6

c) Lecture12 slides17 The total areal charge density (units: C/cm2) within the Si is QS = Qacc + Qdep + Qinv
where
Qacc is the accumulation-layer charge density: 0 for VG > VFB (when the surface is depleted of
holes)
Qdep is the depletion charge density: 0 for VG < VFB (when the surface has an accumulation layer of
holes)
Qinv is the inversion-layer charge density: 0 for VG < VTH

 For VG < VFB, Qdep and Qinv each are zero so QS = Qacc = Cox(VG  VFB) = 1.15×10-6(VG + 0.93V)

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 >0
For VG < -0.93V the QS vs. VG plot will be a straight line with slope = Cox = 1.15×10-6 F/cm2
and with an x-intercept at 0.93 V.

 For VT > VG > VFB, Qacc and Qinv each are zero so
QS Qdep  qN AW  2qN A SiS  0

From Lecture 12 Slide 9,

qN A si  2Cox (VG  VFB ) 
2
S   1  1
2Cox  qN A si 

 For 0.05 V > VG > -0.93 V, Coulombs per cm2,

 2C (V  VFB ) 
2
QS  q si N A  1  ox G  1
 qN A si 

with magnitude increasing ~with the square root of (VG-VFB), from 0 at -0.93 V to 2.3×10-7
C/cm2 at VG = VT = 0.05 V (see below).

 For VG > VT, Qacc is zero so QS = Qdep + Qinv.

Qdep is ~constant because W does not increase appreciably as VG increases above the threshold
voltage, so that it has a maximum value corresponding to a voltage drop of 2 S within the Si:
(lecture12 slides12)
2 si  2F 
WT 
qN A

Therefore -
Qdep  qN AWT  4qN A SiF  41.6 10  19
10 10  2 0.42 
17  12

1.63×10-7 C/cm2

Qinv = -Cox(VG  VT) < 0

 For VG > 0.05 V, QS = 1.63×10-7  1.15×10-6 (VG  0.05V) Coulombs per cm2

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 d) For VG > VT, the surface of the Si is inverted.
QS = Qdep + Qinv where
Qdep = 1.63×10-7 C/cm2
Qinv = Cox(VG  VT) = 1.15×10-6×1 = 1.15×10-6 C/cm2

The charge distribution in the MOS capacitor is illustrated below.

Problem 2: MOS C-V and VT adjustment

Consider an ideal PMOS capacitor of area 100 m  100 m operated at T = 300K. M = 5.2 eV, xo = 3 nm,
and ND = 1017 cm-3.

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 a) Calculate the flat-band voltage VFB and the threshold voltage VT. (The electron affinity of Si is = 4.05
eV.)
b) What is the value of the maximum small-signal capacitance?
c) What is the value of the minimum small-signal capacitance?
d) Based on your answers above, sketch the high-frequency C-V characteristic and low frequency C-V
characteristic.
e) Calculate the required ion implant dose (NI in units of #/cm2) and type (acceptors or donors) needed to
increase the magnitude of VT to 0.3 V.

Problem 2: MOS C-V characteristic and VT adjustment

For a PMOS capacitor of area 100 m 100 m operated at T = 300K, with M = 5.2 eV, xo = 3 nm, and
ND = 1017 cm-3:

Lecture 12 slide 10
kT ND
The bulk potential,  F   ln  0.42V
q ni
EG
The flatband voltage, VFB   M   S   M  (   (   F ))  5.2  (4.05  (0.56  0.42))  5.2  (4.05  0.14)  1.01V
2q
ox 3.45 1013
The oxide capacitance, Cox    1.15 106 F / cm2
xo 310 7
2qND si | 2 F |
The threshold voltage, VT  VFB  2 F 
Cox
2 1.6 10 19 10 12 1017  0.84
 1.01 0.84 
1.15 10 6
 1.01 0.84  0.143  0.027V
f) The maximum small-signal capacitance,
ACmax  ACox  104 1.1510 6 1.1510 10 F

g) Lecture12 slide 25
The minimum small-signal capacitance,
1 1 2(2 |  F |) 1 2  (2  0.42) 1 1
       11.110 6 cm2 / F
Cmin Cox qND si 1.1510 6 19
1.6 10 10 10 17 12
1.1510 6
0.976 107
 C min  9 108 F / cm2
Total minimum capacitance, AC min  A 9 10 8 F / cm2  104 cm2  9 10 8 F / cm2  9 10 12 F

h) The high-frequency C-V characteristic and low-frequency C-V characteristic are sketched below.

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 i) Lecture13 slides 19 The threshold voltage must be shifted by -0.327V in order to become -0.3V:

VT  0.3  0.027  0.327V

qN I 1.6 10  19 N I
| VT |  0.327V
Cox 1.15 10  6
 N I 2.35 1012 cm  2

In order to shift the threshold voltage to a more negative value (i.e. to make it more difficult to invert
the surface to become p-type), donor atoms (e.g. phosphorus or arsenic) must be added.

Problem 3: MOS C-V Characteristic

The capacitance vs. gate voltage characteristic of a simple MOS capacitor of area 100 m  100 m is as
shown:
C (pF)

70

Vg (V)
-0.7 0.25
Assume that there are no oxide charges.
a) What is the thickness of the gate oxide (SiO2)?
b) Estimate the values of VFB and VT.
c) Is the gate material metal or n+ poly-Si? How do you know this?
d) Is the substrate lightly doped (<1018 cm-3)? How do you know this?

Problem 3: MOS C-V Characteristic

Given the C-V characteristic for a MOS capacitor of area 100 um  100 um = 10-4 cm2:

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 C (pF)

70

Vg (V)
-0.7 0.25
e) The maximum capacitance is equal to the oxide capacitance ACox:
 oxA
C ox A   70 10 12 F
xo
3.45 10 13 10 4
 xo   4.9 10 7 cm 4.9nm
70 10 12

f) The steep transition from a minimum capacitance (corresponding to a depleted semiconductor

surface) to a nearly maximum capacitance (corresponding to an inverted semiconductor surface)
occurs as the gate voltage is increased in the positive direction; thus, the inversion layer is negatively
charged and hence the semiconductor is p-type, i.e. this is an NMOS device. From the C-V curve it
can be seen that the flatband voltage (at which the capacitance begins to decrease due to depletion of
the semiconductor surface) is -0.7 V and the threshold voltage (at which the capacitance increases
steeply) is 0.25 V.
g) The decrease in capacitance with increasing gate voltage beyond the threshold voltage is
characteristic of the gate depletion effect which increases the effective oxide thickness; therefore, the
gate material is n-type polycrystalline silicon (poly-Si). Note: If the gate material were p+ poly-Si,
then positive charge is added to the gate electrode as the gate voltage is increased, by increasing the
number of holes in an accumulation layer at the oxide interface rather than by increasing the thickness
of a depletion region with positive charge density as for an n+ poly-Si gate, so that there would be no
gate depletion effect.
h) Since (assuming no oxide charges) VFB=  M− S= −0.7 V and  M4.1 eV, we know that S 4.8 eV.
This corresponds to lightly doped p-type silicon. (The electron affinity of silicon is 4.05 eV so EF-Ev
 4.05+1.124.8 = 0.37 eV  6×60 meV = 6× (kT/q)ln(10) so p is ~6 orders of magnitude smaller
than Nv, i.e. p 1013 cm-3)

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