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Experiment 13 - MP 8085 Lab Manual

The document discusses the study of the IC 8255 PPI chip. It describes the features and programming of the 8255 including its three 8-bit ports and control word. It also explains the different operating modes of the 8255 including mode 0, 1, and 2 as well as the bit set/reset mode.

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54 views

Experiment 13 - MP 8085 Lab Manual

The document discusses the study of the IC 8255 PPI chip. It describes the features and programming of the 8255 including its three 8-bit ports and control word. It also explains the different operating modes of the 8255 including mode 0, 1, and 2 as well as the bit set/reset mode.

Uploaded by

jatinkanpure121
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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CS3CO35: Microprocessor & Interfacing Lab Experiment No- 13

Experiment Title: To study of IC 8255 PPI. Page 1 of 7

Objective: Study of IC 8255 PPI.

Apparatus required: 8085 Simulator, PC,8255 IC.


Theory:
The 8255A programmable peripheral interface (PPI) implements a general-purpose
I/O interface to connect peripheral equipment to a microcomputer system bus. The
core's functional configuration is programmed by the system software so that
external logic is not required to interface peripheral devices.
Features
• Three 8-bit Peripheral Ports - Ports A, B, and C
• Three programming modes for Peripheral Ports: Mode 0 (Basic
Input/Output), Mode 1 (Strobed Input/Output), and Mode 2
(Bidirectional)
• Total of 24 programmable I/O lines
• 8-bit bidirectional system data bus with standard microprocessor
interface controls

Programming the 8255


CONTROL LOGIC

(Read): This control signal enables the Read operation. When the signal is low,

Department of Computer Science Engineering


Faculty of Engineering
Medi-Caps University
1
CS3CO35: Microprocessor & Interfacing Lab Experiment No- 13
Experiment Title: To study of IC 8255 PPI. Page 2 of 7

the MPU reads data fro a selected I/O Port of the 8255.

(Write): This control signal enables the write operation. When the signal goes
low, MPU writes into a selected I/O Port or control register.

RESET (Reset): This is an active high signal; it clears the control register and sets all
ports in the input mode.

, A0 and A1: Theses are device select signals. Chip Select is connected to a decoded address, and A0
and A1 are generally connected to MPU address lines A0 and A1 respectively

CONTROL WORD
Figure 1.5 shows a register called the control register. The contents of this register called
control word. This register can be accessed to write a control word when A0 and A1 are
at logic 1. This control register is not accessible for a read operation.

Department of Computer Science Engineering


Faculty of Engineering
Medi-Caps University
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CS3CO35: Microprocessor & Interfacing Lab Experiment No- 13
Experiment Title: To study of IC 8255 PPI. Page 3 of 7

Bit D7 of the control register specifies either I/O function or the Bit Set/Reset
function. If bit D7=1, bits D6-D0 determines I/O functions in various modes. If bit D7=0,
Port C operates in the Bit Set/Reset (BSR) mode. The BSR

control word does not affect the functions of Port A and Port B.

To communicate with peripherals through the 8255, three steps are necessary:

1. Determine the address of ports A, B and C and of the control register according to the
chip select logic and address lines A0 andA1.

2. Write the control word in the control register.

3. Write I/O instructions to communicate with peripherals through Ports A, B and C.

Operating Modes
Mode 0: Simple Input or Output

In this mode, ports A, B are used as two simple 8-bit I/O ports and port C as two 4- bit
ports. Each port can be programmed to function as simply an input port or an output port.
The input/output features in Mode 0 are as follows.
Department of Computer Science Engineering
Faculty of Engineering
Medi-Caps University
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CS3CO35: Microprocessor & Interfacing Lab Experiment No- 13
Experiment Title: To study of IC 8255 PPI. Page 4 of 7

1. Outputs are latched.


2. Inputs are not latched.
3. Ports don’t have handshake or interrupt capability.

Mode 1: Input or Output with Handshake

In this mode, handshake signals are exchanged between the MPU and peripherals prior to
data transfer. The features of the mode include the following:
1. Two ports (A and B) function as 8-bit I/O ports. They can be configured as either as
input or output ports.
2. Each port uses three lines from ort C as handshake signals. The remaining two
lines of Port C can be used for simple I/O operations.
3. Input and Output data are latched.
4. Interrupt logic is supported.
Mode 2: Bidirectional Data Transfer

This mode is used primarily in applications such as data transfer between two computers.
In this mode, Port A can be configured as the bidirectional port and Port B either in Mode
0 or Mode 1. Port A uses five signals from Port C as handshake signals for data transfer.
The remaining three signals from port C can be used either as simple I/O or as handshake
for port B.

BSR (Bit Set/Reset) Mode

The BSR mode is concerned only with the eight bits of port C, which can be set or reset
by writing an appropriate control word in the control register. A control word with bit D7
=0 is recognized as a BSR control word, and it does not alter any previously transmitted
control word with bit D7=1; thus the I/O operations of ports A and B are not affected by
a BSR control word. In BSR mode, individual bits of port C can be used for applications
such as an on/off switch. Ports A and B are not affected
by the BSR Mode.

Department of Computer Science Engineering


Faculty of Engineering
Medi-Caps University
4
CS3CO35: Microprocessor & Interfacing Lab Experiment No- 13
Experiment Title: To study of IC 8255 PPI. Page 5 of 7

BSR CONTROL WORD

This control word, when written in the control register, sets or resets one bit at a time,

Result: Thus Study of 8255 is completed.

Department of Computer Science Engineering


Faculty of Engineering
Medi-Caps University
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