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E23cseu2200 Assignment9

The document discusses different types of counters like synchronous, asynchronous, ring and Johnson counters. It provides Verilog code examples to implement ring, Johnson and 2-bit up counter. It also discusses different types of shift registers and their applications in data storage, transfer, manipulation, timing/control and counting.

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30 views

E23cseu2200 Assignment9

The document discusses different types of counters like synchronous, asynchronous, ring and Johnson counters. It provides Verilog code examples to implement ring, Johnson and 2-bit up counter. It also discusses different types of shift registers and their applications in data storage, transfer, manipulation, timing/control and counting.

Uploaded by

chipichipichapachapa2121
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ASSIGNMENT 9

CSET 105 DIGITAL DESIGN


Anshul Dhamija G(6) Batch 46
E23CSEU1366

1. What is counter ? Differentiate synchronous counter and asynchronous counter.


A counter in digital electronics is a device that goes through a predetermined sequence of
states based on the input pulses it receives. It’s often used to count events or control a
sequence of events in a specific order.
There are two main types of counters: synchronous and asynchronous.
1. Synchronous Counter: In a synchronous counter, all the flip-flops (basic units of a
counter) are triggered by the same clock signal. This means that all the flip-flops
change state simultaneously. The advantage of this design is that it’s faster compared
to an asynchronous counter because there’s no delay caused by the propagation of the
clock signal from one flip-flop to the next. However, the design of synchronous
counters can be more complex because of the need to ensure that all flip-flops are
properly synchronized.
2. Asynchronous Counter: In an asynchronous counter, also known as a ripple counter,
the output of one flip-flop serves as the clock for the next. This means that each flip-
flop changes state independently of the others, which can introduce a delay as the
clock signal propagates from one flip-flop to the next. The advantage of this design is
its simplicity, but the propagation delay can make asynchronous counters slower than
synchronous ones.
The main difference between synchronous and asynchronous counters is the way they are
clocked. In synchronous counters, all flip-flops are triggered by the same clock, while in
asynchronous counters, the output of one flip-flop serves as the clock for the next. As a
result, synchronous counters are faster but more complex, while asynchronous counters are
slower but simpler.
…………………………………………………………………………………………………..
2. What is ring counter and johnson counter ? Write Verilog code to implement ring counter
and johnson counter.
Ring Counter: A ring counter is a type of counter composed of flip-flops connected into a
shift register, with the output of the last flip-flop fed to the input of the first. This forms a
circular flow of data, hence the name “ring” counter
Design code:
module ring_count(q, clk, clr);
input clk, clr;
output reg [3:0] q;
always @(posedge clk)
if (clr == 1) begin
q = 4'b1000;
end
else begin
q[3] <= q[0];
q[2] <= q[3];
q[1] <= q[2];
q[0] <= q[1];
end
endmodule

TESTBENCH CODE:
module ring_count_tb;
reg CLK, CLR;
wire [3:0] Q;
ring_count a1(Q, CLK, CLR);
initial CLK = 0;
always #1 CLK = ~CLK;
initial begin
CLR = 1'b1;
repeat (2) @(posedge CLK);
CLR = 1'b0;
repeat (10) @(posedge CLK);
$finish;
//ANSHUL
end
initial begin
$dumpfile("dump.vcd");
$dumpvars(1);
end
endmodule

Johnson Counter: A Johnson counter, also known as a twisted ring counter, is a modified
ring counter where the complement output of the last flip-flop is fed back to the input of the
first. It is a counter that counts 2N states if the number of bits is N
Design code:
module johnson(q, clk, clr);
input clk, clr;
//ANSHUL
output reg [3:0] q;
always @(posedge clk)
if (clr == 1) begin
q = 4'b0000;
end
else begin
q[3] <= ~q[0];
q[2] <= q[3];
q[1] <= q[2];
q[0] <= q[1];
end
endmodule
TESTBENCH CODE:
module johnson_tb;
reg CLK, CLR;
wire [3:0] Q;
johnson a1(Q, CLK, CLR);
initial CLK = 0;
always #1 CLK = ~CLK;
initial begin
CLR = 1'b1;
repeat (2) @(posedge CLK);
CLR = 1'b0;
repeat (10) @(posedge CLK);
$finish;
end
initial begin
$dumpfile("dump.vcd");
$dumpvars(1);
end
endmodule

…………………………………………………………………………………………………..
3. What are Shift registers. What are different types of Shift-registers. Discuss about the
various applications of Registers.
Shift Registers: In digital electronics, a shift register is a cascade of flip-flops where the
output pin of one flip-flop is connected to the data input pin of the next. Because all flip-flops
work on the same clock, the bit array stored in the shift register will shift by one position.

There are different types of shift registers:

Serial In Serial Out (SISO): In this type, data is input serially and taken out serially.
Serial In Parallel Out (SIPO): Here, data is input serially but taken out in parallel.
Parallel In Parallel Out (PIPO): In this type, data is both input and output in parallel.
Parallel In Serial Out (PISO): Here, data is input in parallel but taken out serially.
Bidirectional Shift Registers: These registers can shift data either to the right or left based on
the selected mode.
Applications of Registers:
1. Data Storage: Registers provide temporary storage for data that is being manipulated by a
digital circuit.
2. Data Transfer: Shift registers are often used to convert data from parallel format (used
internally in a microprocessor or other ASIC) to serial format (used for communication
between components on a PCB or between two separate PCBs).
3. Data Manipulation: Shift registers can be used to perform simple data manipulations. For
example, shifting a binary number left by one position multiplies the number by 2, while
shifting it right by one position divides the number by 23.
4. Timing and Control: Registers can be used to introduce deliberate time delays into a
digital circuit.
5. Counting and Division: Shift registers can be used to implement counters and frequency
dividers.
………………………………………………………………………………………………..
4. Write Verilog code to implement 2 bit ripple up/down counter.
Design code:

module up_counter(
input Clk,
input reset,
output reg [1:0] counter
);
always @(posedge Clk or posedge reset) begin
if (reset)
counter <= 2'b00;
else
counter <= counter + 1;
end
endmodule
TESTBENCH CODE:
module tb_counter;
reg CLK, CLR;
wire [1:0] Q;
up_counter uut (.Clk(CLK), .reset(CLR), .counter(Q));

initial CLK = 0;
always #5 CLK = ~CLK;
initial begin

CLR = 1'b1;
repeat (2) @(posedge CLK);
CLR = 1'b0;
repeat (10) @(posedge CLK);

$finish;
end

initial begin
$dumpfile("dump.vcd");
$dumpvars(1);
end
endmodule

************************************************************************

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