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P2508 Problem Set II

The document contains questions about logic families, their characteristics, common logic families like TTL and CMOS, their identification codes, logic levels, advantages, compatibility, Boolean algebra laws and simplification using Karnaugh maps.

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Fako Mafike
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0% found this document useful (0 votes)
29 views

P2508 Problem Set II

The document contains questions about logic families, their characteristics, common logic families like TTL and CMOS, their identification codes, logic levels, advantages, compatibility, Boolean algebra laws and simplification using Karnaugh maps.

Uploaded by

Fako Mafike
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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P2508 Problem Set II Time: 0 Hours April 2021 Total Marks: ∞

INSTRUCTIONS
1. Answer all questions.
2. Symbols retain their usual meanings unless stated otherwise.

3. Wherever necessary, draw a schematic diagram for illustrative purposes.

QUESTIONS
1) Explain what is meant by a logic family.
2) List three common logic families and briefly describe each one of them.

3) List and describe 7 main characteristics of logic families.


4) Which two logic families are most widely used?
5) Which gate is most popular or fundamental in TTL?
6) In TTL, the desired fan-in is determined by the number of Bases, Collectors, Emitters, or Gates?

7) The propagation delay of the TTL circuit is 1 second, 1 millisecond, 1 microsecond, 1 nanosecond, 1 picosecond, or
1 femtosecond?
8) In the laboratory, the TTL gate can be identified by series number 08, 74, 80, 82, 1000, 2000, 3000, or 4000?
9) In the laboratory, the CMOS gate can be identified by series number 08, 74, 80, 82, 1000, 2000, 3000, or 4000?

10) If you’re building a circuit which require very low delay time, would you choose normal TTL cicuit or Schotty TTL
circuit?
11) What are the logic ’0’ and logic ’1’ for a TTL, ECL and CMOS?
12) What is the advantage of having a gap between the range of voltages representing logic ’0’ and the range of voltages
representing logic ’1’ ?
13) What is compatibility in relation to logic gates?
14) Does ECL gate achieve lower delay time than TTL?

15) Is the switching speed of MOS limited or high in comparison to CMOS?


16) What do LSB and MSB stand for in binary numbers?
17) Convert these numbers from decimal to binary and Gray code:
a) 256
b) 513
c) 1024
18) Show 1’s complement and 2’s complement of the numbers; -115, -287, and +304.
19) Convert the following pairs of decimal numbers to binary and add each pair in binary;

a) -117 and +82


b) +113 and -79
c) -119 and -57

1
20) Show the truth tables for NOT, AND, OR, NAND, XOR, and XNOR gates.

21) Using only NAND gates, build the following gates: NOT, AND, OR, XOR and XNOR gates.
22) Explain what is meant by the following and give one example for each;
a) Product of Sums
b) Sum of Products
c) Canonical Form
23) Explain the following Boolean Algebraic laws and give one example for each;
a) Annulment law
b) Identity law
c) Idempotent law
d) Complement law
e) Commutative law
f) Distributive law
g) Absorptive law
h) Associative law
i) Double Negation law
j) de Morgan’s law
24) Use Boolean Algebra to simplify the following expressions (state the law used at every step) and draw the circuits
for the simplified expressions;

a) f (A, B, C) = ĀB̄ + ĀC̄


b) f (A, B, C) = 1 + A + B + C
c) f (A, B, C) = AB + AB̄ + ĀC + ĀC̄
25) Use Karnaugh map to simplify the following expressions and draw the circuits for the simplified expressions;

a) f (A, B) = ĀB̄ + ĀB + AB


b) f (A, B, C) = ĀB̄C̄ + ĀBC̄ + AB̄C̄ + AB̄C + ABC̄ + ABC
c) f (A, B, C, D) = ĀB̄C̄D̄ + ĀB̄CD̄ + ĀBCD̄ + ĀBCD + AB̄C̄D̄ + ABCD̄ + ABCD

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