Format No. QSP/7.1/01.F01 (B) Issue No.05 Rev.

No 5 Dated: July 22, 2018

________________________________________________________________
UNIVERSITY OF PETROLEUM & ENERGY STUDIES
College of Engineering Studies
Dehradun
COURSE PLAN

Program : B. Tech – CS - (CCVT)

Course : Computer System Architecture.
Course Code : CSEG 2004
No. of credits : 3 (2-Offline, 1-Online)
Semester : III
Session : 2018-19
Batch : 2017-21
Prepared by : Ms. Avita Katal
Email : [email protected]

Approved By

HOD/ Prog. Head

UPES Campus Tel : +91-135-2770137

“Energy Acres” Fax : +91 135- 27760904
P.O. Bidholi, , Dehradun
 COURSE PLAN

A. PREREQUISITE:
a. Basic Knowledge of Computers.

B. PROGRAM OUTCOMES (POs) and PROGRAM SPECIFIC OUTCOMES (PSOs)

for Cloud Computing and Virtualization Technologies:
B1. PROGRAM OUTCOMES (POs)
PO1 Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering
problems.
PO2 Problem analysis: Identify, formulate, review research literature, and analyze
complex engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
PO3 Design/development of solutions: Design solutions for complex engineering
problems and design system components or processes that meet the specified needs with
appropriate consideration for the public health and safety, and the cultural, societal, and
environmental considerations.
PO4 Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of data, and
synthesis of the information to provide valid conclusions.
PO5 Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modeling to complex
engineering activities with an understanding of the limitations.
PO6 The engineer and society: Apply reasoning informed by the contextual knowledge
to assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to the professional engineering practice.
PO7 Environment and sustainability: Understand the impact of the professional
engineering solutions in societal and environmental contexts, and demonstrate the
knowledge of, and need for sustainable development.
PO8 Ethics: Apply ethical principles and commit to professional ethics and
responsibilities and norms of the engineering practice.
 PO9 Individual and team work: Function effectively as an individual, and as a member
or leader in diverse teams, and in multidisciplinary settings.
PO10 Communication: Communicate effectively on complex engineering activities with
the engineering community and with society at large, such as, being able to comprehend
and write effective reports and design documentation, make effective presentations, and
give and receive clear instructions.
P11 Project management and finance: Demonstrate knowledge and understanding of
the engineering and management principles and apply these to one’s own work, as a
member and leader in a team, to manage projects and in multidisciplinary environments.
P12 Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of technological
change.
B2. Program Specific Outcomes (PSOs)

PSO 13 Perform system and application programming using computer system concepts,
concepts of Data Structures, algorithm development, problem solving and optimizing
techniques
PSO 14 Apply software development and project management methodologies using
concepts of front-end and back-end development and emerging technologies and
platforms.
PSO 15 Ability to understand and apply Cloud Computing architecture for scalable, secure
and dynamically provisioned business oriented environment with optimized performance
tuning and data reliability.

C. COURSE OUTCOMES FOR COMPUTER SYSTEM ARCHITECTURE: At the

end of this course student should be able to

CO1: Identify Functional Units, Bus Structure and Addressing Modes.

CO2: Design the Digital Components including – Decoder, Multiplexer and Arithmetic
Circuits.
CO3: Learn the Design of Arithmetic Unit, Logic Unit and Control Unit.
CO4: Understand the Design of Hardwired & Microprogrammed Control Unit.
CO5: Identify the Memory Hierarchy mapping and its Performance, and Understanding
the Interface of ALU with I/O devices.
 Course Code

CO5
CO4
CO3
CO2
CO1

CSA
PO/CO
Course Title

2
3
2
2
2
1
P
O

2
2
3
2
3
2
2

1
Engineering Knowledge

PO
1: Slight (Low)
PO

1=weakly mapped

3=strongly mapped
2
2
2
2
3
1
2
3

PO
Problem analysis
PO

2= moderately mapped
2
3
4

PO
Design/development of solutions
PO

4
2
3
2
2
3
5

Conduct investigations of complex problems

PO
PO

3
3
3
3
3
6

2
5
Modern tool usage

PO
PO
7

3
6
PO
The engineer and society
PO
8

1
7
Environment and sustainability
Table: Correlation of POs and PSOs v/s COs

PO

PO
2
2
2
2
2
9
PO

Ethics
2: Moderate (Medium)

2
8 9
P P
O O
Individual or team work
10
PO

10
PO
Communication
11

Project management and finance

11
PO
PO

2
3
1
2
2
1

12
PO
Life-long Learning
12
PO

Perform system and application programming using computer system

1

PSO13
concepts, concepts of Data Structures, algorithm development, problem
PSO
3: Substantial (High)

solving and optimizing techniques

1
1
1
1
1
2

1
PSO

Apply software development and project management methodologies

using concepts of front-end and back-end development and emerging
3

PSO14
technologies and platforms.
PSO

Ability to understand and apply Cloud Computing architecture for

scalable, secure and dynamically provisioned business oriented

PSO15
environment with optimized performance tuning and data reliability.
D. COURSE OUTLINE
 Introduction
 ALU Design
 Control Unit Design
 Memory Unit Organization
 Input Output Organization

E. PEDAGOGY
 Presentation
 flipped classroom session
 think-pair and share
 YouTube videos as a startup

F. COURSE COMPLETION PLAN

Total Class room 24(Offline)

sessions &12(Online)
Total Quizzes 02
Total Test 01
Total Assignment 02

One Session =60 minutes

G. EVALUATION & GRADING
Students will be evaluated based on the following 3 stages.
5.1 Internal Assessment - 30%
5.2 Mid-term Examination - 20%
5.2 End term Examination - 50%

G1. INTERNAL ASSESSMENT: WEIGHTAGE – 30%

Internal Assessment shall be done based on the following:

S. No. Description % of Weightage out of 30%

1 Test(1) + Quizzes (2) 50%

2 Assignments (2) 40%

3 Attendance 10%
G2. Internal Assessment Record Sheet (including Mid Term Examination marks) will be
displayed online at the end of semester i.e. last week of regular classroom teaching.

G3. CLASS TESTS/QUIZZES: One Class Test based on descriptive type theoretical &
numerical questions and Two Quizzes based on objective type questions will be held;
one quiz one test at least ten days before the Mid Term Examination and and second
quiz at least ten days before the End Term Examination. Those who do not appear in
quiz examinations shall lose their marks.
The marks obtained by the students will be displayed on LMS a week before the start
of Mid Term and End Term Examinations respectively.

G4. ASSIGNMENTS: Two assignments based on theory and numerical problems; one
before mid-term and one before end term examination would be taken. Those who fail
to submit the assignments by the due date shall lose their marks.

G5. GENERAL DISCIPLINE: Based on student’s regularity, punctuality, sincerity and

participation in the interactions.
The marks obtained by the students will be displayed on LMS at the end of semester.

G6. MID TERM EXAMINATION: WEIGHTAGE – 20%

Mid Term examination shall be of Two Hours duration and will consist of 50 Objective
type questions and would be conducted through blackboard.

G7. END TERM EXAMINATION: WEIGHTAGE – 50%

End Term Examination shall be Three Hours duration and shall be a combination of
Short and Long theory/numerical Questions.
G8. GRADING:
The overall marks obtained at the end of the semester comprising all the above three
mentioned shall be converted to a grade.
H. COURSE DELIVERY PLAN (online sessions are highlighted in yellow)

Course Required
Outcome Learning Pedagogy /
Module / Big Ideas / Resources Assignment(
s Discussion(
Session Topics s)
Addresse (including s) / Postings
d media)

Unit-1 Evolution of CO1, T1, R1, R2, Lecture, As per the

Computer CO2 R3, OL2, Discussion schedule
Introductio Systems, Von OL3, OL4 and mentioned
n (11 Neumann below
Hours) Architecture, Blackboard
Moore’s Law,
Computer
Types,
Functional
Units, Devices
(Input,
Output,
Storage &
Communicatio
n Devices),
Memory
System (RAM,
ROM, Cache,
VM, etc.),
Introduction to
Logic Gates,
Truth Table, K-
Map, Latch
Flip Flops (J, K
& D), Encoder
& Decoder,
MUX &
DEMUX,
 Registers &
Counters,
Binary Number
system,
Overview of
RISC/CISC,
RISC vs.
CISC.

Introduction to
blended Course
L1 for CSA, PPT Discussion
Importance of
CSA

Von Neumann
Architecture,
Functional
Lecture
units, Moore’s T1 [67 - 85],
L2 and
Law, Computer R2 [22 - 69] Discussion
Types, Binary
Number
System

Evolution of
Computer
System,
Devices( Input
Resources on Online via
, Output,
blackboar blackboard
L3 Storage &
d
Communicatio
n Devices)

L4 Binary Number T1 [67 - 85], Lecture

System with R2 [22 - 69] and
numerical Discussion
 Introduction to T1 [1 - 12], Lecture
L5 Logic Gates, R2 [108 - and
Truth Table. 138] Discussion

Memory
System (RAM,
ROM, Cache,
VM, etc.) Resources on
blackboard Online via
L6 Overview of blackboard
RISC/CISC,
RISC vs. CISC

T1 [447 - 471,
284 - 286] Lecture
K-Map and its
L7 T1 [12 - 18], and
numerical
R2 [196 - Discussion
212]
Adder & T1 [20 - 22], Lecture
L8 Subtractor, R2 [282 - and
Latch 289] Discussion

Resources on
blackboard

Registers & T1 [41 - 47, Online via

L9 47 - 48, 50 -
Counters blackboard
58], R2 [511 -
526, 527 -
541]

T1 [24 - 28], Lecture

Flip-Flops (RS,
L10 R2 [459 - and
J, K, D)
479] Discussion

L11 DEMUX, T1 [47 - 49, Lecture

MUX, Encoder 43 - 49], R2 and
& Decoder [345 -356, Discussion
 330 - 343 ]

Doubt
Clearance
Session/Pendin
g Topics

Unit II Computer CO1, Lecture, As per the

Organization CO3 Discussion schedule
ALU and Design, T1, R1, OL5, and mentioned
Design Instruction OL6, OL7 below
Codes, Op- Blackboard
(8 Hours)
Code,
Computer
registers,
Computer
Instructions,
CPU stack
Organization,
Instruction
Formats,
Instruction
types, Timing
and control,
Instruction and
Instruction
sequencing,
Instruction
Cycle, Memory
Reference
Instructions,
Addressing
modes,
Program
Control, Types
of Interrupts,
Design
computer ,perfo
rmance and
metrics,
 Introduction
to Parallelism,
Flynn’s
classification
of computers,
Feng’s
classification,
Parallel
architecture,
Pipeline
Hazards
Condition for
Stalls
Requirements

Computer
Organization
and Design,
Lecture
Instruction
L12 T1[125 - 131] and
Codes, Op-
Discussion
Code,
Computer
Registers.

Computer
Instructions, Lecture
L13 CPU stack T1[134 - 136, and
organization. 249 - 255] Discussion

L14 Instruction Resources on Online via

types, blackboard blackboard
Addressing
mode,
Interrupts,
Types of
Interrupts,
Priority
Interrupts,
Daisy chaining
 Priority.

Instruction
formats,
Timing and
control,
Instruction
Sequencing &
Instruction T1[257 - 261, Lecture
Cycles, 137,141 –
L15 and
Memory 145, 147- 151, Discussion
Reference 275 - 280]
Instructions,
Program
Control, Design
computer,
performance
and metrics.

CLASS TEST-
L16
1 (Offline)

Introduction to
Pipelining
(arithmetic &
instruction
pipeline), Basic Lecture
L17 performance T1[301 - 312] and
issues in Discussion
pipelining,
Limitations on
practical depth
of a pipeline.

L18 Introduction Resources on Online via

to parallelism, blackboard blackboard
Flynn’s
classification
of computers,
Feng’s
Classification,
 Parallel
architecture.

Pipeline
T1 [301 - 312] Lecture
Hazards,
L19 and
Conditions for
Discussion
Stall.

Doubt
Clearance
Session/Pendin
g Topics

Introduction,
Instruction
Interpretation
& Execution,
Control
Transfer, Fetch
Cycle, Micro
Unit III programmed Lecture,
CO1, As per the
Control, T1, R1, OL1 Discussion
Control CO4 schedule
Control and
Unit Design mentioned
Memory,
Blackboard below
(8 Hours) Micro
programmed
vs. Hardwired
Control Unit,
Nano
Programming,
Superscalar
processing.

L20 Introduction, Lecture

R1 [577 - and
Instruction 583]
Interpretation Discussion
& Execution

L21 Lecture
Control R1 [538 -
and
 Transfer 587] Discussion

R1 [578 - Online via

L22 Fetch Cycle
580] blackboard

Micro Lecture
L23 R1 [603 - and
programmed
605] Discussion
Control

Lecture
L24 Control and
OL1
Memory Discussion

Micro
programmed Resources on Online via
L25
vs. Hardwired Blackboard blackboard
Control Unit

L26 Lecture
Nano and
T1[328 – 330]
Programming Discussion

Superscalar Resources on Online via

L27
Programming blackboard blackboard

Doubt
Clearance
Session/Pendin
g Topics

Unit IV Memory CO1, T1 Lecture, As per the

Locations & CO5 Discussion schedule
Memory Unit
Organization
Addresses, and mentioned
Semiconducto below
(4 Hours) r Memory, Blackboard
Static and
Dynamic
Memory, Main
 Memory,
Auxiliary
Memory,
Associative
Memory,
Cache
Memory,
Secondary
Memories:
Optical
Magnetic
Tape,
Magnetic Disk
and
Controllers

Memory
Resources on
Locations
blackboard Online via
L28 & Addresses,
T1[452 – 454, blackboard
Semiconducto
447 - 449]
r Memory.

Static and
Lecture
Dynamic
L29 T1[447 - 451] and
Memory, Main
Discussion
Memory.

Associative Lecture
T1[458 – 464,
L30 Memory, and
464 - 471]
Cache Memory Discussion

L31 Auxiliary Resources on Online via

Memory, blackboard blackboard
Secondary
Memory: T1[454 - 458]
Optical
Magnetic
Tape,
Magnetic Disk
 and
Controllers

Doubt
Clearance
Session/Pendin
g Topics

I/O and their

brief
description,
Bus Interface,
Unit V Bus
arbitration, Lecture, As per the
I/O Data Transfer, CO1, Discussion schedule
T1 and
Organization Types of CO6 mentioned
Interrupts, I/O Blackboard below
(5 Hours) Interrupts,
Channels,
Direct Memory
Access, I/O
processing

I/O and their

Lecture
brief
L32 T1[383 - 392] and
description,
Discussion
Bus Interface

Resources on Online via

Data Transfer blackboard blackboard
L33
Techniques
T1[393 – 416]

Types of I/O Lecture

T1[404 – 416,
L34 Interrupts, and
422 - 429]
Channels Discussion

L35 Bus Resources on Online via

arbitration blackboard blackboard
 T1[383 – 390]

Direct Memory Lecture

T1[417-421,
L36 Access, I/O and
422 - 430]
processing Discussion

Doubt
Clearance
Session/Pendin
g Topics

I. SUGGESTED READINGS:
H1. TEXT BOOK:
1. “Computer System Architecture”, 3rd edition, M. Morris Mano, Pearson
Publications.
H2. REFERRENCE BOOKS:
1. “Computer Organization and Architecture”, Sixth Edition, William Stallings, Pearson
Publications.
2. “Fundamental of Digital electronics", second edition, A. Anand Kumar, PHI
publications
3. “Computer Organization and Architecture”, Third Edition, John P. Hayes, TATA
McGraw HILL

H3. OTHER RESOURCES

H4. VIDEO RESOURCES:
1. NPTEL Lectures VIDEO
2. RESOURCES: - PPT & VIDEO - Black Board
H5. WEB RESOURCES:
1. http://www.laureateiit.com/projects/bacii2014/projects/coa_anil/
control_memory.html

2. http://www.ni.com/example/14493/en/

3. https://www.youtube.com/watch?v=2ecMG_OciLo

4. https://www.youtube.com/watch?v=Sf_Yx2z1fRk

5. http://www.cs.uwm.edu/classes/cs458/Lecture/HTML/ch05.html

6. https://www.youtube.com/watch?v=CDO28Esqmcg
 7. http://nptel.ac.in/courses/106106092/12#

J. GUIDELINES

Cell Phones and other Electronic Communication Devices: Cell phones and other electronic
communication devices (such as Blackberries/Laptops) are not permitted in classes during
Tests or the Mid/Final Examination. Such devices MUST be turned off in the class room.
E-Mail and online learning tool: Each student in the class should have an e-mail id and a
pass word to access the LMS system regularly. Regularly, important information – Date of
conducting class tests, guest lectures, via online learning tool. The best way to arrange
meetings with us or ask specific questions is by email and prior appointment. All the
assignments preferably should be uploaded on online learning tool. Various research
papers/reference material will be mailed/uploaded on online learning platform time to time.

Attendance: Students are required to have minimum attendance of 75% in each subject.
Students with less than said percentage shall NOT be allowed to appear in the end semester
examination.

Passing criterion: Student has to secure minimum 30%/40% marks of the “highest marks in
the class scored by a student in that subject (in that class/group class)” individually in both the
‘End-Semester examination’ and ‘Total Marks’ in order to pass in that paper.

 Passing Criterion for B. Tech: Minimum 30% and 40% of the highest marks in the
class applicable to the students admitted before July 2015 and onwards July 2015
respectively.

 Passing Criterion for M. Tech: minimum 40% of the highest marks in the class

K. Course outcome assessment

To assess the fulfilment of course outcomes two different approaches have been decided.
Degree of fulfillment of course outcomes will be assessed in different ways through direct
assessment and indirect assessment. In Direct Assessment, it is measured through quizzes,
tests, assignment, Mid-term and/or End-term examinations. It is suggested that each
examination is designed in such a way that it can address one or two outcomes (depending
upon the course completion). Indirect assessment is done through the student survey
which needs to be designed by the faculty (sample format is given below) and it shall be
conducted towards the end of course completion. The evaluation of the achievement of
the Course Outcomes shall be done by analyzing the inputs received through Direct and
Indirect Assessments and then corrective actions suggested for further improvement.

Sample format for Indirect Assessment of Course outcomes

 NAME:
ENROLLMENT NO:
SAP ID:
COURSE: Computer System Architecture.
PROGRAM: B.Tech CS CCVT

Please rate the following aspects of course outcomes of Computer System Architecture.
Use the scale 1-4*

Sl. 1 2 3 4
No.
1 CO1. Identify Functional Units, Bus Structure and
Addressing Modes.
2 CO2: Design Digital Components including – Decoder,
Multiplexer and Arithmetic Circuits and Design
Arithmetic and Control Unit.
3 CO3: Learn the Design of Arithmetic Unit, Logic Unit
and Control Unit.
4 CO4: Understand the Design of Hardwired &
Microprogrammed Control Unit.
5 CO5: Identify the Memory Hierarchy and its
Performance.

6 CO5: Identify the Memory Hierarchy mapping and its

Performance, and Understanding the Interface of
ALU with I/O devices.

* 1 Below Average 3 Good

2 Average 4 Very Good