Noter Maskinær Programmering
Noter Maskinær Programmering
Peter Juul
February 2024
1 kapitel 1
"What appears to be a very complex organism is really just a very large, systemati-
cally interconnected collection of very simple parts. Our job throughout this book is
to introduce you to those very simple parts and, step-by-step, build the interconnected
structure that you know by the name computer"
1
We represent that using 1s and 0s, and we do not differentiate between how low or
high voltage, exactly.
We only care wheather ther is or isn’t a large enough voltage relative to zero volts
to identify as 1. Meaning, the absence or presence of of a reasonable voltage rela-
tive to 0 volts is what will determine wheather the voltage of the component will be
represented as 1 or 0. "
We will further see how those transistors are combined into larger structures that
perform operations,such as addition, and into structures that allow us to save in-
formation for later use.
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1.2 The contents of the chapters
• Chapter 2: info processing and binary digits
• Chapter 8: stacks, queues, and character strings, and how to implement them
• chapter 9: LC-3 I/O and services provided to a computer user by the operating
system
• Chapter 11 & 12: Introduction to High level programming and the C lan-
guage.
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1.3 TWo basic recurring themes: Abstraction & Hardware v
Software
1.3.1 Abstraction
What is abstraction in simple terms?
Abstraction (from the Latin abs, meaning away from and trahere , meaning to draw)
is the process of taking away or removing characteristics from something in order
to reduce it to a set of essential characteristics.
It allows us to not get bogged down in the detaill when everything about that detail
is working just fine.
Whatever word you prefer to use, it descripes the ability to go from the abstrac-
tion part back to its components part.
First story: A driver needs to traverse the Arizona desert during the hottest part of
summer. This driver is from Palo Alto, which is a millder climate, compared to the
arizona desert, so he figures that he should ask a mechanic to check out the cooling
system of the car. The problem is that the driver hasn’t considered that he needed
a more capable cooling system, because he’ll be needing it when he’s traversing the
arizona desert, and therefore has to waste two days to get an essential car compo-
nent shipped to him.
second story: General Electric had technical problems with one of thier gener-
ators and did not know how to fix this issue. On the front of the generator were
lots of dialscontaining lots of information, and lots of screws that couldbe rotated
clockwise or counterclockwise as the operator wished. Something on the other side
of the wall of dials and screws was malfunctioning and no one knew what to do.
GE called in an expert, who waas presumebly too qualified for ths problem, be-
cause this expert figured out that he/she just had to rotate one of the screws, 35
degrees, and preoceeded to charge a 1000 dollars for the job, without further elab-
oration. GE wanted an explanation of why two minutes of work, would cost a 1000
dollars, an GE aquired a new bill, which stated:
Turning a screw 35 degress counterclockwise: 0.75 $
Knowing which screww to turn and by how much: 999.25 $
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So what is the essential idea of these two stories?
It’s more efficient to think of the entities of the stories as abstractions, and And as
long as nothing untoward happens, we are OK
The implication is that the person knows a whole lot about one of these two things
and precious little about the other.
Take the approach that hardware and software are names for components of two
parts of a computing system that work best when they are designed by people who
take into account the capabilities and limitations of both
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1.4 Chapter 1.4 A computer system
Definition of a computer according to Patt & Pattel:
"a system consisting of the software (i.e., computer programs) that directs and spec-
ifies the processing of information and the hardware that performs the actual pro-
cessing of information in response to what the software asks the hardware to do."
• was approximately 8 feet high, more than 100 feet wide, and about 3 feet
deep (about 300 square feet of floor space)
• Instead of 30 tons, it weighed about 1 ton, and instead of 140 kW, it required
approximately 25 kW to operate.
The lesson here is that todays computers (being desktops, laptops or smartphones)
weights and energy requirements have decreased enormously, and the speed at
which they process information has also increased enormously.
Patt & patel estimates that that the computing power in a smartphone today (i.e.,
how fast we can compute with a smartphone) is more than four million times the
computing power of the ENIAC.
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comparing an old microprocessor to a present-built micropocessor
• The first microprocessor, the Intel 4004 in 1971, contained 2300 transistors
and operated at 106 KHz.
Here’s the general reason of why computing history has been evolving so rapidly.
The fact that each operation can be performed in one millionth of the time it took
in 1971 means the microprocessor can do one million things today in the time it
took to do one thing in 1971. The fact that there are more than a million times as
many transistors on a chip means we can do a lot more things at the same time
today than we could in 1971.
In essence how blazingly fast very simple mindless operations (many at the same
time) can be carried out is the primery reason why this rapid evolvement has
occured.
• disks and USB memory sticks of one sort or another for storing information
for a very long time, even after the computer has been turned off
The difficulty with analog machines is that it is very hard to increase their
accuracy.
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This is why digital machines—machines, that perform computations by
manipulating a fixed finite set of digits or letters—came to dominate computing.
Digital watches give the time in digits. You can increase accuracy just by adding
more digits. For example, if it is important for you to measure time in hundredths
of a second, you can buy a watch that gives a reading like 10:35.16 rather than just
10:35.
The main limitation of analogmachines is that they could do only one specific kind
of computation. If you owned only an adding machine and wanted to multiply two
integers, you had some pencil-and-paper work to do.
Computer are more modular, being their universal nature. Basically to can tell
your computer what to do.
The reason why computers have become so prolific as thhey have today, is Wwen
you think of a new kind of computation, you do not have to buy or design a new
computer. You just give the old computer a new set of instructions (a program) to
carry out the new computation
He gave a mathematical description of this kind of machine, but did not actually
build one
• writing symbols according to certain rules when other symbols are present,
ETC.
He abstracted these actions and specified a mechanism that could carry them out.
CHECK OUT: FIGURE 1.7, PAGE 14, 74 PDF. Black box models.
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• the operation to be performed is described in the box.
• The data elements on which to operate are shown as inputs to the box. The
result of the operation is shown as output from the box.
Turing machines can compute anything that can be computed because they are
programmable.
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1.7 chapter 1.7 Getting the elctrons to do the work
The diagram below illustrates the process, we must go through to get the electrons
in our underleing circuits to do our bidding. We call the steps of this process the
“Levels of Transformation.”
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1.7.1 Da algorithm.
• An algorithm is a step-by-step procedure that is guaranteed to terminate,
such that each step is precisely stated and can be carried out by the
computer. There are terms to describe each of these properties.
• effective computability to describe the notion that each step can be carried
out by a computer.
The next step is to transform the algorithm into a computer program in one of the
programming languages that are available. Programming languages are
“mechanical languages.” That is, unlike natural languages, mechanical languages
did not evolve through human discourse. Rather, they were invented for use in
specifying a sequence of instructions to a computer. Therefore, mechanical
languages do not suffer from failings such as ambiguity that would make them
unacceptable for specifying a computer program.
In the second half of this book, we will use C and C++, languages that were
designed for manipulating low- level hardware structures.
There are two kinds of programming languages, high- level languages and
low-level languages.
Low-level languages are tied to thecomputer on which the programs will execute.
There is generally one such low-level language for each computer.That language is
called the assembly language for that computer
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1.7.2 The ISA (Instruction Set Architecture)
ISA defines the interface between the hardware and software of a computer
system. It encompasses the set of instructions that a processor can execute, along
with the format and encoding of these instructions. Key components of ISA
include:
• Registers: The set of storage locations within the processor used for
temporary data storage and manipulation during instruction execution.
• The ISA specifies the mechanisms that the computer can use to figure out
where the operands are located. These mechanisms are called addressing
modes.
• The ISA also specifies the number of uniquelocations that comprise the
computer’s memory and the number of individual 1s and 0s that are
contained in each location.
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To translate from a program written in C to the x86 ISA, one would need a C to
x86 compiler. For each high-level language and each desired target ISA, one must
provide a corresponding compiler. The translation from the unique assembly
language of a computer to its ISA is done by an assembler.
1.7.3 Da microarchitecture
The microarchitecture is the implmentation of the ISA.
"The automobile’s “ISA” describes what the driver needs to know as he/she sits
inside the automobile to make the automobile carry out the driver’s wishes. All
automobiles have the same ISA. If there are threepedals on the floor, it does not
matter what manufacturerproduced the car, the middle one is always the brake.
The one on the right is always the accelerator, and the more it is depressed, the
faster the car will move.
Because there is only one ISA for automobiles, one does not need one driver’s license
for Buicks and a different driver’s license for Hondas"
Here all automobile makes and models can be different, depending on what
cost/performance tradeoffs the automobile designer made before the car was
manufactured.
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2 Chapter 2: Bits, Data Types and operations
2.1 Bits and datatypes - the bit as the unit of information
In essence, we don’t need to know the exact amount of voltage, we just need to
detect wheather there is a voltage or not.
But to get useful work done by a computer, we’ll be interested deferentiate larger
numbers of distingt values - and each of these values will be assigned to a "unique
representation".
The above will be accomplished the wires, that being the bits of the system - BY
COMBINING THOSE BITS.
For example, 8 bits can represent a particular value like 010011110. But because
we only have 8 bits to represent numbers with, we can only differentiate between
256 = 28 , due to the fact that bits can represent a 1 or a 0.
In general, with k bits, we can distinguish at most 2k distinct items. Each pattern
of these k number of bits is a code; that meaning, that it corresponds to a
partikular item (or value).
Each instruction set architecture (ISA) has its own set of data types and its own
set of instructions that can operate on those data types
we will mainly use two data types: 2’s complement integers for representing
positive and negative integers that we wish to perform arithmetic on, and ASCII
codes for representing characters that we wish to input to a computer via the
keyboard or output from the computer via a monitor.
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2.1.2 int data types - unsigned integers
An unsigned integer has no sign (plus or minus) associated with it. An unsigned
integer just has a magnitude.
Unsigned integers are widely used in computers, here are two examples:
We could cut the number of bits available (that being 2k number of bits)
and cut that number in half. One half dedicated to positive numbers and
the other half, dedicated to negative numbers.
Since 25 is 32 we still have two 5-bit codes unassigned. One of them, 00000, we
would presumably assign to the value 0, giving us the full range of integer values
from –15 to +15. That leaves one 5-bit code left over, and there are different ways
to assign this code.
Since there are k number os bits, we’ll use half the 2k number of codes to
represent integers from 0 to 2k−1 − 1, and each of these integers will have a
leading 0 in their representation. Check out the table on the next page.
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Figure 5: Table of four representations of 5-bit integers
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3 Chapter 4 - The von neumann model
In this chapter we will write our first computer program in the ISA of the LC-3.
• (a) a computer program that specifies what the computer must do to perform
the task
The von Neumann model consists of five parts: memory, a processing unit, input,
output, and a control unit.
Here’s a brief descibtion of how the parts of the von neumann model interact with
each other:
The computer program is contained in the computer’s memory. The data the
program needs to carry out the work of the program is either contained in the
program’s memory or is obtained from the input devices.
The results of the program’s execution are provided by the output devices. The
order in which the instructions are carried out is performed by the control unit.
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The MAR and the MDR:
1. Function:
• MAR (Memory Address Register): The MAR holds the address of the
memory location from which data is to be fetched or to which data is to be
stored.
• MDR (Memory Data Register): The MDR holds the actual data that is
fetched from memory or that is to be stored into memory.
2. Usage:
• MAR: The processor places the address of the memory location it wants to
access into the MAR before initiating a memory operation (read or write).
• MDR: During a read operation, the data fetched from the memory location
addressed by the MAR is transferred into the MDR. During a write
operation, the data to be stored into memory is first placed into the MDR
before being written to the memory location addressed by the MAR.
3. Size:
• MAR: Typically, the size of the MAR is determined by the maximum memory
addressable by the computer’s architecture. It holds the address in binary
form.
• MDR: The size of the MDR corresponds to the word size or data bus width of
the computer architecture. It can hold one word of data at a time.
• MAR: The CPU interacts with the MAR to specify the memory address for
memory operations such as reading or writing data.
• MDR: The CPU interacts with the MDR to retrieve data from memory
(during a read operation) or to store data into memory (during a write
operation).
• MAR: The MAR plays a crucial role in the fetch phase of the instruction
cycle, where it holds the address of the instruction to be fetched from
memory.
• MDR: The MDR is involved in both the fetch phase (for instruction fetching)
and the execution phase (for data retrieval or storage) of the instruction
cycle.
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Figure 6: Location 6 contains the value 4; location 4 contains the value 6
subsubsectionparts of the von neuman model - 2 the processing unit The simplest
processing unit(which we’ll be using), and the one normally thought of
whendiscussing the basic von Neumann model, is the ALU(Arithmetic and Logic
Unit).
The ALU is capable of performing basic arithmetic functions (like ADD and
SUBTRACT) and basic logic operations (like bit-wise AND, OR, and NOT).
LC-3 has an ALU, which can perform ADD, AND, and NOT operations.
• The ALU normally processes data elements of a fixed size referredto as the
word length of the computer. The data elements are called words.
• For example, to perform ADD, the ALU receives two words as inputs and
produces a single word (the sum) as output.
• Each ISA has its own word length, depending on the intended use of the
computer.
Most microprocessors today that are used in PCs or workstations have a word
length of 64 or 32 bits. However, the microprocessors used in very inexpensive
applications often have word lengths of as little as 16 or even 8 bits.
In the LC-3, the ALU processes 16-bit words. We say the LC-3 has a word length of
16 bits.
all results are being stored temporarily to avoid longer access times, which is good,
because in most cases (like multiplying), because we’ll most likely need to get that
temporary value to complete the multiplication.
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But also because the temporary values will be needed to produce additional results
in the near future. Think of the expression ( A + B) · C . We must access the result of
A + B to complete this expression.
Typically, the size of each register is identical to the size of values processed by the
ALU; that is, they each contain one word. The LC-3 has eight registers (R0,R1, ...
R7), each containing 16 bits.
3.1.2 parts of the von neuman model - 3 & 4 Input and output
In the LC-3 we will have the two most basic input and output devices. For input,
we will use the keyboard; for output, we will use the monitor.
There are, of course, many other input and output devices in computer systems
today. For input we have among other things the mouse, digital scanners.
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3.2 Instruction processing
The central idea in the von Neumann model of computer processing is that the
program and data are both stored as sequences of bits in the computer’s memory,
and the program is executed one instruction at a time under the direction of the
control unit.
The most basic unit of computer processing is the instruction. It is made up of two
parts, the opcode (what the instruction does) and the operands (who it does it
to!).
There are fundamentally three kinds of instructions: operates, data movement, and
control:
Operate instructions operate on data. The LC-3 has three operate instructions:
one arithmetic (ADD) and two logicals (AND and NOT).
Data Movement instructions move information from the processing unit to and
from memory and to and from input/output devices. The LC-3 has six data
movement instructions.
Control instructions are necessary for altering the sequential processing of
instructions.
An LC-3 instruction consists of 16 bits (one word), numbered from left to right, bit
[15] to bit [0]. Bits [15:12] contain the opcode. This means there are at most
24 = 16 distinct opcodes.
ADD, AND and LD instruction diagrams on page 129 book, 230 pdf.
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The Instruction Cycle: Instruction cycle (def): The entire sequence of steps
needed to process an instruction.
The instruction cycle is a fundamental process in computer architecture,
consisting of several stages(or phases as Patt and Pattel calls them)
The instruction cycle consists of six sequential phases, each phase requiring zero
or more steps. We say zero steps to indicate that most computers have been
designed such that not all instructions require all six phases.
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The instruction cycle is not the same as a clock/machine cycle
1. FETCH: The CPU retrieves the next instruction from memory using the
program counter (PC) to determine the instruction’s address. The fetched
instruction is stored in the instruction register (IR).
2. DECODE: In this phase, the CPU interprets the opcode of the instruction
stored in the IR to determine the operation to be performed and the involved
operands. It identifies the instruction type and any addressing modes
specified.
5. EXECUTE: Once the instruction and operands are ready, the CPU performs
the specified operation, such as arithmetic or logical calculations, data
movement, or control flow operations.
6. STORE RESULT: After execution, the CPU may store the result back into
memory or registers, depending on the nature of the instruction.
The instruction cycle is a repetitive process that forms the basis of instruction
execution in a computer system. This process will continue until the program
terminates or encounters a branch or jump instruction that alters the program
flow.
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The program counter during FETCH:
In order to carry out the work of an instruction, we must first identify where it is.
The program counter (PC) contains the address of the next instruction to be
processed.
That’s due to the fact that the PC performs an increment during the FETCH
phase. First the MAR is loaded with the contents of the PC. Next, the memory is
interrogated, which results in the next instruction being placed by the memory
into the MDR. Finally, the IR is loaded with the contents of the MDR.
At this point, we should be ready to proceed to next phase of the instruction cycle -
Decode
phase of the next instruction will load into the IR the contents of the next memory
location, provided the execution of the current instruction does not involve
changing the value in the PC.
clock cycles:
the amount of time taken by each machine cycle is one clock cycle. In fact, we often
use the two terms interchangeably. Step 1 takes one clock cycle. Step 2 could take
one clock cycle or many clock cycles, depending on how long it takes to access the
computer’s memory. Step 3 takes one clock cycle. In a modern digital computer, a
clock cycle takes a very small fraction of a second.
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DECODE - complete description
1. The DECODE phase examines the instruction in order to figure out what the
microarchitecture is being asked to do.
3. Input is the four-bit opcode IR [15:12]. The output line asserted is the one
corresponding to the opcode at the input.
EVAL ADRESS - complete description This phase computes the address of the
memory location that is needed to process the instruction.
LD instruction
The LD instruction causes a value stored in memory to be loaded into a register. In
that example, the address was obtained by sign-extending bits [8:0] of the
instruction to 16 bits and adding that value to the current contents of the PC.
This calculation was performed during the EVALUATE ADDRESS phase.
It is worth noting that not all instructions access memory to load or store
data.
For example, we have already seen that the ADD and AND instructions in the
LC-3 obtain their source operands from registers or from the instruction itself and
store the result of the ADD or AND instruction
in a register. For those instructions, the EVALUATE ADDRESS phase is not needed
This phase obtains the source operands needed to process the instruction. In the
LD example, this phase took two steps: loading MAR with the address calculated
in the EVALUATE ADDRESS phase and reading memory that resulted in the
source operand being placed in MDR.
ADD example:
In the ADD example, this phase consisted of obtaining the source operands from
R2 and R6.
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Execute - complete description
This phase carries out the execution of the instruction. In the ADD example, this
phase consisted of the step of performing the addition in the ALU.
In the case of the ADD instruction, in many computers this action is performed
during the EXECUTE phase. That is, in many computers, including the LC-3, an
ADD instruction can fetch its source operands, perform the ADD in the ALU, and
store the result in the destination register all in a single clock cycle.
Once the instruction cycle has been completed, the control unit begins the
instruction cycle for the next instruction, starting from the top with the FETCH
phase.
Since the PC was updated during the previous instruction cycle, it contains at this
point the address of the instruction stored in the next sequential memory location.
Thus, the next sequential instruction is fetched next. Processing continues in this
way until something breaks this sequential flow, or the program finishes execution.
It is worth noting again that although the instruction cycle consists of six
phases, not all instructions require all six phases
LC-3 ADD instruction does not require a separate EVALUATE ADDRESS phase
or a separate STORE RESULT phase. The LC-3 LD instruction does not require
an EXECUTE phase.
On the other hand, there are instructions in other ISAs that require all six phases.
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Changing the Sequence of Execution:
In some cases, the sequence of instruction execution may need to be altered,
typically to implement conditional or unconditional branch instructions. This
section discusses mechanisms for changing the sequence of execution:
• Procedure Calls and Returns: Subroutine calls and returns allow for
modular programming by enabling the execution of separate code segments.
The CPU maintains a stack to keep track of return addresses when
executing subroutine calls.
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BRANCHES - complete decription The purpose of branches:
conditional branch(BR), which either changes the contents of the PC or does not
change the contents of the PC, depending on the result of a previous instruction
(usually the instruction that is executed immediately before the conditional branch
instruction)
Branch specifics:
• the addressing mode bits (bits [8:0]) that are used to form the address to
be loaded into the PC if the result of the previous instruction agrees with the
test specified by bits [11:9].
• The addressing mode, i.e., the mechanism used to determine the actual
address, is the same one we used in the LD instruction.Bits[8:0] are
signextended to 16 bits and then added to the current contents of PC
• Bits [11:9] = 101 specifies that the test to be performed on the most recent
result is whether or not that result is something other than 0
• For now, we will just use one test: Is the result not zero? Bits [8:0] is the
value –6.
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Assume the previous instruction executed (in memory location x36C8) was an
ADD instruction and the result of the ADD was 0. Since the test “not-zero” failed,
the BR instruction would do nothing during its EXECUTE phase, and so the next
instruction executed would be the instruction at location: M[x36CA], the address
of the result of incrementing the PC during the FETCH phase of the BR
instruction’s instruction cycle.
On the other hand, if the result of the ADD instruction is not 0, then the test
succeeds, causing the BR instruction to load PC with x36C4, the address formed by
sign-extending bits [8:0] to 16 bits and adding that value (-6) to the incremented
PC (x36CA).
Thus, the next instruction executed after the BR instruction at x36C9 is either the
instruction at x36CA or the one at x36C4, depending on whether the result of the
ADD instruction was zero or not zero
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Control of the Instruction Cycle: Controlling the instruction cycle involves
coordinating the various stages of instruction processing and managing the flow of
instructions within the CPU. This section discusses mechanisms for controlling the
instruction cycle:
• Control Unit (CU): The control unit is responsible for directing the
operation of the CPU and coordinating the execution of instructions. It
generates control signals to regulate the activities of other components, such
as the ALU, registers, and memory.
These control mechanisms play a critical role in managing the instruction cycle
and optimizing CPU performance, enabling efficient instruction execution and
resource utilization.
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