IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 67, NO.

7, JULY 2020 5467

Multiport Interline Current Flow Controller for

Meshed HVDC Grids
Joan Sau-Bassols , Student Member, IEEE, Ricard Ferrer-San-José, Student Member, IEEE,
Eduardo Prieto-Araujo , Member, IEEE, and Oriol Gomis-Bellmunt , Senior Member, IEEE

Abstract—In meshed high voltage direct current grids, grids, the power flows cannot be controlled independently for
the current of each line cannot be controlled independently, each line, but are determined passively by the resistances be-
since it depends on the resistances between nodes. Ad- tween nodes. This may lead to uncontrolled power flows that
ditional devices, such as current flow controllers (CFCs),
may be needed to avoid bottlenecks or line overloads. This can create overloads or bottlenecks in the lines, thus restricting
work presents a multiport dc–dc-based CFC topology to be the overall operation of the HVdc network. In order to over-
connected to n lines with unidirectional current flows. The come this challenge, additional devices might be installed on
device is able to control the dc lines’ currents to the de- the HVdc grid to regulate the power flows [6]. Those devices
sired value by inserting variable voltage sources in series. based on power electronics are named power flow controllers
First, the modeling of the generic n-port topology is pre-
sented and then, its modulation and control strategy are or current flow controllers (CFC) and are the equivalent to flex-
described. In the first case study, the concept is validated ible alternating current transmission systems for HVdc grids
considering a 5-port CFC by means of dynamic simulations [8], [9].
using different control methods. Finally, in the second case The operation of the CFCs is based on inserting variable volt-
study, a 3-port CFC prototype is built and tested in an ex- age sources in series with the lines that modify their effective
perimental platform in the laboratory considering different
control modes. impedance, and by doing so, they can regulate the currents that
are circulating through them [9]. The number of CFC topologies
Index Terms—Current flow controller (CFC) prototype, that can be found in the literature is increasing, and they can be
dc–dc converter, meshed HVdc grid, multiport, power flow
control.
gathered in three major groups: Variable resistances, ac–dc con-
verters and dc–dc converters. Variable resistances are a simple
I. INTRODUCTION solution but they have the disadvantage of increasing the losses
of the system [10]. AC–DC converters apply voltages on the
N THE last years, many voltage source converter-based high
I voltage direct current links (VSC-HVdc) have been installed
as a means of transmitting large amounts of power over long
dc lines by exchanging power with the ac grid, which requires
an insulation transformer that can augment the cost of the de-
vice [11], [12]. DC–DC converter-based CFCs are connected
distances [1]. Their advantages lie in the possibility to control
between dc lines and they can regulate the current flows by ex-
active and reactive power independently, the blackstart capa-
changing power inside the dc grid [13]–[25]. The behaviour of
bility and a reduced footprint compared to line commutated
the dc-based CFCs during faults in the HVdc grid is investigated
converter-based HVdc [2]. Among VSC, modular multilevel
in [17], [26] providing some countermeasures to protect the de-
converters are seen as the key technology due to their modular-
vices. Also, the integration of the CFC capabilities into the dc
ity and reduced filter requirements [3]–[5]. Interconnecting the
circuit breakers (DCCB) [27] is analysed in [28], [29] in order
already built HVdc links and forming a multiterminal or meshed
to have two functionalities in a single device, thus, reducing the
HVdc grid can increase the flexibility and redundancy of the sys-
total cost. Finally, some research has been done trying to iden-
tem [6], [7]. Nevertheless, this comes at a cost, since in meshed
tify multiport dc–dc topologies to be connected to any number
of lines [24], [25]. The experimental validation of some CFC
Manuscript received November 12, 2018; revised March 13, 2019 and topologies has been presented in [17], [19], [25].
May 25, 2019; accepted July 26, 2019. Date of publication August 14,
2019; date of current version March 4, 2020. This work was supported in
This article presents a n-port dc–dc-based CFC topology for
part by the Spanish Ministry of Science, Innovation and Universities un- unidirectional current flows, which represents the generalisation
der the Projects ENE2015-67048-C4-1-R and RTI2018-095429-B-I00, of the converter introduced in [20], [21] for n lines. The concept
in part by the Fundación Iberdrola and in part by the European Regional
Development Fund. (Corresponding author: Joan Sau-Bassols.)
brings the advantage of a simplified circuit compared to other
The authors are with the Centre d’Innovació Tecnològica en topologies, especially attractive for distributed approaches [23]
Convertidors Estàtics i Accionaments (CITCEA-UPC), Departament where more than one simple CFC is installed and are selectively
d’Enginyeria Elèctrica, ETS d’Enginyeria Industrial de Barcelona, Univer-
sitat Politècnica de Catalunya (UPC), 08028 Barcelona, Spain (e-mail:,
operated according to the overload location, at the expense of
[email protected]; [email protected]; being able to operate only with unidirectional current flows. The
[email protected]; [email protected]). modeling of the converter is provided and its average model is
Color versions of one or more of the figures in this article are available
online at http://ieeexplore.ieee.org.
derived for a generic n number of lines. Then, the modula-
Digital Object Identifier 10.1109/TIE.2019.2934058 tion and control strategy of the converter are also described,

0278-0046 © 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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5468 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 67, NO. 7, JULY 2020

III. CONVERTER MODELING

For simplicity, the following work derives the model of the
converter based on the structure of Fig. 1(a), however, the deriva-
tion is analogous for the structure in Fig. 1(b). The procedure is
the same as the one applied in [15], [20] but for a generic n-port
CFC.

A. Operating Principle
In order to allow a path for the current, there must be always
a switch in ON state and it is assumed that only one of them is
in ON state at a time. Based on this, the following equation is
obtained:

n
tS i = T (1)
i=2

Fig. 1. Scheme of the multiport CFC topology located in Node 1 and where tS i is the time that switch i is in ON state and T is the
connected to n-1 lines. (a) DC currents circulating from Node 1 to the
other lines. (b) DC currents circulating to Node 1 coming from the other period of the switching frequency of the converter. Transforming
lines. the previous expression to duty cycles, yields to:

n
Di = 1 (2)
presenting different control methods to operate the CFC. After, i=2
Case Study 1 presents the dynamic simulation results of two where Di is the duty cycle of switch i.
5-port CFCs based on the presented topology, one located on For instance, Di = 1 implies that switch i remains in ON
the positive pole and the other on the negative pole of a sym- state all the period. Analysing Fig. 1(a) under this situation,
metric monopole 5-terminal meshed HVdc grid. Considerations initially the current from Node 1 flows through the switch i and
regarding CFC losses, ac voltage ripples, and bypass and protec- then is distributed through all the lines. The current finds no
tion are also included. Finally, in Case Study 2, an experimental obstacle through the line connected to switch Si , but regarding
prototype of a 3-port CFC is built and tested in an experimen- the other lines, the current charges the capacitors and increases
tal platform in the laboratory, which represents a scaled down their voltage. Whenever the voltages of the capacitors are high
symmetrical monopole HVdc grid with three terminals. For the enough to block the currents through the other lines, the steady
experimental validation, different control modes of the CFC are state is reached and I1 flows entirely through the line connected
also tested. to switch Si .
The device can be bypassed by turning ON all the switches.
II. MULTIPORT CURRENT FLOW CONTROLLER By doing this, the voltage of the capacitors goes to zero and
the converter is not applying any effect on the dc grid currents.
This article presents a multiport CFC topology, which is able
However, for bypassing permanently the converter, additional
to control the dc current through the lines where it is connected.
external switches are required [20].
The topology is meant for unidirectional current flows and it
Assuming that the line currents remain constant for the fol-
is based on the 3-port concept introduced in [20], [21] but ex-
lowing analysis, when one of the switches is in ON state, a
tended to n lines. The two CFC structures are presented in
voltage between Node 1 and the other lines is applied and it
Fig. 1, depending on the direction of the currents. In Fig. 1(a),
is dependent on the voltage of the capacitors at that time. The
it is assumed that the total current goes into the CFC from
subscript i is used to identify the switch that is in ON state and
Node 1 and then it is distributed between the other lines. On
the subscript j refers to the Node j that is connected to the CFC
the other hand, Fig. 1(b) considers that the currents through the
through line 1j. The following equations describe the voltage
lines enter into the the CFC and the total amount goes out to
between Node 1 and line 1j, assuming no voltage drops on the
Node 1.
switches:
As shown in Fig. 1, taking n as the number of lines where
the converter is connected to, its structure is made of n − 1 V1j = 0, i=j (3)
switches and n − 2 capacitors. The switches require reverse
j −1

blocking voltage capability and the capacitors must allow posi-
tive and negative voltage polarity for the adequate operation of V1j = Ek ,k +1 , i<j (4)
k =i
the converter. For this article, insulated gate bipolar transistors
(IGBTs) with a diode connected in series are assumed to obtain 
i−1

the reverse blocking voltage capability, though other options can V1j = −Ek ,k +1 , i>j (5)
be applicable [20]. k =j

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SAU-BASSOLS et al.: MULTIPORT INTERLINE CURRENT FLOW CONTROLLER FOR MESHED HVDC GRIDS 5469

The current that circulates through each capacitor is given by

(6) and (7).

n
Ic j , j + 1 = I1k , i≤j (6)
k =j +1


j
Ic j , j + 1 = −I1k , i>j (7)
k =2

where, i defines the switch that is ON and and j is used to name

the lines 1j and 1, j + 1 where the capacitor is connected. In
order to have each capacitor balanced, the equation that must be
met for each capacitor between lines 1j and 1, j + 1 is

n
tS i
Ic j , j + 1 = 0 ∀j ≤ n − 1 (8)
i=2
T

and considering the duty cycles of the switches


n
Di Ic j , j + 1 = 0 ∀j ≤ n − 1. (9)
i=2
Fig. 2. Modulation strategy applied to the n-port CFC.
Then, by combining (6), (7), and (8), it is possible to obtain
I1i
Di = n ∀i ≤ n. (10)
i=2 I1i
Based on (10), imposing a duty cycle drives the system to
achieve a certain current relation in order to have the CFC ca-
pacitors balanced, as it was also reported for the 3-port CFC
topology presented in [20]. Then, when a certain duty cycle is
applied, the capacitors will achieve the CFC voltage that pro-
vides the corresponding current relation.
From the previous analysis, the ripple of each CFC capacitor
can be obtained and corresponds to
j j
k =2 I1k (I1 − k =2 I1k )
ΔEj,j +1 = ∀j ≤ n − 1
f Cj,j +1 I1
(11)
The previous equation provides a criterion to select the switching
frequency and the capacitance of the capacitors in the CFC.
The rated voltage value of the CFC capacitors depends on
the required voltage to provide current changes. Then, if a
higher voltage is allowed in the capacitor, the CFC will be Fig. 3. Modulation implemented with logic blocks for a n-port CFC.
able to apply higher voltages in series, which provides a fur-
ther increase in the operational area of the system [15]. It is
a tradeoff between voltage rating of the equipment and CFC
real implementation of the converter, negative dead-times are
capability.
required so that there is always a path for the current through
the converter [20]. The logic implemented to obtain the desired
B. Modulation Strategy signals according to Fig. 2 is illustrated in Fig. 3. Using this
According to (10), imposing a duty cycle defines the current approach and according to (2), it is possible to see that the n-
relation between the corresponding line and the total current port CFC has n − 2 degrees of freedom since when D2 to Dn −1
from Node 1. Based on this, it is possible to control dc currents have been set, Dn achieves a certain value to guarantee a path for
by assigning a duty cycle to each switch according to the desired the current at any time. Other modulation and control strategies
current of that line. Fig. 2 presents the generalised modulation can be studied where more than one switch can be ON at the same
strategy for a n-port CFC. As shown in Fig. 2, the signals sent time. Nevertheless, this article presents the previous modulation
to each switch are time-consecutive in a way that always one of in order to provide an intuitive control of the converter, where
the switches is in ON state. The time that the signal has a value each duty cycle is directly related to the current value of a certain
of 1 is proportional to the duty cycle of that switch. For the line.

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5470 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 67, NO. 7, JULY 2020

Fig. 4. Average model of the n-port CFC made of n − 1 voltage sources

and n − 2 circuits with a capacitor and n − 1 current sources in parallel.

C. Average Model
As illustrated in Section III-A, when one of the switches is
in ON state, a certain voltage, which is dependent on the actual
voltage values of the CFC capacitors, is applied on the lines. Fig. 5. Control methodology for n-port CFC topology with n − 2 con-
Then, knowing the time that each switch is conducting, given troller schemes.
by the duty cycle, it is possible to obtain the average voltage
applied to each line as a function of the CFC capacitor voltages
and the duty cycles of the switches Four control methods are included in the methodology as

n Fig. 5 shows. CFC bypass (included in the Modulation), direct
V 1j = Di V1j , 2≤j≤n (12) control of the duty cycle through a ramp limiter, voltage control
i=2 of each of the capacitors in the CFC, and a current controller in
and using (3)–(5) yields to cascade with the voltage controller to regulate the line currents
j −1 j −1
and at the same time maintaining the CFC voltages under the
  
n 
i−1
ratings.
V 1j = Di Ek ,k +1 − Di Ek ,k +1 , 2 ≤ j ≤ n.
By using the voltage control (left switch in the upper position
i=2 k =i i=j +1 k =j
(13) and right switch in the lower position), it is possible to regulate
∗
Fig. 4 illustrates the average model of the n-port CFC where the capacitor voltage to the desired value, Ej,j +1 . However,
a variable voltage source is placed between Node 1 and each by using this method, there is no control of the corresponding
line. An additional circuit is introduced for each capacitor in line current since the current controller of the corresponding
the CFC, which is composed of a capacitor and several current control scheme is not used. If the left switch is in the lower
sources in parallel that represent the charging and discharging position, the current controller is used and then, the voltage
∗
of the capacitors of the CFC due to the dc line currents. The reference for the capacitor, Ej,j +1 , cannot be freely chosen, as
analytic expression of V 1j and Icj,j +1 can be obtained from it achieves the value required to impose the desired line current.
(6), (7), or (13). By introducing a saturation limit in the current controller it
is possible to maintain the voltage of the capacitor below the
D. Control Methodology threshold.

According Section III-A, the dc currents circulating through

the n-port CFC can be controlled by imposing the correspond- IV. BYPASS AND PROTECTION CONSIDERATIONS
ing duty cycle Dj . Nevertheless, in order to have a closed-loop Due to the unidirectional nature of the n-port CFC considered
control of the current and maintain the voltage of the capaci- in this article, additional protection equipment must be installed
tors under certain limits, the following control methodology is to allow bidirectional current flows through the CFC device and
presented (see Fig. 5), which is based on the control scheme prevent overvoltages and overcurrents.
introduced in [20] for the 3-port CFC. Based on the protection equipment for the 3-port CFC pre-
Based on the average model in Fig. 4, each voltage V 1j de- sented in [20], an extended protection scheme is outlined for the
pends on the voltage of the capacitors and the duty cycles applied n-port CFC device, which is depicted in Fig. 6.
to the switches. Each duty cycle Dj is associated to the current Although this represents an increase in the number of switches
of line 1j and n − 2 currents can be regulated independently, required for the implementation of the multiport CFC, such pro-
which correspond to the number of CFC capacitors and each of tection equipment or a similar one may be also needed for bidi-
the controller schemes in Fig. 5. rectional multiport CFCs; since the normal operation switches

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SAU-BASSOLS et al.: MULTIPORT INTERLINE CURRENT FLOW CONTROLLER FOR MESHED HVDC GRIDS 5471

Fig. 6. Additional protection equipment for the unidirectional n-port

CFC topology.

may not be rated for the fault current, requiring then, another
path to divert the current [26].
In parallel with each switch Si , two switches are added. A
Bidirectional switch based on power electronics (PE), to be
able to switch ON fast, and a Mechanical switch that allows the
bypassing of the CFC with low losses with slower turn-ON. Also,
in series with each capacitor, a normally closed (NC) switch is Fig. 7. Scheme of a 5-terminal meshed HVdc grid with two 5-port
included to avoid the short-circuit of the capacitor when the CFCs considered for the dynamic simulation. (a) 5-terminal HVdc grid.
(b) Scheme of the 5-port CFC of the positive pole. (c) Scheme of the
aforementioned bidirectional switches are turned ON. 5-port CFC of the negative pole.
The procedure to bypass the CFC when abnormal situations
happen is as follows: first, the NC switches should be opened in
order to isolate the capacitors and must be coordinated with the TABLE I
HVdc GRID PARAMETERS
CFC switches Si , which should be turned ON to allow always
a path for the current. Then, the first set of bidirectional PE
switches can be activated without short-circuiting the capacitors.
The second set of Mechanical switches (with slower turn-ON
time and lower losses) can be then closed to provide a path for
the current with less losses. The previous switches can also be
used to maintain the CFC in bypass mode if its operation is not
required and allow any current flow in the HVdc grid.
Additionally, the possibility of integrating the CFC capability TABLE II
into DCCBs can be considered, as well for the multiport CFC. CFC PARAMETERS
This concept allows to have a single device that can interrupt
both dc faults and also has CFC capability, which has been
studied for a 3-port CFC in [28].

V. CASE STUDY 1: SIMULATIONS OF A 5-PORT CFC

A. System Description
This case study considers a 5-terminal meshed HVdc grid as and the remaining nodes perform power control. The cables
the one illustrated in Fig. 7(a). Two 5-port CFCs are installed of the dc grid are modelled using two sections of the parallel
in Node 1, one in the positive pole and the other in the negative series branches model proposed in [30], whose parameters are
pole. Both converters are shown, respectively, in Fig. 7(b) and obtained from [31], both model and parameters are the same
7(c), and their switching model is used for the simulations. ones as in [20]. Tables I and II depict the parameters of the
Node 1 operates as a slack bus keeping constant the dc voltage HVdc grid and the 5-port CFC.

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5472 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 67, NO. 7, JULY 2020

Fig. 8. Controller schemes applied to the 5-port CFCs of the positive

and negative poles.

Based on (11), the capacitance of the capacitors in the 5-port

CFC is selected imposing a maximum ripple in its voltage. The
switching frequency is set at fsw = 2 kHz and the maximum
Fig. 9. Simulation results. (a) Node voltages. (b) Node powers. (c) First
ripple is defined to be 250 V, which represents 0.0625 pu of set of line currents in the positive pole. (d) First set of line currents in
the nominal CFC voltage. Considering, then a capacitance of the negative pole. (e) Second set of line currents in the positive pole.
1.1 mF for all the capacitors, the maximum expected ripple is (f) Second set of the line currents in the negative pole.
248.59 V, assuming the nominal value of I1 is 2187.5 A.
The average voltages applied on the lines by the 5-port CFC in cascade. The voltages of the capacitors E34p and E34n are
in the positive pole, according to (13) are regulated to show the capability of the CFC to directly control
V 12 = − D3 E23 − D4 (E23 + E34 ) − D5 (E23 + E34 + E45 ) the voltage according to a reference value. Finally, regarding
(14) the currents of lines 14, their duty cycle D4 is imposed, which
represents an open-loop control of the percentage of current that
V 13 = D2 E23 − D4 E34 − D5 (E34 + E45 ) (15) flows through both lines.
V 14 = D2 (E23 + E34 ) + D3 E34 − D5 E45 (16) Initially, before instant t = 2 s, the CFCs are bypassed with
all the switches in ON state. The duty cycle of the switches in
V 15 = D2 (E23 + E34 + E45 ) + D3 (E34 + E45 ) + D4 E45 . those conditions, neutral duty cycle (NDC), can be obtained
(17) from measuring the currents through each line and applying
(10). Then, the NDCs are used to initialise the controllers to
Fig. 8 illustrates the controller schemes used to control the
provide a smooth start-up of the converter [20].
5-port CFCs and the parameters of the controllers are shown in
After t = 2 s, step changes in the current reference of I12p and
(18) and (19), which are obtained following the same method-
I12n , and the voltage reference of E34p and E34n are introduced.
ology than in [20].
   D4p and D4n are kept at the same value. The CFCs start to
0.004s + 0.4 0.01s2 + 0.08s + 0.85 control the current to the desired value [see Fig. 9(c) and (d)].
Kej (s) = (18)
s s2 + 48.35s + 151.8 The target values are achieved after a transient and the voltages
  of the capacitors are modified to provide such a change [see
2s + 10
Ksj (s) = . (19) Fig. 10(a) and (b)]. At the same time, the two voltage references
s E34p and E34n are achieved in a faster transient as shown in
∗
Fig. 10(a) and (b). Meanwhile, the same duty cycles, D4p and
B. Simulation Results ∗
D4n , are sent to the switches maintaining approximately the
Figs. 9–13 show the simulation results of the 5-port CFCs same current through lines 14 in both poles, and the currents
in the meshed HVdc grid. For this case study, the controller circulating through 15 are adapted accordingly to the remaining
schemes implemented are validated as explained below consid- current of Node 1.
ering current control, voltage control, and duty cycle setting. At instant t = 4 s, a reduction of the 50% of the power in
The currents circulating through lines 12 in both poles are Node 2 happens. Both CFCs are able to maintain the current
controlled in closed-loop using the current and voltage controller value at the reference after a transient [see Fig. 9(c) and (d)] and

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SAU-BASSOLS et al.: MULTIPORT INTERLINE CURRENT FLOW CONTROLLER FOR MESHED HVDC GRIDS 5473

Fig. 12. Detail of the voltages applied by the CFC on the negative pole
(actual and mean value) in each line.

Fig. 10. Simulation results. (a) Voltages of the capacitors in the CFC
on the positive pole. (b) Voltages of the capacitors in the CFC on the
negative pole. (c) Duty cycles of the CFC in the positive pole. (d) Duty
cycles of the CFC in the negative pole.

Fig. 13. Detail of the currents circulating through lines 12, 13, 14, and
15 in the negative pole.

TABLE III
LOSSES CALCULATION

Fig. 11. Detail of the voltages of the capacitors in the CFC on the
negative pole.

the voltage controller also keeps the voltages E34p and E34n to
the target value. In this case, the setting of D4p and D4n at the
same value as before induces a current reduction in both lines
since the total current in Node 1 has been reduced. converter. The parameters of the IGBTs and diodes used for the
Finally, the detail of the capacitor voltages, the voltages ap- calculations are obtained from the ABB StakPack [32] and the
plied on the lines by the CFCs and the line currents are shown switching frequency is f = 2 kHz. Besides, the losses due to
in Figs. 11, 12, and 13, respectively. the resistances in the lines of the negative pole assuming no ac
ripple in the current and with the ripple occasioned by the CFC
C. Losses Calculation
operation are calculated. Table III illustrates the previous results.
In this Section, the losses of the 5-port CFC located at the The losses of the CFC are in the order kW and the conduction
negative pole at instant t = 4 s are calculated. According to losses are higher than the switching losses for the given instant.
the voltage rating of the CFC, six IGBTs in series with the It can be seen that the ac ripple in the line currents have low
corresponding diodes are used to obtain the switches of the effect on the line losses.

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5474 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 67, NO. 7, JULY 2020

Fig. 15. Image of the experimental platform, including the CFC and the
Fig. 14. Scheme of the experimental 3-terminal meshed DC grid with three VSCs.
a 3-port CFC in the laboratory.

D. AC Ripple Consideration
From the previous results, it is possible to see that the op-
eration of the 5-port CFC introduces an ac voltage in series
with the lines, with a certain mean value that allows the current
control. This ac voltage produces an ac ripple in the currents
circulating through the lines where the CFC is connected. In the
previous results (see Fig. 13), the ac current ripple corresponds
to a maximum value around 0.004 pu.
Nevertheless, if the number n is increased, more capacitors
are included in the n-port CFC. In such a situation, and specially
if the capacitors are charged close to the nominal voltage, the
Fig. 16. Detail of the CFC converter.
instant voltage applied in series with the lines can be the sum
of all capacitor voltages plus the ripple in each capacitor, in the TABLE IV
worst case scenario. VSC PARAMETERS
In those conditions the n-port may require additional filters,
such as inductors in series with the lines in order to reduce the
impact of the ac ripple. Assuming that the CFC is located in a
meshed HVdc grid where DCCBs are expected to be installed,
the inductors used in the DCCBs can be used as well to provide
the inductance in series.
Another strategy to reduce the impact of this issue can be
the modification of the modulation strategy for large n values.
For this work, a modulation approach based on a single switch TABLE V
DC LINE PARAMETERS
in ON state at any time is applied. Nonetheless, other strategies
where more than one switch is in ON state can be considered
to deal with this effect, preventing the sum of the voltage of all
capacitors to be applied in series with the lines.

VI. CASE STUDY 2: EXPERIMENTAL VALIDATION OF

A 3-PORT CFC

A. System Description
A 3-port CFC prototype for low voltage is built to provide a are physically emulated using a resistance and an inductance.
validation of the simulation models and is tested in an experi- The 3-port CFC is installed at the positive pole in Node 1, at the
mental platform illustrated in Fig. 14. The platform represents dc output of the cabinet and is depicted in Fig. 16. The device
a dc grid composed of three terminals connected via the dc side is made of two SiC MOSFETs included in two evaluation boards
forming a meshed dc grid. Each terminal consists of a cabinet as from CREE. The two SiC MOSFETs are then connected to the
shown in Fig. 15, which contains an ac transformer, a two-level the PCB that contains the diodes and the capacitors of the CFC.
three-phase VSC with its control board, and several measuring Table IV, V, and VI show the parameters of the VSC, the dc
boards and data acquisition systems. The cables of the dc grid lines, and the CFC, respectively.

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SAU-BASSOLS et al.: MULTIPORT INTERLINE CURRENT FLOW CONTROLLER FOR MESHED HVDC GRIDS 5475

TABLE VI
CFC PARAMETERS

Fig. 18. Experimental results considering a ramped change of the duty

cycle of the CFC in open-loop: Line currents and CFC voltage.
Fig. 17. Control scheme of the experimental 3-port CFC.

A monitoring system based in National Instruments (NI) lab-

view is also implemented in the experimental platform that ac-
quires data regarding the dc voltages and currents of the dc grid.
A NI cRIO 9024 controller is used to collect the data and send
it to the monitoring PC.

B. Control of the Converters

Each of the VSCs of the scaled laboratory setup is controlled
using a digital signal processor (DSP) F28M35 of Texas Instru-
ments (TI). Each VSC operates in voltage droop control [33],
and uses the classic vector control in the dq reference frame for
the current loop [33]. Fig. 19. Experimental results considering a constant duty cycle of
The control of the CFC is implemented in the same control D 2 = 0.5 in open-loop: Current I1 2 p and voltages applied by the CFC
on the lines.
board as VSC 1 and its scheme is illustrated in Fig. 17, which is
based on the one proposed in [20] for the 3-port CFC structure.
As it can be seen in Fig. 17, the CFC has four control modes
implemented. It can be bypassed, with both S2 and S3 in ON charged at 18 V and the current of line 13 is totally diverted into
state; the duty cycle of both switches can be controlled directly line 12.
using a ramp limiter; the CFC can also perform voltage control, Fig. 19 depicts current I12p and the voltages that the CFC is
by regulating the voltage of its capacitor; and finally, a current applying on the grid for a constant duty cycle of D2 = 0.5. It
control of the dc lines is also implemented with an outer current can be seen that the voltage across the CFC capacitor, E23 , is a
controller and an inner voltage controller to limit the voltage triangular waveform, showing the charge and discharge of the
that the CFC is applying. capacitor when the CFC is switching. The voltages applied on
the lines are illustrated also in Fig. 19, showing that whenever
the corresponding switch of the line is in ON state, the voltage
C. Experimental Results
is almost zero and when it is OFF, the voltage applied is the the
For all the tests performed in this section, the power that is voltage of the CFC capacitor (in positive or negative polarity
being injected into the dc grid by VSC 1 is 4.7 kW and the depending on the switch). For such a low scale platform, the
powers extracted from the dc grid by VSC 2 and 3 are 2.1 and voltage drops across the switches play an important role as their
2.3 kW, respectively. value is considerable, around 1.5 V, as it was also reported
1) Open-Loop Control: Figs. 18 and 19 depict the results in [17]. The average values of V12 and V13 correspond to the
considering the open-loop control of the CFC where the duty expressions (1 − D2 )E23 and −D2 E23 , respectively, where its
cycle reference is given to the switches through a ramp rate value is highly affected by the voltage drop. The mean values
limiter to avoid voltage and current transients. of the variables on the graphic are depicted below the legend.
At the beginning of the test, the duty cycle D2 is zero, which 2) Closed-Loop With Voltage Control: Fig. 20 illustrates
implies that S2 is OFF and S3 is ON. All the current I1 circulates the results using the voltage controller to regulate directly the
through S3 and line 13, and the capacitor is charged negatively. voltage across the capacitor of the CFC.
Then, the duty cycle reference changes from 0 to 1. This varia- Fig. 20 shows the results considering a closed-loop control
∗
tion is applied through a ramp, and at the end the capacitor gets for the CFC, where the voltage reference, E23 is given to the

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5476 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 67, NO. 7, JULY 2020

Fig. 20. Experimental results considering a voltage step change in Fig. 22. Experimental results with current control and changes in the
closed-loop using the voltage controller: Line currents and CFC voltage. power of the nodes: Line currents and CFC voltage.

Fig. 21. Experimental results considering a current step change in Fig. 23. Experimental results considering a current step change in
closed-loop using the voltage and current controllers: Line currents and closed-loop using the voltage and current controllers: Line currents of
CFC voltage. the positive and negative pole and the CFC voltage.

voltage controller whose output is the duty cycle of the switches. yet the CFC is able to maintain the current regulation of line 12
Initially, the voltage reference is zero, which means that the CFC to 3 A, after the transient. It is possible to see in Fig. 22, that
is operating with the NDC [20], so that, it does not apply any the voltage of the capacitor achieves a higher value to keep the
change in the currents. Then, the voltage reference is changed current to the same level.
to 10 V and the CFC achieves this value after 40 ms following a Fig. 23 is meant to illustrate the effect that the CFC located
first order system response. Due to the charging of the capacitor, on the positive pole exerts on the negative pole of the grid.
voltages are applied in series with the lines, which provokes a The current I12p is regulated at 4 A, and the capacitor charges
certain change in the line currents. up to 7.5 V to provide such change. The currents through the
3) Closed-Loop With Current Control: Finally, the closed- negative pole, I12n and I13n are not affected while the CFC is
loop current control of the CFC is tested and the results can be changing the currents in the positive pole. Only a small increase
seen in Figs. 21, 22, and 23. This control scheme includes an in the ripple of current I13n can be observed due to the CFC
outer current controller and an inner voltage controller as it is operation.
shown in Fig. 17.
Fig. 21 shows a current step change in current I12 , where
initially, the current through line 12 is zero, and then achieves VII. CONCLUSION
a value of 5 A. The CFC voltage also changes its value and is This article presented a multiport CFC for unidirectional cur-
charged up to 10 V. rent flows that can be connected to n lines. It can regulate the
In Fig. 22, the current of line 12 is being controlled to 3 A, current through those lines in order to prevent overloads by
when, the power reference of VSC 2 goes from 2.5 kW to zero. charging and discharging the CFC capacitors. The modulation
The droop control implemented in each VSC compensates the and control strategy for an n-port CFC was presented and a
unbalance in power, so that the powers from VSC 1, VSC 2, and 5-port CFC was validated using dynamic simulations consider-
VSC 3, end up being −3.9, 0.5, and 3.1 kW, respectively. The ing different control methods. The simulations showed how the
line currents change their values according the new power flow, CFCs located on the positive and negative poles can regulate the

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SAU-BASSOLS et al.: MULTIPORT INTERLINE CURRENT FLOW CONTROLLER FOR MESHED HVDC GRIDS 5477

currents, independently, according to the references and under [20] J. Sau-Bassols, E. Prieto-Araujo, O. Gomis-Bellmunt, and F. Hassan,
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flow controller,” IEEE Trans. Power Del., vol. 27, no. 3, pp. 1205–1212, gree in industrial engineering from the
Jul. 2012. School of Industrial Engineering of Barcelona
[12] S. Balasubramaniam, J. Liang, and C.E. Ugalde-Loo, “An IGBT based (ETSEIB), Technical University of Catalonia
series power flow controller for multi-terminal HVDC transmission,” in (UPC), Barcelona, Spain, in 2014. He received
proc. 49th Int. Universities Power Eng. Conf., 2014, pp. 1–5. the Ph.D. degree in electrical engineering from
[13] C. Barker and R. Whitehouse, “A current flow controller for use in HVDC the UPC, in 2019.
grids,” in Proc. IET Int. Conf. AC DC Power Trans. (ACDC), 2012, Since 2012, he has been with the Cen-
pp. 1–5. tre d’Innovació Tecnològica en Convertidors
[14] S. Balasubramaniam, J. Liang, and C.E. Ugalde-Loo, “Control, dynamics Estàtics i Accionaments, (CITCEA-UPC). His re-
and operation of a dual H-bridge current flow controller,” in Proc. IEEE search interests include renewable generation
Energy Convers. Congr. Expo., 2015, pp. 1–8. systems, high-voltage direct current transmission systems, high-voltage
[15] J. Sau-Bassols, E. Prieto-Araujo, and O. Gomis-Bellmunt, “Modelling and direct current grids, current flow control, and dc–dc converters.
control of an interline Current Flow Controller for meshed HVDC grids,”
IEEE Trans. Power Del., vol. 32, no. 1, pp. 11–22, Feb. 2017.
[16] F. Hassan, R. King, R. Whitehouse, and C. Barker, “Double modulation Ricard Ferrer-San-Jose (S’14) received the
control (DMC) for dual H-bridge current flow controller (2B-CFC),” in degree in industrial engineering from the
Proc. 17th Eur. Conf. Power Electron. Appl., 2015, pp. 1–9. School of Industrial Engineering of Barcelona
[17] S. Balasubramaniam, C. Ugalde-Loo, J. Liang, T. Joseph, R. King, and (ETSEIB), Technical University of Catalonia
A. Adamczyk, “Experimental validation of dual H-bridge current flow (UPC), Barcelona, Spain, in 2015 and is cur-
controllers for meshed HVdc grids,” IEEE Trans. Power Del., vol. 33, rently pursuing a Ph.D. degree in electrical
no. 1, pp. 381–392, Feb. 2018. engineering with UPC.
[18] W. Chen, X. Zhu, L. Yao, X. Ruan, Z. Wang, and Y. Cao, “An Interline He is part of CITCEA-UPC Research Group
DC Power Flow Controller (IDCPFC) for Multi-Terminal HVDC System,” since 2013, and since 2019 he is also an Adjunct
IEEE Trans. Power Del., vol. 30, no. 4, pp. 2027–2036, Aug. 2015. Lecturer with the Electrical Engineering Depart-
[19] W. Chen et al., “A novel interline DC power-flow controller (IDCPFC) for ment at UPC. His main interests are renewable
meshed HVDC grids,” IEEE Trans. Power Del., vol. 31, no. 4, pp. 1719– generation integration, large scale photovoltaic plants, high-voltage di-
1727, Aug. 2016. rect current, and power electronics dominated power systems.

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5478 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 67, NO. 7, JULY 2020

Eduardo Prieto-Araujo (S’12–M’16) received Oriol Gomis-Bellmunt (S’05–M’07–SM’12) re-

the degree in industrial engineering from the ceived the degree in industrial engineering
School of Industrial Engineering of Barcelona from the School of Industrial Engineering of
(ETSEIB), Technical University of Catalonia Barcelona (ETSEIB), Technical University of
(UPC), Barcelona, Spain, in 2011, and the Ph.D. Catalonia (UPC), Barcelona, Spain, in 2001, and
degree in electrical engineering from the UPC, the Ph.D. degree in electrical engineering from
in 2016. the UPC, in 2007.
He joined CITCEA-UPC Research Group in In 1999, he joined Engitrol S.L., Barcelona,
2010, and currently he is a Serra Húnter Lec- Spain, where he worked as Project Engineer in
turer with the Electrical Engineering Department the automation and control industry. Since 2004,
at UPC. He is also a Serra Húnter Lecturer. His he has been with the Electrical Engineering De-
main interests are renewable generation systems, control of power con- partment of the UPC where he is Professor of Electrical Engineering and
verters for high-voltage direct current applications, interaction analysis participates in the CITCEA-UPC Research Group. His research interests
between converters, and power electronics dominated power systems. include the fields linked with electrical machines, power electronics, and
renewable energy integration in power systems.

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