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[?QD[R2QD~®

SERVICE MANUAL
COLOR PPI SONAR
MODEL CH~-14/ 16

0~ FURUNO ELECTRIC. CO., LTD.

NISHINOMIYA, JAPAN
© FURUNO ELECTRIC CO. , LTD. ·Your Local Agent/Dealer

9-52, Ashihara-cho,
Nishinomiya, Japan 662

Telephone: 0798-65-2111
Telefax: 0798-65-4200

FIRST EDITION JUL 1987

[ ...~.~ ..1....~.!.~~-~-~----~-~-~-~-~-~-~-~: .... ~ Printed in Japan

PUB.No.SHE-12610-A
CTUYU) CH-14/16/24/26
- FURU-0 - - - - - - - - - - - - - - - -
SUPPLEMENT TO CH-14/16 SERVICE MANUAL S~-E1261

USING THIS MANUAL FOR CH-24/26

******************

When this manual is used for the CH-24/26, the following differences should
be taken into account.
Item Descriptions
Dispaly Mode CH-14/16: PPI, PPI + Historical
CH-24/26: PPI, PPI +Historical, E/S
Train Step CH-14/16: 5°/step
Spec. CH-24/26: 6°/step -

Range 1 2 3 4 5 6 7 8 9 10 11 12 Unit
Train Speed CH-14/16 7 20 17 21 26 31 36 45 65 84 122 160 Sec.
CH-24/2E 7 7 9 13 17 21 25 33 54 70 102 134 Sec.

DSP Board in CH-14/16: 06P0131

Display Unit CH-24/26: 06P0139
DRV Board
06P0146
in Hull Unit
In the CH-24/26, diode 151588 and
2700pF capacitor are added to
transistors Q5 thru Q8 as shown at
2700pFJL~
Q5-Q8
right to eliminate train motor noise. ~
Circuit This modifi caton has become necessary 151588 ~ ~
because of higher train speed in the
CH-24/26.
The same modification is applied to the CH-14/16 from
August 1988 production to make the pc board
interchangeable with the CH-24/26.

The schematic daigram for DSP board 06P0139 and its parts list is attached on
the followig pages.

T-1
 IFU~UNO CH-24/26 DSP BOARD 06P0139 PARTS LIST
l T-2

SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
IC -IJ ~ ~ 11.
*' :::1-1-'·-IJ
• ~ IC -tit ~~ ~ *! :::1-1-'·.ft
• '*
D!Ol!E )1"1' t- 1'-'\

CR 1 TLG1?4A ooo-135-.:l>\2
PRINTED CIRCUIT P. 0 AR D7 • '!;, ~ 1' 1\";, CR 2 TLG124A 000-135->382
CR 3 TLG124A 000-135-882
A 1 06P0139 D5P CH-24/26 OOb-530-510 CR 4 TLR124 000-135-3R3
CR 5 TLR124 000-135-883
CR 6 TLR124 000-135-883
CR 7 TLR124 000-135-81l3
CAPACITO~ J:J7"Jf1- CR 8 TLR124 000-135-8113
CR 9 TLR124 000-135-883
c 1 RPE132F104ZS 0 O.ll!F sov 000-104-501
155227 IJIOI)t ARr;AY 000-100-996
c 2 RPE132F104ZSO 0.1UF 50 V 000-104-501 CR 10
c 3 RPE132Fl04Z50 0.1UF sov 000-104-501 CR 11 15'>227 DlODE ARRAY 000-100-996
c 4 ECE-AIEU221E 220UF,25V 000-206-106 CR 12 1552?7 D IOOE ARRAY 000-100-996
c 5 RPE132F104Z50 0 .1UF 50 V 000-104-501 CR 13 1S5227 lJIODC ARRAY 000-100-996
c 6 ECE-AIEU221E 220UF,2SV 000-206-106 CR 14 1S52 27 DIODE ARRAY 000-100-996
c 7 RPE132F104Z50 0 .1UF sov 000-104-501 CR 15 1S 52 27 D lODE ARRAY 000-100-996
c 8 ECG-M1H103KVII 0.01UF SOY 000-260-416 CR 16 TLR124 000-135-3113
c 9 242M2502-475"12 4.7liF 25V 000-230-350 CR 17 T l R124 000-135-883
CR us TLR124 000-135-883
c 10 ECE-AlAU222 2200UF 2SV 000-201-705 CR 19 15 513 3 000-103-097
c 11 RPE132F104ZSO O.lUF sov 000-104-501
000-103-097
c 12 242M2502-475M2 4. 7UF 25V 000-230-350 CR 20 155133
CR 21 TLR124 000-135-R83
c 13 RPE132F104ZSO 0 .lUF 50 V 000-104-501
155133 000-103-097
c 14 RPE132F104ZSO 0 .1UF 50 V 000-104-501 CR 22
c 16 EC5FlCElOSE lUF sov 000-232-301 CR 23 TLR124 000-115-883
c 17 RPE132F104l50 0 .llJF sov 000-104-501 CR 24 TLR124 000-US-883
c 18 RPE132F104Z50 0.1LJF sov 000-104-501 Cfl 25 TLR124 0 0 0-13 5-8 8 3
c 19 RPE132F104ZSO 0.1UF SOY 000-104-501 CR 26 155133 000-103-097
CR 27 155133 000-103-097
c 20 RPE132F104Z50 O.lUF 50Y 000-104-501 CR 28 TLR124 000-135-883
c 21 RPE132F104Z50 0 .1UF SOY 000-104-501 CR 29 TLR124 000-135-8R3
c 22 RPE132Fl04ZSO O.lUF 50 V 000-104-501
CR 3C 15513 3 000-103-097
c 23 RPE132F104ZSO 0.1UF sov 000-104-501
TLR124 000-135-883
c 24 RPE132F104Z50 0 .1UF 50 V 000-104-501 CR 31
c 25 RPE132Fl04ZSO 0.1UF sov 000-104-501 CR 32 TLR124 000-135-883
c 26 RPE132Fl04ZSO O.lUF sov 000-104-501 CR 33 155133 000-103-097
c 27 RPE132F104Z50 0.1UF sov 000-104-501 CR 34 15S133 000-103-097
c 28 24?M2502-475"12 4.7UF 25Y 000-230-350 CR 35 155133 o o o -10 3 -o 9 7
CR 36 02BZ2.2 ZENE'R 000-110-385
c 29 RPE132F104Z50 0.1 UF SOY 000-104-501
CR 37 155227 DIODE ARRAY 000-100-996
CR 38 155227 DIODE ARRAY 000-100-996
c 30 RPE132Fl04ZSO O.lUF SOY 000-104-501
000-103-097
c 31 242M2502-47SM2 4.7UF 25V 000-230-350 CR 39 155133
c 32 RPE132Fl04ZSO 0.1UF sov 000-104-501
c 33 RPE132F104ZSO 0.1UF 50 V 000-104-501
c 34 RPE132Fl04ZSO 0.1 UF 50 V 000-104-501
;J"1''~?
c 35 RPE132F104l50 O.lUF 50 V 000-104-501 JACK
c 36 RPE132F104Z50 O.lUF SOY 000-104-501
Sllt:-40360-770 O< D12 l 0255018-1 000-505-142
c 37 RPE132F104Z50 O.lUF sov 000-104-501 J 1
c 38 RPE132F104Z50 0.1UF 50 V 000-104-501 J 2 HLJ2308-0l-3010 000-102-049
c 39 ECQ-M1H103KYW O.OlUF 50 V 000-260-416 J 3 Fi{C2-C26S13-0L 26P 000-505-156
J 4 B9P-5HF-1AA-K 13-3-3809-1 000-100-593
c 40 ECQ-H1H103KVII 0.01UF SOY 000-260-416 J 6 Fl7P-5HF-1AA-K 13-3-3809-1 000-100-591
c 41 RPE132F104Z50 0.1UF sov 000-104-501 J 7 BllP-SHF-1AA-K 13-3-3809-1 000-100-592
c 42 RPE132F104Z50 O.lUF 50 V 000-104-501 J 8 B6P-SHF-1AA-K 6P 000-100-584
c 43 RPf132Fl04ZSO 0 .llJF 50 V 000-104-501 J 9 BSP-5HF-1AA-K 5P 000-100-582
c 44 RPE132F104ZSO 0 .1UF 50 V 000-104-501
B3P-SHF-1AA-K 3P 000-100-572
c 45 RPE132F104Z50 0.1UF sov 000-104-501 J 10
c 46 RPE132F104Z50 0.1UF 50 V 000-104-501
c 47 RPE132F104ZSO O.lUF sov 000-104-501
c 48 ECE-AlEUlOOE lOUF 25Y 000-201-812
c 49 ECQ-P1H122JZ 0.0012UF SOY 000-262-714 COIl J1'1o

c so ECiil-PlH122JZ 0.0012UF SOY 000-262-714 L 1 FN-85-30 0250560 ooo-no-o6s

c 51 RPE132F104Z50 0.1UF 50 V 000-104-501
c 52 RPE132F104Z50 0 .lUF sov 000-104-501
c 53 RPE132F104ZSO 0 .1UF 50 V 000-104-501
TkAt-.51 STOR l-7J~"A?-
c 54 RPE132F104ZSO 0 .lUF sov 000-104-501
c 55 242M2502-475M2 4. 7UF ZSV 000-230-350
000-125-631
c 56 ECiil-M1H103KVII O.OlUF SOV 000-260-416 Q 1 250815-Y
c 57 ECE-AlELJ100E lOUF 25Y 000-201-812 Q 2 25(1815-Y 000-125-631
c 58 RPE132F104ZSO 0.1UF SOY 000-104-501 \>1 3 25(181 S-Y 000-125-631
c 59 242M2502-475"12 4.71JF 2SV 000-230-350 lil 4 2SC2655Y 000-126-250
\!1 5 25(1815-Y 000-125-631
c 60 ECQ-M1Hl02KYII 1000PF SOY 000-260-415
c 61 RPE132F104ZSO 0.1UF sov 000-104-501
c 62 RPfl32F104Z50 0.1UF sov 000-104-501
c 63 ECQ-H1H102KVII lOOOPF SOY 000-260-415 RES! STOR 71'J?
c 64 ECiil-HlH102KVII 1000PF 50 V 000-260-415
ERD-l6T J102 0.1611 1K 0 0 0-3 3 0-8 01
c 65 ECE-AlEU470E 4 7UF 25V 000-201-815 R 1
R 2 E~D-l6T J103 0.1611 1 OK 00 0-330 ··8 02
c 66 ECE-AIEU221E 220UF,25V 000-206-106
R 3 EVH-HCGAOlf\23 2K 000-103-630
c 67 ECiil-H1H102KVW 1000PF sov 000-260-415
R 4 EVM-MCGA01fl23 2K 000-103-630
c 68 ECQ-M1H102KVII lOOOPF SOY 000-260-415
ERD-l6TJ102 0.1611 lK 000-330-801
c 69 RPE132F104Z50 0.1UF sov 000-104-501 ~ 5
R 6 fRD-16T J332 0.1611 3. 3K 000-329-045
c 70 ECE-A1ELJ100E lOUF zsv 000-201-812 R 7 E~D-16TJ332 0.1611 3.3K 000-329-045
c 71 RPE132F104Z50 0.1UF sov 000-104-S01
R 12 ERD-16T J683 0.1611 68K 000-329-0 71
c 72 242H2502-475M2 4.7UF 25V 000-230-350
R 13 EIW-16T J222 0.1611 2. 2K 000-330-809
c 73 RPE132F 104 Z5 0 0.1UF 50 V 000-104-501
14 FRD-16T J222 0.1611 2. 2K 000-330-809
c 74 RPE132F104ZSO 0 .lUF sov 000-104-501 R
R 15 fRD-16T J222 0.1611 2.2K 000-330-809
c 75 RPE132F104Z50 O.lUF 50 V 000-104-501
ER0-52CHFS111 5.11K 000-104-196
c 76 RPE132F104Z5 0 0 .lUF SOY 000-104-501 K 16
c 77 RPE132F104ZSO O.lUF 50 V 000-104-501 R 17 [VM-MCGAOlf\14 10K 000-103-632
c 78 ECiil-M1Hl02KVII lOOOPF SOY 000-260-415 R 18 EFW-16T J303 0.16>1 30K 000-329-063
~ 19 EllD-16T J101 0.1611 100 000-329-013
c 79 ECGl-M1H103KVII 0. 0 lUF SOY 000-260-416

c 80 RPE132F104Z50 O.lUF SOY 000-104-501 R 20 EXB-FSE472J 0.12511 4.7KX4 000-379-073

c 81 ECQ-M1Hl02KVW lOOOPF SOY 000-260-415 R 21 ERD-16T Jl02 0.1611 1K 000-330-801
c 82 RPE132F104ZSO 0 .lUF sov 000-104-501 ~ 22 ERD-16T J471 0.1611 470 000-329-029
c 83 RPE132F104Z5 0 0.1UF 50 V 000-104-501 R 23 ERD-l6TJ101 0.1611 100 000-329-013
c 84 RPE132F104ZSO 0 .1UF sov 000-104-501 I< 24 fRD-l6T J471 0.1611 470 000-329-029
( 85 242M2502-475"12 4.7UF 25V 000-230-350 R 25 Ei<D-16T JlOl 0.1611 100 000-329-013
c 86 ECQ-M1H102KVII lOOOPF SOY 000-260-415 R 27 ERD-16T JR23 0.1611 82K 000-329-059
c 87 ECQ-M1Hl03KVII O.OlUF 50 V 000-260-416 R 29 EIW-16T J222 0.16\11 2.2K 000-330-809

NOTE:

• *=
 FUAUNO CH-24/26 DSP ~OARD 06P0139 PARTS LIST
I T-3

SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
IC -11-

R 31
11. ~

ERD-16T J222
'-l
0.1611 2.2K
*' :::J-1-"·~

000-330-809
• ~ IC -IJ ~~ '-l
*' :::J-1-"•-~t-
• ~

u 20 U-PD74HC153C 000-107-444
R 32 ERD-16T J222 0.1611 2.2K 000-330-809
u 21 U-PD74HC163C 000-107-445
R 34 ERD-16TJ472 0.1611 4.7K 000-330-812
u 22 U-PD74HC163C 000-107-445
R 35 ERD-16T J202 0.1611 2K 000-330-807 u 23 U-PD74HC08C 000-107-447
R 36 ERD-16TJ132 0.1611 1. 3K 000-329-038 u 24 UPD7 4H C7 4C 000-107-443
R 37 ERD-16TJ302 O.lbw 3K 000-329-044
u 25 U-PD74HC04C 000-107-448
R 38 ERD-16T J472 0.1611 4. 7K 000-330-812 u 26 U-PD74HC16 3( 000-107-445
R 39 ERD-16TJ162 0.1611 1.6K 000-329-040
u 27 U-PD74HCOOC 000-107-449
u 21i U-PD74HC21C 000-107-450
R 40 ERD-16T J102 0.1611 1K 000-330-801 u 29 U-PD741iCOOC 000-107-449
R 41 ER0-52CHF5111 5 .11K 000-104-196
R 42 ER0-52CHF5111 5 .llK 000-104-196 u 33 U-PD74HC153C 000-107-444
R 43 ERD-16T J241 0.1611 240 000-329-022 u 34 U-PD74HC153C 000-107-444
R 44 EXB-F5E4 72J 0.12511 4.7KX4 000-379-073 u 35 U-PD74HC153C 000-107-444
R 45 ERD-16T JlOl 0.1611 100 000-329-013 u 36 U-PD74HC153C 000-107-444
R 46 ERD-16TJ151 0.2511 150 000-329-017 u 37 U-PD41264C-15 000-107-454
R 47 EVH-HCGA01B14 10K 000-103-632 u 38 'Hl7116EM 000-114-791
R 48 ERD-16T J102 0.1611 lK 000-330-801 u 39 U-PD74HC163C 000-107-445
R 49 ER0-52CHF5111 5 .llK 000-104-196
u 40 U-PD74HC163C 000-107-445
R 50 ERD-16TJ201 0.1611 200 000-329-020 u 41 U-PD74HC163C 000-107-445
R 51 ERD-16T J271 0.1611 270 000-329-023
u 42 UPD74HC74C 000-107-443
R 52 ERD-16TJ471 0.1611 470 000-329-029
000-329-031
u 43 UPC455RC 000-103-520
R 53 ERD-16TJ561 0.1611 560 u 44 U-PD74HC04C 000-107-448
R 54 EIW-l6T J221 0.1611 220 000-329-021 u 45 U-PD74HC08C 000-107-447
R 55 EVH-HCGA01B13 1K 000-103-593
000-379-073
u 46 U-PlJ74HC04C 000-107-448
R 56 EXB-F5E4 72J 0.12511 4. 7KX4 u 47 U-PU74HC32C 000-107-441
R 57 EXB-F5E472J 0.12511 4.7KX4 000-379-073
000-379-072
u 48 U-PIH4HC32C 000-107-441
R 58 EXB-F5E222J 0.12511 2. 2K X4 u 49 U-PD74HC08C 000-107-447
R 59 E~D-16TJ221 0.1611 220 000-329-021
u 50 U-PD74HC175C 000-107-451
R 60 EHD-16T J221 0.1611 220 000-329-021
000-329-021
u 51 UP D7 4H C7 4C 000-107-443
R 61 ERD-16TJ221 0.1611 220 u 52 5N74L5145N 000-168-080
R 62 E~D-16T J221 0.1611 220 000-329-021
000-329-005
u 53 5N74l5145N 000-168-080
R 63 EHD-16TJ470 0.1611 47 u 54 UPD710 51C 000-105-729
R 64 EfW-16T J470 0.1611 47 000-329-005
000-329-021
u 55 UPD71051C 000-105-729
R 65 ERD-16 T J221 0.1611 220 u 56 UP071055C 000-105-731
R 66 ERD-16T J470 0.1611 47 000-329-005
000-329-021
u 57 U-PD74HC163C 000-107-445
R 67 ER0-16TJ221 0.1611 220 u 58 U-PD74HC163C 000-107-445
R 68 ERD-16TJ470 0.1611 47 000-329-005
000-329-005
u 59 U-P041264C-15 000-107-454
R 69 ER0-16TJ470 0.1611 47
u 60 TC74HC123P 000-103-095
R 70 fRD-16TJ103 0.16\11 lOK 000-330-802
u 61 TD62503P 000-163-096
R 71 ERD-16 T J10 3 0.1611 10K 000-310-802 u 62 UPC624C 000-100-689
R 72 EXB-F5E472J 0.12511 4.7KX4 000-379-073 u 63 HA7416A 0254618-0 000-152-103
R 73 ER0-16T J470 0.1611 47 000-329-005
000-329-005
u 64 MA7461D 0254621-0 000-152-106
R 74 ERD-16T J470 0.1611 47 u 65 MA7461E 0254622-0 000-152-107
R 75 ERD-16TJ102 0.1f>w 1K 000-330-801
u 66 M51953Al 000-106-230
R 76 ERD-16T J303 0.1611 30K 000-329-063
u 68 UP 07 4H C7 4( 000-107-443
R 77 ERD-16TJ?22 0.1611 2.2K 000-330-809 u 69 UP D7 4H Cl31iC 000-107-442
R 71i ERD-16TJ332 0.1611 3. 3K 000-329-045
R 79 ERfl-16 T J222 0.16\1 2. ZK 000-330-809 u 70 UPD7004C 000-107-455
000-103-593
u 74 UPD71054C 000-106-626
R 80 EVM-MCGA01813 lK u 75 UPD710 54( 000-106-626
R 81 EVH-MCGA01Bl3 1K 000-103-593
u 76 UPD71055C 000-105-731
R 82 E~D-16T J222 0.1611 2. 21( 000-330•809 u 71 liPD71055C 000-105-731
R 83 ERD-16TJ332 o.t6w 3. 3K 000-3?.9-045
u 78 TLP521-4A 000-135-853
R 84 ERD-16TJ102 o.lf>ll 1K 000-330-801
000-379-073
u 79 TA7222AP 000-163_-008
R liS EXB-F5E472J 0.1251.1 4.7KX4
R 86 ERD-16T Jl03 0.1611 10K 000-3~0-802
u 80 U-PD74HC86C 000-107-453
R 87 ERD-16TJ102 0.1611 1 K 000-330-801 u 81 UPC358C 000-161-053
R 88 ERD-16TJ222 0.1611 2.ZK 000-330-809 u 82 TLP5 21-4A 000-135-853
R 89 ER0-52CHF5111 5 .llK 000-104-196 u 83 U-PD74HCOOC 000-107-449
u 84 EX0-3( 14. 3181RMHZ 000-110-753
R 90 ER0-52CHF5111 5.11K 000-104-196
R 91 E~0-52CHF5111 5.11K 000-104-196
R 92 ER0-52CHF5111 5 .llK 000-104-196
R 93 ER0-52CHF5111 5 .llK 000-104-196
R 94 Ek0-5ZCHF5111 5 .llK 000-104-196
R 95 EXB-F5E4 72J 0.1?5W 4.7KX4 000-379-073
R 96 EXB-F5E472J 0.12511 4. 7KX4 000-379-073
R 97 EXB-F5E472J 0.12511 4. 7K X4 000-379-073
R 98 EXB-FSE472J 0.12511 4.7KX4 000-379-073
R 99 ERD-16TJ102 0.16111 1K 000-330-il01

K 100 EVM-HCGAOU'23 2K 000-103-630

R 101 ERf\-16T JR23 0.161!1 32K 000-329-059
fl 102 ERfl-16T J683 0.16\ol 68K 000-329-071
R 103 ERD-16T J683 0.1611 6$1K 000-32'f-071
R 104 ER0-16T J303 0.1611 30K 000-329-063

S•ITCH "!.·f"H

5 1 510-0401 000-106-105
~ 2 510-0801 000-106-194
5 3 510-0401 000-106-105

INTEGRATED CIRCUIT "l?l!f1J1"0

u 1 UPC78LOS 000-11)1-120
u 3 U-PD74HC32C 000-107-441
u 4 EPL16P8BP-35 000-110-434
u 5 UPD74HC74C 000-107-443
u 6 UPD71054C 000-106-626

u 11 U-PD41264C-15 000-107-454
u 12 U-PD74HC153C 000-107-444
u 13 U-PD74HC32C 000-107-441
u 14 U-PD74HC163C 000-107-445
u 15 Mo 7690 0654605-0 000-107-648
u 16 TC74HC123P 000-103-095
u 17 U-PD741tCl53C 000-107-444
u 18 U-PIJ74HC153C 000-107-444
u 19 U-PD74HC153C 000-107-444

NOTE:
• :!tj:
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DAC ::- Diqitai-TD-Ane\log Converter ~ ~
FIT::: Pro<Jretmmo.ble Interv~l Timer 06P0139 DSP (1/3)
*~ 0 DSP BOARD
CHECKED I . '
PPI = Progro.mma-ble Peri pher~l lnterfo.cP
E C B E C 8 0 ~~. I 3 • ~3' 0 •
PCI== Programmable Cornmunic~tion Interfo..ce ~ I

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06P0139 (2/3)
PP I : ProgrrAmrno.ble Periphero-.1 Tnterfo.ce
PC I"" Progro.mmo.ble Communi cation InterfAce E C B
~~
CHECKED
~
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/ . L, [. '-1
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. C1269-005-A
DSP BOARD

FURUNO ELECTRIC CO.. L TO.

 FU NO 2 3 4 5 6
T-6

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DRAWN H. (JSU/)/i I r:JNG. NO.

FURUNO ELECTRIC CO.. L TO.

FURU•o
ADDENDA No.l TO CH-14/16 SERVICE MANUAL SM-El261

Discrepancy Between Actual Wiring And

Service Manual Diagram
* * * * * * * * * * * * * * * * * * * * * *

The interconnection cable between hull unit and soundome is found to be wired
differently from what is shown in the service manual diagram. The corrected
diagrams are attached for replacement.

Wrong Correct

CH-1422 CH-1422
i!~~HI-'-J..... i!~~HI-'-J.....
SOUNOOME SOUNOOME

II 1 )j TO 1 )-:- TO 1
1
"'t'l~ 2 >;-TD2 >7- TO 2
7 3 >7
GND >7 GND
,....-1t--__, 4 >t
Gl'lo >t GND
>;- GND
5 >;- GND
6 >t
+1SV 6 >f +15V
>t +15V
7 >t
+15V 7
8 >t +15V 8 )7 +ISV
9 >r ov 9 >r ov
1 0 )-io QV
10)-i-OV

*
11 )-\. 4>4]
1
Tl MOTOR
1 1 )-\. T I
12 '>+ MOTOR
ll MOTOR
20VJ
f1 12 '>+ T I MOTOR 4> 3
13 ?+ Tl MOTOR f2 ..-- 13 11 MOTOR 20V 4----
14 >t T 1 MOTOR f3 14 )7 T I MOTOR 4> 2
15 >7 T I MOTOR f4 15 >;- T 1 MOTOR 4> 1
16 >, 16 )I
17 >t TI DO H s· J 17 >t
Tl DO (+5')
1 11 )7 T I 0 1 I - 90"1 111>:-11 01(-90')
19>+ TR MOTOR 20V] .,._. 19 >+ TR MOTOR 4 ]
>t TR 4>
20>t TR MOTOR f1 20 MOTOR 4> 3
>t MOTOR
>t
2 1 TR MOTOR f2 2 1 TR 20V ...,__
22
2 3
>t
>f
TR
TR
lo40TOA f3
MOiOA f4
2 2 )7
23 ?i"
T R MOTOR 4> 2
TR MOTOR 4> 1
24 >t TR CP 1 24 >r TR CP
2 5 >7 TR DO
2 5 >7 TR DO
2 6 >+ TR D1 2 6 >+ TR
2 7 r iR D2
D1
21>:- rR D2
28 )l.. TR D3 28 )l.. TR D3

Al-l
 FU NO 2 3 4 5 6
Al-2

CH-140/240 CH -1422
1tiffili - ~~;&tff-.'-A
DISPLAY UNIT SOUNOOME

J2
Tl MOTOR 20V -l< 1 )j TO 1
>7 TO 2
T I MOTOR f4 -t< 2 A
Tl MOTOR f3 i< 3 3 >+ GND
T I MOTOR f2 "i< 4 4 >t GND
11 MOTOR f1 -;< 5 5 r.-
>t
GND
<6 6
7
+ISV
>t +15V
I< 7
:< 6
I & >t +1SV
H TR MOTOR 20V i< 9 9 >t ov
c T R MOTOR f4 -:< 10 10 >T ov
H 1 R MOTOR f3 -i< 1 1 11 )+ TI
>+ T I
MOTOR 4
cl>

c 1 R MO "TOR f2 -;< 1 2 12
13 n MOTOR
1 1 MOTOR
3
cl>
20V
1R MOIOR •1 ~ 13
H
c Tl DO (+5°) ~ 14 14 >t T I MOTOR cl> 2
H T I 01 (-90•) 15 -f< 15 >t T I MOTOR cl> 1
c TR C P ~ 1 6 ~,._-..,.;...;,.-------------+v~ 16 >,
H
c TR DO 17
TR 01 "7<18
i< . - - - - - - -.. * 1 7 )7 T I DO (+5° )
1 8 )7 T I D1 ( -90• )
>+
H "TR 02 ~19 19 TR MOTOR cj>4
c 1 R D3 20 -t< 2 0>t TR MOTOR q, 3
H I< 21 2 1>t T R MOTOR 20V
c ov i(2 2 2 2>t T R MOTOR <l> 2
8
8 H .< 2 3 2 3>T
2 4 )7 TR (p
TR MOTOR .:PI
c (24
+1SV ~ 2 5 €-&.--"'
2 5 )7 TR DO
r-----., CN7
H
c I I 2 6 >+ TR 01

• CH-143
I)~- 1- :J /1- D
•
-Jv I - - - - - - - - - "
~~
1 ,
2
e~REM
VREF
H
c
2 7 )-7 TR 02
28 )l. TR 03
I E
REMOTE CONTROL
L .. ____ ..J
I 7 m
L-;
1
I'
3 GND

-----,
06P0149
T /':J"'4ti I
7' ":.1

..
1
MATCHING SEE N01E 5
I CN 6 PCB
I 85-704 1)1*-7--t-BRN ~ 1#
1
+12V
t Q~~~tf'.H
CLINOMETER
I) 2 *"7 tJ RED
I) 3>t')f-1' ORG " 3
1
2 1 ROLL
PITCH
I 1) 4 )7 ~ YEL ~ ~ GND 06 PO 146

L _____ __. *
I) s~.O:f: 1JGRN
I'
4
5€- 06P01 31 /06P01 39
DSP 4*&
JjtiJ@ll!
TRAIN/TILT PCB TR1
0654042
sm. 1>15.2

J
DSP PCB
:N 3 a:
~
Q.uC>~o:>cOO
0
9
c
I< 1 <'

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I I Q.xl!>>-z::JZ 10
~ o WHTf< 2 <1$ ::.:=t-<tt-Vll!)<(l!>
SHIP'S MAINS ?o BLK!( 3{ 9 ~ -J,.-)...-kAkA-AA-.,.:,..-
T~~~
~--~· '--------------------~--~
TR2
,--------, ~"'("')-4'11'1<Dr--C)cn~

AC100/110/11S/220V :
•D;frUi
RECTIFIER
I
I
=
CH-160
.,.,...,..,...,..""'
~fa~Lrlfa~~ ..,..Jl
3: a: ~
>- er: aHD
1
06P0144
i!~fl·~
S0-60Hz 1"~-~ t~~H D-RD -ROD ~~~ PCB
DPYCS--l. 25 : DISPLAY UNIT .;"lf'....:"~*f'...-C"\<:"\
I 4 I TB1
CH-141
1
24V ;.,to WHT"\....o..._ _ - - _ ._-=.......p;.---f ;.,to WHT~ EB ~ ::J:) ,
OV ? o BLK ..,rr-
L _______ _J
II ? o BLK 3
8 L-------------------------- ~~11~­
TRANSCEIVER UNIT

1I T 61 * TB1

NOTE
DC 24132 V -----------t..--.:a.....-L-----....:D:;.;.P...;.Y..:.C.::.S_-..:..;1...:.25:.__ _ _ ___:=:.__ _ _ _ _ _ _ _ _....:::::~~-( :.... D
? o aLK 2 o T
WHl~-i'8-"'-------------------==-..:.:*~·.::.D.:..P.:..Y.::.C.::.S-_1:..:.;.2:..;5~=-~€:........((:_, o WHT{B @
? o aLK e
D 1.--- '.!"7':;3/o
OPTIONAL SUPPLY
NOTE 5.
2. ~RepJi:Jl~o
0654042
• •
SHIPYARD SUPPLY 713/:..-l~t-·

3. * 7"-/ Jv~l::t? ?"'.X.I:IHIUwH·:rt-~M'~o r--- ---,

?0/~-IH.
BLK/SHIELD
RED/SHIELD
*I::J-IH• £.
ITEM
C>
DD M • 111
OWG.NO.
•
REMARKS
YEL/SHIELD NAME MATERIAL
CABLE END IS FACTORY-FABRICATED 71'/'71'Jv7-
WITH PLUG OR CRIMP-ON LUGS. l LINE FILTER I :10/~-lllr•
1 <I OP06-9 I)
4. CH-14/24tJ'~ 27MHz~1!!1iUfl~lct o 5:.;
-k >'I WHT/SHIELD
<IEB @I>
<•e e > 3 ~-
~fi:llr.:PJriftJ{(f).Qti*'ct?., ;,17 -1' Jl-~­ :.,..o WHT+ 2 I I
(~:t:.,-3~ :rr•~?-1/~~~0·
J
~*
':J c BLK-+< 3 :Pt:J RED
(CH- 16/26 "'rlcti*J:~~)
EMPLOY LINE FILTEA L~---~_j 'tf m
L.. tJ_ \.' •
:10 WHT
?a BLK
LINE IF CH-14/24 INTERFERE WITH
27MHz RADIO TELEPHONE OR LORAN SHIP'S MAINS NOT USED. 11 m I
WEIGHT
• l:ll •
ONG.r«:>. C1261-008-C
RECEIVER.
DRAWN

FURUNO ELECTRIC CO .• L TO.

 FURUNO Al-3
2
-- 3

JT
:
;0
SLIP
RING
f
:J~
n
T1 ,..--
IQ
I

TRANSDUCER
?o BLK
I

+15V 60kHz 06S0521

A 88kHz 06S0522 rt.J RED
~ YEL
ov 1 150kHz 0650523 y;t BLU
:JD WHT
Tl MO 20V 2
I ?o BLK 81
TI M0 ~1 3 I
I yt.J RED
TI M0 ~2

0
4 I4BSI
: ::_ ~·IJ GRN TILT
TI M0 ~3 5 MOTOR
y;t BLU
TI M0 ~4 6

I
I I
I
I
I
I
I
B

r,-:f YEL
82
: :JD WHT
TRAIN
8LK MOTOR
TR MO ~1
RED
TR MO
TR MO
TR MO
~2
~3
~4
GRN
BLU ®
c

0
TR CP
TR D1
TR 02
TR D3 I
I
TR D4 '~.I

-----------------------
:g '~ TITLE
r:.f.}-7 . r l
CH-14/16 ntt @] fil i!ll ~
H~ ~
CHECKED (< >'·')
-24/26 SOUNDOME
~ ~ fcB • ..:z.J; • '~7 ~ fi
DRAWN 1 YvrlltiYf"'- DWG.NO. C1261-020- B
FURUNO ELECTRIC CO., L TO.
---IP--~--11--------------------------------------

C0 NT E NT S
*****************

NOTES --------------------------------------------------------------- to iii

SPECIFICATIONS ---------------------------------------------------- 0-1 to 0-4

Chapter 1. CIRCUIT DESCRIPTIONS ---------------------------------- 1-0 to 1-60

1-1. System Overview ------------------------------------------- 1-1

1-2. Transmission (TRX Board/DSP Board 1/3) -------------------- 1-3
1-3. Reception (TRX Board/DSP Board 1/3) ----------------------- 1-5
1-4. Echo Acquisition (DSP Board 2/3) -------------------------- 1-8
1-5. PPI Frame Buffer Memory Write by CPU (DSP Board 3/3) ------ 1-10
1-6. Echo Processing and Polar to X-Y Coordinate Conversion (DSP
Board 3/3) ------------------------------------------------ 1-13
1-7. Frame Buffer Memory Read for Screen Refresh (DSP Board 3/3) 1-16
1-8. RGB and Synchro Signals (DSP Board 3/3) ------------------- 1-23
1-9. Monitor Interface for CH-16 (MIF Board) ------------------- 1-25
1-10. Color Monitor Display A1QA8DSP11 for CH-14 ---------------- 1-27
1-11. Color Monitor Display TM-140F for CH-16 ------------------- 1-29
1-12. Audible Sound (TRX Board/DSP Board 2/3) ------------------- 1-31
1-13. Panel Switch/Control Status Read (UPN+DPN Boards/DSP Board
1/3) ------------------------------------------------------ 1-31
1-14. Raising/Lowering Soundome (Hull Unit/DSP Board 1/3) ------- 1-33
1-15. Transducer Tilting (Soundome/DRV Board/DSP Board 1/3) ----- 1-34
1-16. Transducer Training (Soundome/DRV Board/DSP Board 1/3) ---- 1-39
1-17. Power Supply Control for Tilt/Train Motors (DRV Board/POW
Board) ---------------------------------------------------- 1-41
1-18. Interrupt ------------------------------------------------- 1-42
1-19. Display Power Supply -------------------------------------- 1-43
1-20. Transceiver Power Supply (PWR 06P0145 Board) -------------- 1-48
1-21. LSI Principle Summary

8251 (uPD71051C) Programmable Communication Interface ----- 1-51

8254 (uPD71054C) Programmable Interval Timer ----------~--- 1-55
8255 (uPD71055C) Programmable Peripheral Interface -------- 1-59

Chapter 2. ADJUSTMENT OF PRESET CONTROLS ------------------------- 2-1 to 2-8

2-1. CH-14 Display Power Supply (PWR F02P9042) ----------------- 2-1

---IPaJ~--11--------------------------------------

2-2. CH-16 Display Power Supply (REG 02P9026) ------------------ 2-1

2-3. CH-14 Screen and Brilliance (Calor Monitor & DSP 3/3
06P0131) -------------------------------------------------- 2-2
2-4. CH-16 Screen and Brilliance (Calor Monitor & DSP 3/3
06P0131) -------------------------------------------------- 2-3
2-5. White Balance (DSP 3/3 06P0131 & Calor Monitor) ----------- 2-4
2-6. AD Converter, Audio and TVG (DSP 1/3 & 2/3 06P0131) ------- 2-4
Interference Rejection (Ext. KP Mute) --------------------- 2-5
2-7. Transceiver Power Supply (PWR 06P0145) -------------------- 2-6
2-8. Receiver (TRX 06P0144) ------------------------------------ 2-6
Adding Main Bang to Audible Sound ------------------------- 2-8
2-9. Transmitter (TRX 06P0144) --------------------------------- 2-8
~

Chapter 3. SPECIFICATION ALTERATION ------------------------------ 3-1 to 3-4

3-1. Changing Operating Specifications ------------------------- 3-1

3-2. Changing Stroke of Transducer Travel ---------------------- 3-2
3-3. Clinometer Adjustment ------------------------------------- 3-3
3-4. Connecting the Monitor Display (NTSC only) ---------------- 3-4
3-5. Frequency Alteration -------------------------------------- 3-4

Chapter 4. MAINTENANCE ------------------------------------------- 4-1 to 4-3

4-1. Lubricating the Hull Unit --------------------------------- 4-1

4-2. Cleaning Retraction Tank ---------------------------------- 4-2
4-3. Replacement of Grease Cotton Pieces ----------------------- 4-3

Chapter 5. TROUBLESHOOTING --------------------------------------- 5-l to 5-23

5-1. Diagnostic Self-check ------------------------------------- 5-1

5-2. Troubleshooting Flow Chart -------------------------------- 5-3
5-3. Static Response of Receiver + Display --------------------- 5-19
5-4. Soundome Check without Dry-docking ------------------------ 5-22

Chapter 6. LED STATUS CHART -------------------------------------- 6-1 to 6-2

Chapter 7. WAVEFORM CHART---------------------------------------- 7-1 to 7-21

7-1. Transmission ---------------------------------------------- 7-2

7-2. Reception ------------------------------------------------- 7-5

b
- FURU-0 - - - - - - - - - - - - - - - - -

7-3. Audio Signal ---------------------------------------------- 7-8

7-4. Echo Acquisition Timinjs ---------------------------------- 7-10
7-5. Frame Memory Write by CPU --------------------------------- 7-11
7-6. Frame Memory Read for Screen Refresh ---------------------- 7-12
7-7. Power Supply---------------------------------------------- 7-19

Chapter 8. DISASSEMBLING SOUNDOME AND TILT/BEARING ALIGNMENT ----- 8-1 to 8-6

8-1. Transducer ------------------------------------------------ 8-1

8-2. Tilt Gear Box --------------------------------------------- 8-1
8-3. Transducer Slip-Ring -------------------------------------- 8-2
8-4. Bearing/Tilt Rotary-Encoder Alignment --------------------- 8-4
8-5. Fixing Train Photo Interruptor PCB's (06P0060/06P0061) ---- 8-5

ELECTRICAL PARTS LIST ----------------------------------------- PL-1 to PL-13

MAINTENANCE PARTS LIST FOR COLOR MONITOR ---------------------- PL-14 to PL-15

SHIPBORNE/DEPOT MAINTENANCE PARTS LIST ------------------------------PL-16

MECHANICAL PARTS LIST ----------------------------------------- PL-17 to PL-18

MECHANICAL EXPLODED VIEW ---------------------------------------- M-1 to M-2

c
- Fuau•o - - - - - - - - - - - - - - - - -

SCHEMATIC DIAGRAMS

INTERCONNECTION DIAGRAM -------------------------------------------- S-0

CH-14 Display Unit ---------- S-1 CH-16 Display Unit ----------- S-2

DSP 06P0131 (1/3) --------- S-3 DSP 06P0131 (1/3) --------- S-3
DSP 06P0131 (2/3) --------- S-4 DSP 06P0131 (2/3) --------- S-4
DSP 06P0131 (3/3) --------- S-5 DSP 06P0131 (3/3) --------- S-5

UPN 06P0132/DPN 06P0133 --- S-6 UPN 06P0134/DPN 06P0135 --- S-6

MIF 06P0136 --------------- S-8

10 11 Display A1QA8DSP11 ---- S-7 14 11 Display TM-140F ------- S-9

PWR F02P9042 -------------- S-10 REG 02P9026 --------------- S-11

CH-14/16 Transceiver Unit --- S-12

TRX 06P0144 --------------- S-13

PWR 06P0145 --------------- S-14

CH-14/16 Hull Unit ---------- S-15

DRV 06P0146 --------------- S-16

CH-14/16 Soundome ----------- S-17

Option

Video Interface Board, VDO 06P0138 ----------------------------------- S-18

Remote Control Box, CH-143 ------------------------------------------- S-19

Clinometer, BS-704 --------------------------------------------------- S-20

d
---IPaJ~--11--------------------------------------

NOTES
*******
1. In-air Operation

Dummy Load
DO NOT OPERATE THE SONAR WITH THE TRANSDU~ER EXPOSED TO AIR. For in-
air operation connect the dummy load (specified below) to TB2 on the
TRX board instead of the transducer.
The dummy load will be useful for troubleshooting, too. As known
widely, the quickest way to check the transducer is to replace it with
a brand-new one. However, when a spare transducer is not available,
use the dummy load as instructed on page 5-17. The dummy load for the
transceiver unit should be purely resistive; 100 ohms (30 W). It is
recommended to make a one, using metal oxide film resistors. Do not
use wire-wound resistors because they are inductive.
Metal Oxide Film Resistor }
1 Kohm, 3 W x 10 pes.
(FURUNO Code: 000-371-400) (parallel)

Note: As the matching transformer is connected in parallel with the

transducer inside the soundome, it is impossible to check the
transducer by measuring its capacitance.
When you procure the resistors for the dummy load, it is recommended to
get another metal oxide film resistor (0.47 ohm) (FURUNO Code: 000-371-
047), too. It is necessary to check the receiver response (see page
5-19).
Soundome Support
When the soundome unit is laid on the table horizontally, the transducer
can not be tilted and trained properly, resulting that the error message
appears on the screen and the sonar operation does not start. Make a soun-
dome support locally as illustrated below. (Utilize the soundome support
for FH-105/106 and CH-12 if available.)

Wing Bolt
(M4x20"' M5x25)

c;l ,',:J Fiber Washer

,,,,
,,
I,

,,
,t

J'
I~-.::-~

Bucket
Metal Rod
(L=230mm)

* High tem•).on transformer oil,

Equivalent: ESSO STANDARD "UNIVOLT 60"

(i )
---~--~--~~--------------------------------------

~-

..... ____ _

230mm

2. Logic Probe
The signals related to the microcomputer are usually very short in
duration and not cyclic. To check existence of such a signal, use a
logic probe rather than an oscilloscope. It is made up of: (1) a
Schmitt circuit which judges input signal level as HIGH or LOW, and (2)
a one-shot which is triggered by the edge of the signal and drives an
LED for the period which is discernable to human eye.
LOGIC PROBE
, ..., f------,---------------------{)Hi J
0
0£
:
I
l------'···----------------.. r.LO
I I t•-••••"1 "").,~'"
GNO
•- __ .. t ____ -- --t_ --- ~J------- .0 PULSE
Schmitt Edge-triggered LEO's
Circuit One-shot

Be careful that some logic probes are not provided with a one-shot and
cannot detect a pulse. Such a probe is not suitable for digital cir-
cuit troubleshooting.

Most logic probes are battery-powered, and the Schmitt level (the
reference threshold level between LOW and HIGH) is internally produced
and is usually fixed at the threshold level of TTL. If you wish to
check C-MOS (~specially when its Vdd is other than +SV), use a special
type logic probe which is provided with an extra lead with a clip.
This lead is to be tied to Vdd (Vcc in case of TTL), and the reference
threshold level is obtained internally by dividing this voltage.
It is also important to use a logic probe with high input impedance.
A low impedance one will affect the signal level especially when the
MOS devices with poor fan-out are checked.

(i i )
--FUIRU-0-------------------

3. CH-14 vs CH-16
The main difference between the two models exists in the size of the
display unit; the CH-14 employs a 10-inch monitor display, while the
CH-16 employs a 14-inch one. The display units of the both models
employ different boards except for DSP 06P0131 which is employed by
both models.
4. Module Compatibility
Module Compatibility
Color Monitor Display TM-140F CH-16 ~ FCV-320 Series
Power Supply Module PWR F02P9042 CH-14 ~ FCV-200 Series*
Power Supply Module REG 02P9026 CH-16 ~ FCV-120 Series & CH-12
* Note 1. To utilize the power supply module of the FCV-200 Series in
the CH-14, a slight modification is required. See the sche-
matic diagram on page S-10 for instructions.
2. The power supply module for the CH-14 cannot be used in the
FCV-200 Series; it will cause noise on the screen.

( iii )
- FURU•o - - - - - - - - - - - - - - - - -

COLOR PPI SONAR CH-14/16 SPECIFICATIONS

* * * * * * * * * * * * * * * * * * * * *

1. Display System PPI and historical displays on 10-inch (CH-14) or

14-inch (CH-16) calor CRT.
2. Picture Calor 8 colors depending on signal strength; reddish-brown
(strongest echo) red, orange, yellow, green, light
blue, blue, and deep blue (background).
3. Display Mode Mode 1: Full circle PPI +historical display
Mode 2: PPI + expanded historical display

Mode 1 Mode 2

4. Display Range, 1 2 3 4 5 6 7 8 9 10 11 12
Pulselength and 30 60 100 150 200 250 300 400 600 800 1200 1600 Meters
RANGES 100 200 300 400 600 800 1000 1500 2000 3000 4000 5000 Feet
Training Speed 20 40 60 80 120 160 200 300 400 600 800 1000 Fathoms
PULSE- 0.4 0.8 1.3 ~-0 2.6 3.3 3.9 5.2 7.8 10.4 15.6 20.0 mS
LENGTH
TIME TO
TRAIN FULL 17 20 17 21 26 31 36 45 65 84 122 160 sec/360"
CIRCLE
Unit can be internally selected with DIP switch.

5. Data Display Display Range, Tilt Angle, AGC (On/Off), Output Power,
Target Lock Mark, Slant and Horizontal Ranges to
Markers (Variable Markers) I Depth, Bearing Scale,
Range Marker, Automatic Training Center Bearing,
Automatic Training Sector, Training Direction Mark.
6. Audible Sound Output 2W and frequency 1.1kHz using external trumpet
speaker
7. Transceiver Frequency: 60, 88 or 150 kHz
Output Power: 1.2 kW
Beamwidth: Frequency Horizontal
(-3dB) (kHz) Vertical
60 15° 12°
88 11.5° 9.5°
150 6.5° 6.5°

0-1
- FURU•o - - - - - - - - - - - - - - - - -

8. Training Manual or automatic training: 2.5°/step (Ranges 11 111 & 11 211 )

5°/step (Ranges 11 311 to 11 12 11 )

Auto Train Sector Selectable in 30° steps

from 30° to 360°
Auto Train Center Can be set in any
direction in 5° steps
Target Lock: Locks on and tracks fish targets above
specified level in the automatic
training sector.

9. Ti 1t +5° (above horizontal) to -90° (vertical)/10 seconds,

1° I step
10. Transducer Transducer travel: 400 mm can be c hanqe d to 250mm)
Raise/Lower Raise/lower time: Ship•s Ra.i se Lower
at ship•s speed Mains Time Time
10 knots) 24VDC 36 secs. 30 secs.
32VDC 26 secs. 23 secs.
Note: Transducer operation can be monitored with lamp
flickering during raise/lower operation and
lighting upon completion.
11. Allowable Ship 15 knots (12 knots during raise/lower operation)
Speed
12. Other Functions Stabilizer (Optional): Stabilizessounding beam against
rolling/pitching of up to ±20°
using a clinometer.
Remote Control (Optional)
13. Power Supply 24/32VDC, approx. 160W (CH-14)/ 175W (CH-16) (During
and Power raising: 260W (CH-14)/275W (CH-16)]
Consumption 100/110/115/220VAC, 50-60Hz, 1~
(For AC mains, rectifier RU-174~8-2 is required).

0-2
- FURU-0 - - - - - - - - - - - - - - - - -

13. Equipment List

No. Name Type Weight Qlty Remarks

(kg)
1 Display Unit CH-140 13 1 CH-14
CH-160 25 CH-16
2 Transceiver Unit CH-141 4 1
3 Hull Unit CH-142 3.5m cable 55 Standard
1 Option
5.2m cable
1m 73
Steel 1.8m 123 Option
4 Retraction Tank 3.5m 231 1 Option
FRP 1m 20 Option
1.8m 30 Option
5 Accessories 1 set
6 Installation Materials 1 set
7 Spare Parts 1 set
8 Remote Control Box CH-143 0.4 1
9 Clinometer BS-704 2 1
10 Video I/F {VDO Board) 0.2 1 set
11 Rectifier RU-l746B-2 17 1

14. Accessories
CH-14

No. Name Type Code No. Q tj Out-

I Remarks
line
1 Vinyl Cover 02-023-0620 000-800-690 1 1
2 Loudspeaker CA-150 000-109-070 1 2
~
1 UJ
166
~
~

lZJ~)so
_c.oo

··- ...-r_--
155[~ -.
~

CH-16

No. Name Type Code No. Q ty Out-

I Remarks
line
1 Vinyl Cover 02-037-0601-1 000-879-497 1 1
2 Loudspeaker CA-150 000-109-070 1 2
3 Gri_p 14-002-1152-2 840-211-252 2 3
4 Washer Head Screw M6x16 SUS304 000-882-061 4 4
4
~
1 _lj
,--
166 -
r-ill::! I I
ltim~o 155[~
' 210 I
16
\ \
r=fls
. O}nmnB=r~s

0-3
- - FURU-0 - - - - - - - - - - - - - - - - -

15. Installation Materials

No. Name Type Code No. o•tj Out-

line Remarks
1 Vinyl Tube 2.3x0.3 GRN 000-107-729 1 1
2 Connecter NCS-253-P 000-506-503 1 2 CH-14
7 3 CH-14
3 Crimp-on Lug FV2-M4 000-536-716 10 3 CH-16
4 Crimp-on Lug_ FV1.25-3 Red 000-538-113 4 4
5 Copper Strap WEA-1004-0 500-310-040 2 5
6 Cable 06S4042-0, 5m 000-107-437 1 6
7 Cable 06S4043-0, 15rr 000-107-438 1 7 See note
8 Connector 57-30360 000-504-003 1 8
- 1 UJ 50
L__]J 4
1---

.1; I 16
I
1QQ
'1
~2.
"''"~~
' tE·J. :' r
..L_
I

i
,

l
1. ,,
7L@)JD
19

srlD !
)

UJ UJ _1j UJ t.2

~9;9
I .,

~}~=1.2m ~ ~~~ :;- ~15

Note: 30m and 50m cables are optionally available.

16. Spare Parts

No. Name Type Code No. QI tj Out- Remarks

line
1 Fuse F-7142 lA AC125V 000-547-056 5 1
2 Fuse FGBO 7A AC125V 000-549-063 5 2' CH-16
3 Fuse FGBO-A 3A AC125V 000-549-013 5 2
4 Fuse FGBO-A 5A AC125V 000-549-064 10 2 CH-16
15 CH-14
5 Socket Set Screw HEX. SIZE 4mm 000-830-132 1 3
1
r---
_u UJ 68

~
)

20
I
30
\
I I f
(1 J :J [I~s (l ) '} [1~6

0-4
---IP--~--11--------------------------------------

Chapter 1. CIRCUIT DESCRIPTIONS

NOTES
*******
1. So that the service technician may gain thorough knowledge of the cir-
cuit functions, almost all parts of the circuits are included in the
circuit diagrams and detailed descriptions are provided in this
chapter.
The two "black boxes" in the DSP board contain microcomputers of which
configuration is very simple and common; each one chip of CPU, Static
RAM, P-ROM and Address Decoder are tied to the system bus. To check
the function of these "black boxes," simply conduct the Self-check and
confirm that the MAIN and DSP CPU's (called "CONTROL and ECHO
PROCESSING CPU's" in this manual) are diagnosed as OK.
The expressions used in this chapter are intended for the readers who
know the ABC's of a microcomputer; extensive knowledge of circuit
theory is not required.
2. Scan Line Direction
Because the CRT is phisically rotated by 90 degrees, the scan line runs
vertically. However, the scan line direction is referred to as
"horizontal" in this manual.
3. Name of i8080 Family LSI
All of the i8080 family LSI's employed in the CH-14/16 are from the
second source (duplicate of Intel 's original) and are of C-MOS version.
As those names may not be easy to remember, Intel 's original names are
used in this chapter.
If you have not yet acquainted with these LSI's, it is recommended to
read the section 1-21 (LSI Principle Summary) prior to other sections.
4. Random Logic IC's
All the random logic IC's employed in the CH-14/16 are HIGH-SPEED
C-MOS. Since the logic is exactly the same as the conventional TTL,
refer to a TTL data book such as the one published by TEXAS
INSTRUMENTS. Although the logic is equal between the two types of
IC's, do not replace C-MOS with TTL when servicing because the electri-
cal characteristics are different.

1-0
1-1. System Overview
The CH-14/16 Color PPI Sonars are mainly composed of (1) the display
unit, (2) the transceiver unit, (3) the hull unit and (4) the soundome.
The clinometer is optionally available.
DISPLAY UNIT

SIG

TVG. AGC

KP Senal
Communication

TX POWER 0

~ STATUS
~ ·~--------------~~----------~
o._
u
_ _ _ _ _ _ HULL UNIT

Raise /Lower
Motor
~. - 1~~'----C_O_NT
__ '--~ c
0
u

----~~-:Signal Flow
1 CONT

STATUS

BS-704
CLINOMETER
SO UNDO ME
Transducer

Fig.1-1

As shown above, there are two CPU•s in the display unit. One is the
CONTROL CPU which reads the control panel status and generates various
control signals including the transmission trigger signal, KP.
The other is the ECHO PROCESSING CPU which (1) acquires echo data, (2)
processes them for interference rejection, etc. and (3) writes the
resultant data on the frame buffer memory to update the picture. The
two CPU•s are linked through the serial communication line in the full
duplex mode.
Cyclic Sonar Operation
1) The CONTROL CPU generates KP (Keying Pulse), resulting that the
transmitter is driven and an ultrasonic pulse being emitted from the
transducer.

1-1
---~--~--~~--------------------------------------

2) At the same timing as KP, the CONTROL CPU triggers the ADC
(Analog-to-Digital Converter), and as a result the echo signal from
the receiver is converted into 3-bit data and successively stored
into the line buffer memory.
3) When the line buffer memory becomes full of echo data, BUFFER FULL
11 11

signal is issued, and the ECHO PROCESSING CPU fetches the echo data
from the line buffer memory.
4) The ECHO PROCESSING CPU processes the data for interference rejec-
tion, etc., and finally transfers them to the area in the frame
buffer memory which covers the so (2.S 0 in case of short ranges) sec-
tor where the transducer is staying. Though the frame buffer memory
is organized for X-Y coordinate addressing, the ECHO PROCESSING CPU
can know only the polar coordinates; (1) the distance information is _--..._
knowable from the time lapse from the transmission and (2) the
bearing information is sent from the CONTROL CPU through the serial
communication line. Whenever the ECHO PROCESSING CPU writes an echo
datum, it must convert the polar coordinates into X-Y addresses. One
X-Y address location corresponds to one pixel on the screen.
S) The CONTROL CPU turns the transducer to the next so (2.S 0 in case of
short ranges) sector center by driving the train motor.
The entire process, 1) thru S), is repeated.
Screen Refresh (Picture Presentation)
The contents of the frame buffer memory are; (1) read out in the order
shown below, (2) changed into three primary calor signals (Red, Green
and Blue) and (3) applied to the calor monitor display.
As the HORIZONTAL and VERTICAL SYNCHRO signals are produced at every
terminal X and Y addressingsrespectively, repetition of the above-
mentioned process results in a non-fading PPI picture on the screen.
This process is repeated at high speed independently of the Cyclic Sonar
Operation.

Y- address

The FRAME BUFFER MEMORY is read out in

the order shown left, and the HORIZONTAL
and VERTICAL SYNC signals are generated
V1
V1 when the accessing point jumps:
~
"'0
"'0
0
I
HOR SYNC timing
X
--- VER SYNC timing

FRAME BUFFER MEMORY

Fig.1-2

1-2
- FURU•o - - - - - - - - - - - - - - - - -

1-2. Transmission (TRX Board/DSP Board 1/3)

Generating KP CDSP Board 1/3)
See the schematic diagram on page S-3.
1) The ROM, U72, contains a pulselength table which is something like
the specification shown on page 0-1 (Item 4), and the CONTROL CPU
reads out one of the pulselength datum which is assigned to the sonar
range in use.
2) The CONTROL CPU writes the pulselength datum on the 8254 interval
timer, U75(#2), which is preprogrammed for the programmable one-shot
mode.
3) As soon as the pro~ammable one-shot is loaded with the pulselength
datum, it outputs KP with the designated pulselength.
4) The timer output, KP, is gated by KPG in U3, inverted into KP in U61
and finally sent to the transmitter.
KPG is fed from the one-shot, U16, shown on page S-4. When triggered
by the negative edge of KP, the one-shot outputs KPG. This pulse-
length is long enough to pass the full pulselength of KP through the
gate, U3. Such an arrangement may seem meaningless, but it protects
the transmitter from damage when the pulselength of KP is extended
abnormally.
Transmitter (TRX Board)
See the schematic diagram on page S-13.
KP fed from the DSP board 1/3 is (1) inverted by Q2, (2) extended in
pulselength by the output of the one-shot, U11(2/2), (3) gated with the
output of another one-shot U11(1/2) and (4) enables the frequency
divider, U15, which divides the oscillating frequency of U14 down to the
transmitting frequency.
The network placed at the base of Q2 eliminates narrow noise and limits
the amplitude of the KP input.
The one-shot, U11(1/2), protects the transmitter in the same manner as
U16 on the display board mentioned above. As for the one-shot, U11(2/2),
its purpose is described on page 1-4.
The pulsed drive signal from the frequency divider, U15, is (1)
amplitude-controlled by the open-collector buffer, U16, (2) amplified by
the driver, Q3 to Q6, and the power amplifier,. Q7 to Q16, and _(3) sent
to the transducer through the T/R trap network, CR19 to CR22.
Output Power Control (OSP 1/3 & TRX Boards)
See the schematic diagram on page S-3.
To control the level of the TX PWR signal, which is output by Q2 and
sent to the TRX board~ the CONTROL CPU outputs a 2-bit datum through

1-3
- FURU•o - - - - - - - - - - - - - - - - -

ports P23 and P22 of the 8255 peripheral interface, U77. Depending on
the 2-bit datum, either one of the decoder (U52) outputs becomes LOW,
resulting that a specific level is output by Q2.
Table 1-1
OUTPUT Switch P23 P22 TX PWR Output
ucu L L QV 1.2KW
IIBII L H 2V 120W
"Au H L 3V 12W
NOTE: The binary code, HH, is inhibited.

See the schematic diagram on page S-13.

KP derived from Q2 (on TRX board) is (1) converted by the comparator,
U10(1/2), into the pulse which swings between +10V, (2) inverted into a ~,
positive going pulse by U10(2/2) and (3) applied to the collector of the
buffer, U16. As the level signal TX PWR sent from the display board is
added at the inverter input, the amplitude of the positive output pulse,
i.e., the collector voltage of U16, changes depending on the OUTPUT
switch setting.

TP6
TX PWR--~~----~~
r1\ +SV I KP r-
\V ov ~
I I
I I

~+1::l-----+---
Ct.2

-12V
U10CI/2) -10V I I
I I
COMPARATOR I ~ :..-t

INVERTER
(RECTIFIER)
Q)
o

!;--\ -1 ch~n~s.
d---- ---.\d
I I

ThiS level
OV
--
Fig.1-3
Note that the edges of the DRIVE GATE signal are a little dull due to
C42 which is inserted in the feedback network of U10(2/2). This
arrangement serves to start/end the operation of the power amplifier
smoothly. In order to achieve damping oscillation during the delay
period t indicated in the above time chart, the drive signal is con-
11 11

tinually supplied even after KP by the output of the one-shot, U11(2/2).

See the time chart below.
KP~
I

DRIVE GATE r---\ \

(U ID 2/2) _J 't--
ONE SHOT ( ,,
v 11 ""2'\
q.1 :::::u'
~r:::_. . l ong enoug h f or t he
_ _ This perio d 1s
amplifiers to cease operation.
FREQUENCY-DIVIDER _DJJffiJJJJ1TIJ
OUTPUT (UIS' OlJT)
Fig.1-4

1-4
- FURUIMO - - - - - - - - - - - - - - - - -

1-3. Reception (TRX Board/DSP Board 1/3)

Receiver Amplifier (TRX Board)
See the schematic diagram on page S-13.
The echo signal received by the transducer is fed to the hybrid IC, U1,
through (1) the T/R switching network, RV1 and RV2, (2) the L/C filter
composed of L1, L2, C3 and C4, and (3) the protector, CR1.

The hybrid IC, U1, contains a mixer and a local oscillator, and the RF
signal is converted into 455kHz IF signal there. As the signal at this
stage contains various harmonics, a 455kHz component is picked up by the
ceramic filter, FL3.
The 455kHz IF signal is gain-controlled by another hybrid IC, U2, which
is made up of two stages of dual-gate FET•s and of which gain can be
controlled by the gate potential. The gain of thi~ VCA (Voltage-
controlled Amplifier) is increased by 90dB when the gate bias is changed
from 0.3 to 1.7V. As the gain control signal, (1) the TVG signal is
sent from the DSP 1/3 board and (2) the AGC signal obtained by detecting
the receiver amplifier output is added and applied to the gate of the
VCA. Further details will be described on page 1-8.
GAIN(dB)

+50 --------------

IN---'->-~
I
I
CONTROL~--!--+-i I
I
I
I

..-:;;..--'----- : _ _ CONTROL (V)

o.J 17. va
Fig.1-5
The output of the VCA, U2, is (1) passed through another 455kHz ceramic
filter, FL4, (2) amplified by the IF amplifier, U3, and (3) applied to
the absolute value detector composed of the full-wave rectifier, U4, and
the envelope-detector (integrator), U5.
The overall gain of the receiver is 144dB, and the saturation level at
tne output end (TP2) is +lOV approx. The receiver output is sent to
the DSP 2/3 board for A-D conversion.
AGC Circuit
The AGC (Automatic Gain Control) has two functions: (1) to suppress a
long-lasting signal, such as the seabed trail, and (2) to extract a
pulsed signal, e.g., fish echo which is hidden under the trail.
See the schematic diagram CDSP 1/3) on page S-3.
The level signal, AGC, is generated by using U77, U53 and Q3 in the same
manner as the TX PWR signal explained on page 1-3. This signal is sent
to the TRX board, and serves to change the AGC characteristics as shown
below. The meaning of this curve is as follows.

1-5
- - FURU-0 - - - - - - - - - - - - - - - - - - -

When the signal level is lower than the BLUE

t-
:::J
level on the screen, e.g., 0.5V at the ampli-
Q_
t- fier output, the AGC does not function.
:::J
0
Q_
::?: For the seabed return, of which level is
<t:
X
usually higher than this threshold (Vthl),
a: AGC functions and the amplifier output is
maintained at 0.5V, resulting that the
o.sv picture color remains in BLUE.

Vth1

Fig.l-6
However when a fish echo is superimposed on the seabed return and the
signal level exceeds the threshold, Vth2(determined by the AGC signal
level sent from DSP), AGC does not function, resulting that the ampli-
fier output increases and the picture color changes.

The simplified AGC circuit is shown below.

VCA

-12 V -~----...---+-~
QUICK
TVG-.N'v--. DISCHARGE

R116 1K

! TP4
AGC--~~~-------------

The feedback signal for the AGC is picked up at the output of the
DETECTOR. Until this level reaches 0.5V, the diode, CR9, remains in a
cut-off condition and the AGC does not function.
When the SIG level exceeds this threshold, CR9 becomes conductive, and
C27 is charged through R117. This charging voltage serves to lower the
VCA gain through the BUFFER and the ADDER, resulting that the SIG level
is restored to 0.5V.
In order to maintain the SIG level at 0.5V, the negative feedback amount
increases as the input signal level rises, i.e., the voltage across C27
increases more and more until it finally reaches the breakdown voltage
of U6(4/4), which is equivalent to the ltzener diode ... Even if the input
level rises further, the voltage across C27 can not exceed the breakdown
voltage, resulting that the SIG level increases linearly over 0.5V,
i.e., no AGC function any more. The 11 breakdown voltage .. is controlled
by the level signal, AGC, which is sent from DSP l/3 Board.

1-6
- FURU•o - - - - - - - - - - - - - - - - -

Notice that the time constant determined by C27 and R117 is considerably
long. When the amplifier input level suddenly rises, the AGC can not
respond immediately, i.e., the SIG level rises, and the AGC starts func-
tioning and the SIG level is restored to 0.5V after a certain time
del ay. Owing to this arrangement, a pulsed echo signal is exempted
from AGC effect. Also, this arrangement serves to detect the rising
edge of a flat echo signal which is superimposed on the seabed return
and the level is below Vth2. The following diagram shows the example
how AGC works to echo signals.

IHPUT
,--1
BREAI<-DoWN
Aft<: LEVEL
OUT ..... ',
(TP6)
','--,---'
. . . ....,._,-_-_T-/ime Consto.nt = O.lp(c27) x IK(R116)
' ' - -Tirne ConstCAnt ~ 0·1 )A (C27) X JOOK (R 117)
OUTPUT
(SI&) ~-- 0-sV (8LUE)

TVG Circuit Fig.1-8

The function of the TVG is to reduce the receiver sensitivity imme-

diately after the transmission and gradually return it to the normal
condition as time elapses. This arrangement serves to suppress surface
noise which usually covers the center part of the CRT when the tilt
angle of the transducer is set shallow (horizontal). Also, the TVG ser-
ves to compensate for propagation loss of the echo signal from a distant
target.
See the schematic diagram (DSP 1/3) on page S-3.
The logarithmic TVG waveform, which is applied to the VCA (U2) in the
receiver, is generated by the CONTROL CPU:
The 8254 interval timer, U74(#2), which is preprogrammed by the CONTROL
CPU for astable mode (Mode-2), triggers the flag flip-flop, U68, at the
preprogrammed rate. Whenever the flag is set, i.e., TIM INT becomes
LOW, an interrupt is initiated:
(1) The CPU recognizes it by polling*, (*See page 1-42.)
(2) the CPU clears the flag by generating TIM CLR through the port, P24
of the 8255 peripheral interface, U76, and
(3) finally the CPU returns from the interrupt program to the original
task.
The CONTROL CPU can recognize time lapse (distance) from KP (own ship)
by counting up the number of ticks (timer interrupts) which have
11 11

occurred after KP. And, in accordance with a time lapse, the CPU
changes the digital input value for the DA converter, U62, through the
8255 peripheral interface, U77, so that the analog output IQ may change
logarithmically. The OP amplifier, U43, in the next stage smoothes the
output waveform and converts a current signal into a voltage signal.
The resultant TVG signal is sent to the receiver circuit for time-varied
gain control. Note that the TVG curve changes according to the TVG
TIME/LEVEL switch settings and is superimposed on the DC level which is
determined by the GAIN switch.

1-7
- FUAUIMO - - - - - - - - - - - - - - - -
__, ~ KP MuTe

This amplitude changes from

1
4-.SV
OV to 4.5V when the TVG 1"1- ---.,
LEVEL setting is changed
from 0 to 10."
11 11 11
--11 l' , ,_ _ _ _ _ "TVG"(TP. 8)

This level changes from +2V ~ 0 l.OOms

(JQQM)
1300ms
(1000M)
to OV when the GAIN setting "o" "s" "10"
is changed from 0 to 10.
11 11 11 11

The time constant (TVG-effected

range) changes as shown above when
the TVG TIME setting is changed
from 0 to 10.
11 11 11 11

Fig.1-9

VCA Control (AGC + GAIN/TVG)

The following diagram shows the VCA control circuit on the TRX board
{page S-13).

Fig.1-9'
The AGC feedback signal and the GAIN/TVG signal from the display unit
are added to the regulated -12V, and the resultant negative signal is
inverted by U6 into a positive signal, Vg, and fed to the VCA, U2, for
gain control.
Since U6 is an inverter, the output Vg becomes maximum, i.e., the VCA
gain becomes maximum, when the GAIN/TVG level is minimum (QV). The gain
under this condition, e.g., the max. gain, is determined by R30 setting;
R30 is adjusted for +50dB gain (+1.7V on TP.14). See Fig.1-5.
On the other hand, the output Vg becomes minimum, i.e., the VCA gain
becomes minimum, when the GAIN/TVG level becomes maximum (+4.5V).
The gain under this condition, e.g., minimum gain, is determined by
R27 setting; R27 is adjusted for -40dB gain {+0.3V on TP.14).
See Fig.1-5.

1-4. Echo Acquisition (DSP Board 2/3)

See the schematic diagram on page S-4.
The data acquisition circuit is mainly composed of:
. Level Analyzer (AD converter), U63
. Peak-hold Register +Comparator, U64
. Line Buffer Memory+ Address Counter, U65

1-8
- FUIRU-0 - - - - - - - - - - - - - - - - -

The echo signal, SIG, sent from the receiver is first converted into a
series of 3-bit data by the level analyzer (U63) and then acquired by
the ECHO PROCESSING CPU through the following steps:
(1) ECHO PROCESSING CPU generates CNT CLR through the port P26 of the
8255 peripheral interface, U56, resulting that the address counter
(U65) is initialized to zero.
(2) See page S-3. Immediately after generating KP, the CONTROL CPU wri-
tes the reception RANGE period on the 8254 interval timer, U75 (#0),
which is pre-programmed for the programmable one-shot mode. As soon
as the period is written, the timer outputs a negative-going pulse,
REC, with the duration equal to the reception range in use.
(3) During REC period, the peak-hold circuit (U64) stays in active con-
dition because it is released from CLEAR condition, and the clock
signal, SMP CLK, is fed to the R/W and CS inputs of U65 and to the
SMP input of U64.

Digital Sampling/Peak-hold and Write-in Cycles during REC Period

See Fig.l-10.
The peak-hold register (U64) is cleared immediately after the posi-
tive edge of its SMP input, and thereafter it countinues peak-hold
operation until it is cleared at the beginning of the next SMP
cycle. Therefore, the peak value becomes available during the LOW
period of the SMP input, and the peak-hold register content is
stored in the buffer memory (U65) at this moment. Since th~address
counter (U65) is incremented at every positive edge of the CS input,
repetition of the above-mentioned operation results in echo data
which are stored in the line buffer memory (U65) from the nearest·
to the most distant point in order.

I< SMP Cycle ">- I

REC SMPCLK
::(SMP.CS.R/W) l I
u

U64 Value 1n Peak-hold Reg.

( @,~.@.@ --- Pe~k VJues)

U65 Address Counter

1
r k-1 t !<
~i--'- - - - - u - - -
k+2

'; Read/Write

Fig.1-10
(4) When REC rises;
. the peak-hold register is locked in the CLEAR condition, and
. the supply of SMP CLK to U64/65 is stopped.

1-9
- FURU-0 - - - - - - - - - - - - - - - - -

(S) Now peak-hold/write-in operation is disabled, and the CPU fetches

the line buffer memory contents:
Notice that the positive edge of REC sets the interrupt flag flip-
flop, US, which is seen at the upper right corner of the circuit
diagram. The LOW level of the flip-flop output, END INT, which is
fed to the interrupt input of the CPU causes the CPU to execute an
interrupt program to fetch the buffer memory contents:
A. The CPU generates CNT CLR through US6 (Port 26) to initialize the
address counter in U6S.
B. A certain address is assigned to U6S, and whenever the CPU reads
this address, a negative pulse, CS3, is output Qy the address
decoder, U4. This pulse stimulates the~ and Ut inputs of U6S:
The built-in address counter (U65) is incremented by the positive
edge of CS, and the echo datum which is pointed to by the address
counter is output during the next LOW period of OE.
Therefore, repeated read of this single address results in the
fetching of all echo data from the line buffer memory.

CS -u I
'
u, \ u\ I

Addr Counter k-1 ,; ~

~: K-r1 p K -to 2.

OE
(output enable)
-------
Fig.1-11
~ ~

C. After having read out the buffer memory contents, the CPU clears
the interrupt flag flip-flop, US, by generating END CLR through
the port P2S of the 82S5 peripheral interface, US6, and returns
from the interrupt program.
NOTE: The word length of the line buffer memory is 4 bits (03, 02,
D1, DO), but the MSB (D3) is not utilized by the CPU.

1-5. PPI Frame Buffer Memory Write by CPU (DSP Board 3/3)
See the block diagram Fig.1-12 and the circuit diagram on page S-S.
Chip(Bank) Select
Generally speaking, a CPU has two methods to gain access to devices
including memories:
One is the usual MEMORY ACCESS, such as the one used in accessing the
main memories (ROM and static RAM in case of this equipment). When I/0
devices are mapped on this address space .(memory address space, 64K),
the CPU can gain access to them by using .. Read/Write Memory .. instruc-
tions. Such I/0 is called 11 Memory-mapped I/0. 11

1-10
- FURU•o - - - - - - - - - - - - - - - - -

Another is the I/0 ACCESS which is achieved by using the Input/Output

instructions. If memory devices are mapped on this address space (I/0
address space, 64K), the CPU can gain access to them by using
Input/Output
11 11
instructions. Such a memory is called I/0-mapped
11

Memory ...
The frame buffer memories explained below are all I/0 mapped memories,
and the CPU gains access to them by using I/0 instructions. (Since the
CPU•s I/O address space (64K) is used up by the frame buffer memories,
the other devices tied to the system bus are naturally mapped on the
memory address space.)
For picture presentation, three chip•s of frame buffer memories are
provided:
U37 ( 64Kx4): for PPI picture
U59 ( 64Kx4) : for historical picture
U11 (64Kx4): for characters/marks superimposed on PPI/historical
pictures
Since the CPU•s I/0 address space is only 64K (16 bits, A15-AO), as men-
tioned above, the ECHO PROCESSING CPU can not gain access to the three
chips freely; access is gained through the following two steps:
(1) First, the CPU selects the desired chip by putting LOW level on
either P10, P11 or P12 output port of the 8255 peripheral interface,
U56 (on OSP 2/3). Once this operation is performed, the other two
chips are write-protected.
(2) The CPU writes data on the selected chip by using 11
output 11

instructions.
Address Multiplex
As seen in Fig.1-12, the dynamic RAM can not simultaneously accept 16·
bit address; the high address (A15-A8) and the low address (A7-AO) are
multiplexed by the ROW/COL signal, and latched by the RAM on the Column
Address Strobe (CAS) and the Row Address Strobe (RAS) respectively.
Signal DT is usua~ly kept HIGH, and the memory is readily accessible
from the CPU. It periodically becomes LOW for a short moment, but the
CPU (software, or programmer) may disregards this condition because the
BUSREQ (Bus Request) signal is issued at this moment and as a result the
CPU•s function is frozen automatically. Further explanation will be
given on page 1-19.
Memory Write
So called 11
Early Write Mode 11
is employed in this equipment:
As seen in Fig.1-13, the signals required for memory write operation
(RAS, CAS, WE) and the address multiplexing s1gnal (ROW/COL) are pro-
duced of (1) 7.16MHz Clock Signal, (2) System Clock (CPU~) and (3)
various signals which are output by the CPU.
The column (A15-A8) and row (A7-AO) address informations are latched
into the memory at the negative edges of CAS and RAS res~ctively, and
the datum (03-00) is stored in their coordinates during WE period.

1-11
 FURU•o
ECHO PROCESSING CPU
U32 I~

m
ROW/COL

•
•
o.
<!
I
U"l
. :;;:·.
•
•
.
r- - - - - - - - - - -~- - - --~- . ,I
~~--- r------------ ---------

, !: ~E 48'D-'--q ~
p.;I~O----:---;..:..--+-..ul8~ p 1Q
I 80:: :1'7 W

<! PP I -<':~----.:~~"

-=-+-~----:--:......:

V
u
E
DT ~
I
c
I I
!.. __ - - - - - - - - - - - - - - - - - - - __ .J 2V
..c
I U33-U36
U59 ,, P11
Q.
;::
V
Cl.
=-~.

L()

t: ~1:5~~~~~~~ l
L()
N
CO

<..D
L()
:::J

1-----------------1
u u
u
7- 10
-----:-~:--:~....;;~---"2'-fO 11
t>9_
8 47p;I.:.-D
_:._-'-'-:-..:....;.._---'
p 12

c~
.·. ·. · .. ·... ·.. · ·. ;:-

L________________ J
Fig.1-12

(I)

('2)

~-bit a..d.dr (A7-Ao) is lo..tched.

o..s ROW addr a..t ~ .

07-00

Nl-Ao is selecTed duril13 Ro~

rmd AIS- A~ duri113 COL.

" Q (pin 9)

8-bit oJdr (AI5-A~) is lo.tched

11
a (pin 8) .. ·~:~~ EAS···~·--,"~j
as COLUMN o.ddr o.t ~.

WE ~~--~·;,~:~~;:--~w-~~~:~:~~--~~<~:~·-~;1 Do..Tum Is sTord dvrin~ WE.

Fig.1-13
1-12
- FUAUINO - - - - - - - - - - - - - - - - -

Memory Refresh
Whenever the CPU fetches an op-code (instruction in a program) from the
ROM, U31, (on DSP 2/3) the refresh counter inside the CPU chip is incre-
mented and the counter content is put on the address bus (A6-AO) along
with the strobe signal, RFSH.
As shown in Fig.l-14, 0P-code fetch is done by using four clock
11 11

cycles, Tl to T4. However, the period which is actually spent for

memory access is T1 and T2 only, and during the remaining period (T3,
T4) the refresh counter content is put on the address bus. Refreshment
of the RAM chips is accomplished, stealing this period. But note that
the refresh counter content which are put on the address bus by the CPU
is not utilized in this equipment. Instead, CAS before RAS Refresh 11

Mode using the RAM's built-in refresh counter is employed:

11

When CAS is applied in advance of RAS unlike normal memory access men-
tioned befQre, the RAM is placed in REFRESH mode. The memory's built-in
refresh counter is incremented and the ROW designated by the counter is
refreshed. Since the CPU is running most of the time at high speed, the
above-mentioned arrangement refreshes more than 256 rows per 4ms, which
is the refresh requirement of the chip.

CPU Ill
(System Clock)

CPU's ''fetch" cycle T1 T2 T1

(M1 cycle)
....---......tNot utililed.)

§{A15-AO Program:counter Refresh:Counter

::J -- ~------~----~: : L~ ~--------

fj RFSH
!~0,~~~
I I I I
I I I :
I

U51 Q (Pin 9) ::::::.-~~--_,( C_L_R_)-=._-=._-=._-=:_-=:_-=.~~·__;,;_ _ _____.F' r--(CLR)--

// Q (Pin 8)

Fig.1-14

1-6. Echo Processing and Polar to X-Y Coordinate Conversion (DSP

Board 3/3)
Frame Buffer Memory Write Operation was explained from the hardware side
in the preceeding paragraph 1-5 • This paragraph will discuss what
kind of software processing is added to echo data before the CPU write
them on the frame buffer memory.
Note should be taken that the description in this paragraph is limited
to the outline of the algorism, and may not be exact in detail.
See the diagram on the next page which briefs the process in five steps,
CD to @. Detailed descriptions are made on page 1-15.

1-13
 U65 Line Buffer Memory

I I 1--- I I - - - I I IJ
U30 CPU'sMain Memory CD Echo Acquisition
r----------------~
I

R1 I I 1---1 1---1 I 1-------...

..-,--(..,R_a_w_D.,...a-ta.......-Ar_e_a--,s)r--..--.J (j) Tran fer
5

R2 I 1---1 1---1 I I 1
f7\ Compare and select smaller value
I ~for interterence rejection.
I
I
1 I
Smaller

3
1 1
1 ' Value

R~ :C~r:l:~.~$:~~a-:r~as) I]: G)-Tra~s~e~--------------------~

R4:
I
I 1---[1~---1 I I
I
I
I
L-------------------....l Example of Longitudinal Smoothing 1
---------- k ----- 1 o
<
1

Distance
The CPU calculates the "k"th value for every
interpolating string so that the value may I
change from "1" to "6" smoothly. :
R.BRN 7 I
Vo..lues of cLI)ta. R3
RED 6 ''k''th I
ORG 5 I
VEL 4 I
GRN 3 I
L. BLU 2 I
BLU 1
I
® D. BLU 0 .s• I
I
lhe above operation is applied to every "k"th data. 1
I
The CPU creates the interpolating data strings, and outputs I
the R4 contents and interpolaing strings onto the 5° sector I
area where the transducer is staying. The CPU calculates I
(X, Y) address for every datum. I

v~---------~~;~~~-:ta~tr:g~~reat: ~PU~_j by

(In the next sonar cycle, R3

!! contents will be output here
1 ,' through R4.)
I "··~·i' 6
I,'
I I
I I
I I
I I

U37 Frame Buffer Memory

------------------------------------------J X
Fig.1-15

1-14
- FURU•o - - - - - - - - - - - - - - - - -

Besides the line buffer memory, the CPU keeps four areas, R1 to R4, in
the main memory (Static RAM) where it handles echo strings. R1 is used
to store the latest echo string from the line buffer memory, and R2 for
the second latest one. R1 and R2 contents are correlated for inter-
ference rejection. R3 and R4 are used to store the latest and second
latest echo strings after the correlation.
The process mentioned hereafter is initiated as a result of the END INT
interrupt mentioned on page 1-10.
(1) The CPU saves the echo string from R1 to R2.
(2) The CPU transfers a new echo string from the line buffer memory to
R1. Now, R1 and R2 contain the latest and the second latest echo
strings respectively.
(3) The CPU saves the R3 content into R4.
(4) The CPU correlates* the R1 and R2 contents word by word, and stores
the resultant echo string in R3. Notice that the latest and the
second latest "correlated echo strings" are now available in R3 and
R4 respectively.
* NOTE: The CPU reads out a 4-bit datum from each R1 and R2, com-
pares the two in value and selects the smaller one.
(S) In this step, the CPU paints the S0 (2.S 0 in case of short ranges)
sector where the transducer is staying.
First the CPU transfers the R4 contents (the Second latest data
string) to the left edge of the sector, and the rest of the sector
is filled with a number of interpolating data strings. When
creating such data strings, the CPU refers to:
A. R4 contents: the second latest data string which has been just
copied onto the left edge of the so sector.
B. R3 contents: the latest data string which will be copied onto
the left edge of the neighboring so sector via R4 in the next
sonar cycle.
The value of each 4-bit datum composing an interpolating data string
is determined in the following manner:
An echo data string may be regarded as an array comprising hundreds
of 4-bit echo data, and any 4-bit echo datum in the array can be
specified by using the suffix "k." (Note that the suffix "k"
indicates the distance from the ship.) In the example shown in
Fig.1-1S, the value of the "k"th echo data in R4 is "1"(=LLLH) and
that of the corresponding one in R3 is "6"(=LHHL). The CPU calcula-
tes the value of the corresponding ("k"th) echo datum in every
interpolating data string so that the value may change from "1"
unti 1 "6" smoothly.
The above-mentioned process is applied to every "k"th echo data in
the interpolating data strings, resulting that the image is smoothed
in the longitudinal direction.

1-1S
- FURU•o - - - - - - - - - - - - - - - - -

Whenever the CPU outputs an echo datum onto the frame buffer memory,
it calculates the X-Y address for it. As the first step, the CPU
obtains the polar coordinates from two parameters: (1) the suffix
11
k11 and (2) the transducer direction information which is sent from
the CONTROL CPU, U71, (on DSP 1/3) through the 8251 programmable com-
munication interfaces, U54 (on DSP 1/3) and U55 (on DSP 2/3). And
as the second step, the CPU figures out the X-Y coordinate address.
NOTE: Memory write operation for the historical picture memory is
explained in the next paragraph, since it is related to the
hardware for memory read.

1-7. Frame Buffer Memory Read for Screen Refresh (DSP Board 3/3)
See the block diagram Fig.1-16 and the circuit diagram on page S-5.
Horizontal Timings and Screen Layout (Waveforms P.7-i2)
All the circuits in this section work on the timings which are generated
by decoding the horizontal address counter (U39-U41) with the ROM, U38.
The counter operates at 7.16MHz, and its contents are parallel-tied to
the address inputs of the ROM. As the count progresses, various signals
(BLNK, etc.) are output from the data output of the ROM with the pre-
programmed pattern. When the counter reaches its terminal count, which
is also detected by the ROM, it is cleared. This process is repeated
continuously.
See Fig.1-17 where various ROM outputs (horizontal timing signals) are
shown in reference to the screen layout/frame buffer memory maps.
One scan line on the screen is drawn by using one horizontal unblank
(BLNK=LOW) period, and one complete frame is composed of several hundred
repetitions of this operation.
~

Each unblank period is divided into two time segments, SNR R and ESM R.
Data in a certain row in the PPI picture memory is read out during SNR R,
and data in the row in the historical picture memory is read out during
ESM R.
In the expanded historical mode, the historical picture memory is read
out at the same speed as the PPI picture memory. But, in the normal
mode, the reading speed of the historical picture memory is doubled.

1-16
 "I
)

82 55 Interface 1 .n ')MODE
U56
Ill
c
SCR7-SCRO

CPU
Load U32

BU57.58
V. ADDR COUNT
BUSAK BUSRQ
II
•
DELAY

r------r~-~:~~-:-:~~~~:::1;-.:-.~::.---~--:-~-.--~-u
N
I

I : -:
2:

·.·.:_:1 ·1
BLNK
BLNK I <.D
(""-..

II r--------------------i-,
U17-U20 1 (:.(

r-:.-:: a~:
I

Load ~ I I
SNR R

~ I ·:· __ u~.·· I
N

I ~-. PP! ~ ~ .-.· .. / 2:

l~
I ....J ___ _,~ S_f ~ <.D

o r-..: • a:
I ·. ·. _j
11 w

.......
.L
'
·. ·.
·..
··:.
u
/"
ROW BUFFER
-71

I 0
u
il
0
0
u
w2:

~~
I
....... ROW ADDR !REGISTER oo
""-J : I ,y• p \..')0:
z~

i
- ex:>
U37 ;1 /
4
M a
2:M
f-
:::J

0 :I
:4-blt
I

-------- - -- ---- ----- - ----- ----------- ------- I

I

L---- - -- ~Q~ ~~O_L_- ----- J

. I :
~------ J
I

t
-------------------, ESMR
U33-U36 ~:::::;:
IH: = ~ " ' fh
ESC ! 1.1 I_L-
ill
A15 -AOHISTOR ESMR~

U59

- I
--------------------~
t:~~~R:+;~o
',

'------=A15-AO-U7-U10 se I'
N N w
V7-VO Ull I I
2:
<.D
I
2:
N
0
0
2:

---------------------~!
CO
(""-.. ~

VD3-VDO

Fig.l-16
FURUINO

a:
LJ.J
.......
z
:::J
255 0 0
u
ROM OUTPUT

'\
~
--"""----- '\ a:

I~ ~
0._

li
.... .... '\
'\ oa
'' '\ <{~
' '\ IU
' \

!
' I
I
SCREEN LAYOUT
Address Map of
PP! Picture Memory
.....J
8 .. -----
I
I /
, -----,\
I /
I /
\
_\ _____________ -!_I I \

' ',, I
I
' I
I
.," /
I I

PP!

.262

~V.BLNK
--
1 Historical
255

Address Map o t
Historical Picture
Memory

NOTE 1. ~: Area not utilized

2. ~~~:Expanded Historical Mode

~ ~: Normal Mode

Fig.1-17

1-18
- FURU•o - - - - - - - - - - - - - - - - -

Serial Output of Frame Buffer Memory

A conventional dynamic RAM is provided with the parallel I/0 port only,
and it is shared by the CPU and the memory read circuit (display
circuit) in the multiplex mode. In order to interface such a chip with
a CRT display, an additional circuit is required for serialization of
output data. In addition, a complicated circuit is required to control
the access from the CPU and the display circuit. Of course, high
throughput of the CPU can not be expected since CPU access is inhibited
while the RAM is being read by the display circuit.
The dynamic RAM employed here is provided with .. Serial Output Port in
11

addition to the conventional parallel I/0 port, and the parallel and
serial ports are interfaced with the CPU and the display circuit respec-
tively. By using this type of RAM (DUAL PORT RAM), a simple memory cir-
cuit design is feasible and the CPU can gain access to it freely at any
time*.
*NOTE: There is a period in which CPU access is inhibited, as described
below. But, the period is extremely short when compared with
the conventional CPU-Display sharing mode.
As you can see in Fig.1-16, the above-mentioned functions are achieved
by the ROW BUFFER REGISTER and the COLUMN ADDRESS COUNTER which are
additions to the conventional D-RAM.
The ROW BUFFER REGISTER is capable of storing the data which are
parallel-transfered from a row of the memory array, and the COL ADDR
COUNTER reads out the register contents word-serially, e.g., 4 bits by
4 bits.
Parallel Transfer to Row Buffer Register (Waveforms P.7-14)
(1) When BLNK output of the decoder ROM (U38) rises, BUSRQ (Bus Request)
is signaled to the CPU through the flip-flop, U24, and as a result
the CPU is put into FREEZE condition, and acknowledges it by the
BUSAK (Bus Acknowledge) signal.
(2) When the DT (Data Transfer) input (which is identical to BUSAK)
becomes LOW, the following take place in order:

. During the ROW period, the vertical counter contents (U21/22 or

U57 ,58) are latched ·into the chip as a row address. As a result,
the data in the row address are parallel transferred to the on-
chip row buffer register .
• During the succeeding COL period the on-chip column address counter
is initialized to zero.
Now, the row register is full of new data, and the on-chip column
address counter may read out the register contents serially, being
clocked by SC (Serial Clock).

1-19
 (3) The flip-flop, U24, is cleared by the delayed BUSAK, resulting that:
• BUSAK COT) becomes HIGH and the RAM goes into the normal operating
mode, i.e., its address input is tied to the CPU (A15-AO) and the
column address counter starts reading the row buffer register .

• The CPU is released from the FREEZE condition and reverts to the
original task.
The detailed time chart is shown below.

BLNK
___s--- ---~____

BUSRQ ~{ __ :.::~l~~"·'' ,, ... " "\'f'

I

7.16MHz __n__n_-- --Ifl-ll--Jl----1 ---SL_

CPU C/J L _ j - - - jrLL__(rHL'_ ---_fl_
\ ~ '

\
~* .
\

I
o
I
I
'
----.,-.:C.\·: '' : ; \ ·.:· ;,·:\~: ;.· DT ',,,:ai
I
I o::
......
I I ' (JI

U51 Q (p1n 5) ~~----_-_(c~~.;,_)___.;...:-;_ ____JP '-Jl-__ __ B-bit ttddr N7-VO) is lo.tched

'' 0 (pin 6)
• RAS ,.-j o..s Row a.ddr o:J:. Y...

U42 Q (pm 5) ------------ --(CLR)~ ___j ,_). l 1'----------------- V7- VO is selecTed Jurin3
,, o (pin6) ------------ Row coL f, _________ --·Row. . o..nd 'oooo oooo 'Juring
~-;....._,.:.----+__J 1 C.OL.

' I
// Q (pin 9) ------------ (c_LR>-...,:__::_ _.._~n---+---:_
I
____ ----------- ~-bit ()..dJr (ZEROES) is lo.tched
// Q (pln8) ·----------- L __ C_A_S_ _ J into COL ADDR COUNTER oi: ~.

*NOTE: Even if BUSRQ becomes LOW, BUSAK can not become LOW imme-
diately. It is delayed until the CPU proceeds to the last
clock cycle (TL) in the current machine cycle.
Fig.1-18
Historical Picture Presentation
Be aware of the following two facts: (1) The vertical address counter
for the historical picture memory is loaded with the 8-bit data (SCR7-
SCRO) at the same timing as the initialization of the vertical address
counter for the PPI picture memory. (2) The CPU can change the 8-bit
data (SCR7-SCR0) through the output ports, P07-POO, of the 8255 program-
mable peripheral interface, U56 (on DSP 2/3).
What this all boils down to is that the CPU can control the start
address (row address) for the memory read (picture display). In order
to display the scrolling picture, the CPU outputs an echo data string to
the memory in the following manner. This process is initiated as a
result of the END INT interrupt, explained on page 1-10.

1-20
~--~--~~----------------------------------

(1) After having painted the 5°(2.5° in case of short ranges) sector for
the PPI picture; as explained o~ page 1-15, the CPU transfers the R3
contents from the main memory to the row which is marked END in
11 11

Fig.1-19.
NOTE 1. EN0 row address is one address earlier than the (SCR7-
11 11

SCRO) value.
2. The above-mentioned output operation can not be seen on the
screen because the END row is located inside the vertical
11 11

blank area.
(2) The CPU decrements the value (SCR7- SCREEN
SCRO), resulting that the memory
contents are read out from the
newly written row.
The above-mentioned process, (1) and
(2), is executed every transmission,
resulting in picture scrolling on the
screen.

HI 5 TORICAL PICTURE
FRAME MEMORY

Fig.1-19

1-21
- FURU•o - - - - - - - - - - - - - - - - -

Serial Output Control of PPI/Historical Picture RAM's

See the block diagram Fig.l-16 and the time chart Fig.l-17 again.
The clock (ESC) frequency for the historical picture RAM can be switched
between 7.16MHz (same as PPI/character) and 14.32MHz. When the row
buffer register is read at high speed the picture shrinks. Thus
14.32MHz is for the normal mode and 7.1EMHz is for the expanded
historical mode. The word-serial outputs from the RAM s (PPI &
1

Historical) are combined and sent to the col or matrix, Ul5. As the
output of each RAM is 3-state and is controlled by the time-sharing
signals, SNR Rand ESM R, there is no possibility of bus conflict.
Sarial Output Control of Character RAM
As for the character RAM, the 7.16MHz clock signal is applied through
the entire period except the horizontal BLANK period. Thus characters
can be put on any position in both the PPI and historical pictures. You
may be wondering how the character RAM (64K words) can cover the PPI
picture RAM (64K words) plus historical picture RAM.
See the block diagram Fig.l-20. The above-mentioned problem is solved
as follows:
(1) Single bit information is sufficient to present a dot in a single
calor (WHITE). A pair of dot data are contained in each word (4
bits) of the row buffer register; bit SOl is uti 1i zed to store
the dot datum for the SNR R period (PPI picture period) and bit
S02 for the ESM R period (historical picture period).
(2) The row buffer register contents are read out twice; first in the
SNR R period and second in the ESM R period. Through the two-time
readings, dot datum is picked out from different bit address, first
from bit SOl and second from bit S02.
As shown in the diagram, the horizontal address counter is made up
of 9 bits: the low bits, H7-HO, are identical to the column address
counter in the PPI and historical picture RAM's, and the MSB(H8) is
utilized as the flag bit which indicates which bit (SOl or S02) is
to be selected. H8 keeps logical ZERO state while the row buffer
register in the PPI picture RAM is being read, and SOl is output
from the lY output of Ul2. When the row buffer register in the
historical picture RAM is read, H8 turns to ONE, resulting that S02
is output from lY.
Likewise, the horizontal blanking control is done by the CPU (software).
In this case, S03 and S04 are utilized as dot-blanking data for the
SNR R and ESM R periods respectively, and the data is bit-serially out-
put from 2Y.

1-22
IFal~--11---------------------------------

:
I /
,'' -,
1/ \
I' \
t,' I
11 I

l
~
SCREEN
11

I\
•\
I '
I '
I ' H. ADDR COUNTER

4-1 DAT1\ I HO
SELECTOR
U12
1
~o:g:J~---o:~
I
ILJ)

I
I (
)
HC153 I I H7
I
r--
1 0
I
I
I
1
I
I
I
0 A '"'
~ H8
'--

1C3Jr1
I
I
ROW BUFFER 0~ 1 1
I
I 0 I 0 B ~Vertical
I BLANK U15
REGISTERS I

0~ 1C2, ', I I
COLOR DECODER/MATRIX
' ....' ~,
~
I
1C 1,_: I
t'( ~

~
I
1CO---:.~~ 0 0 CHR 0 1 1
~ llso21
I
1
I IS011
Character I I' G2
Ull 1~ 2C3 ---;.-:;7 1 1 •(@t @) 2yltt 3 X 0 ....
Q)
I I 0 ..c
1~ 2C2 ... ....- ,,.
,"'I' TRUTH TABLE Of U12 H.BLNK~ G2 X 0
0
Ill;:-
~ 2C1 ' / eo
.28
~ 2CO'
o-
e~
:De
Eo
V03 lfl. o..c
.,. G1 X 1 u-
PP!&
Historical
VD2 ,., .,.' c X 1 1 1 1 0 0 0 0 X
U37& U59
VD1
voo
,,
/t .,. B
A
X 1
X 1 0
1 0 0 r 1 0 0
1 0 1 0 1 0
X
X

a: CD
o··
- 1-
z
a: 0 C)...J z
:::>
_J :::>
:::>
_J ..X:
u
...Jl:) I ID w a:w O:ID ....J ID 0
0 .. a: 0 > C) • ID
ua: 3: a: ....J 0 iD

~ ~ Zo,L lMa~ri; l i~
jj! t,/ ~

r- j..e
~ l1'2 ' 11TP3
~
TP4

Fig.l-20 R Et 8

1-8. RGB and Synchro Signals (DSP Board 3/3)

See the block diagram Fig.l-20.
A pair of single-bit data (character and blank) from the character RAM
are applied to the CHR and G2 inputs of U15. Echo data(VD3-VDO) from
the PPI/historical picture RAM's are applied to the Gl and C/B/A inputs.
Depending on the combination of the input signals, the three primary ·
color signals(R,G,B) are generated with proper levels to illuminate the
pixel in the designated color (the characteristics of U15 are given in
Fig.l-20 in the form of truth table.)
Whenever CHR becomes LOW, equal amounts of R, G and B are output,
resulting that the screen is painted in WHITE color.
If CHR is HIGH and G2 and Gl are LOW and HIGH respectively, the screen
is painted in the color designated by the lower three bits of the echo
data(VD2-VDO). The MSB(VD3) is utilized for software-blanking.
1-23
- FURU•o - - - - - - - - - - - - - - - - -

As for the synchro signals, they are generated from the horizontal and
vertical address counter (U39-U41, U21-U22) outputs. See the circuit
diagram on page S-5.
When the row buffer register in the historical picture RAM(U59) has been
read the ESM R signal falls, resulting that the one-shot, U60(1/2), is
kicked and a delay pulse is developed on the Q (pin 13) output. When 11 11

this output pulse falls, another one-shot, U60(2/2), is kicked, and the
horizontal synchro signal, H.SYNC, is output. Owing to U60(1/2), the
horizontal flyback point is delayed from the end point of the historical
picture until the middle of the horizontal blank, i.e., the flyback trace
is safely suppressed.
On the other hand, the vertical synchro signal is obtained by gating the
outputs of the vertical address counter(U21, U22, U14) directly. See
the time chart below. --
~w~~mo~NM~~w~~mo~NM~~w~romO~N
0 ~ N --- MMMMM~~~~~~~~~~~~~~~~~~~~WWW
NNNNNNNNNNNNNNNNNNNNNNNNNNNN

BL NK IlilJ1f
I y.AbDR COUNTER'

: LOAD(CLR)
vo _fL_f --- I

Vl _j---
V2 _ _ - - - _j L
V3 ~ V.SYNCHRO 0;/j
CO - - -

V4
---
V5
---
V6
---
V7
---
CO - - -

U14 QA --------------------____J~~
~-------V. BLNK -------~

Fig.1-21
As seen in the time chart, the vertical synchro signal is produced in
the earlier part of the vertical blank signal, V.BLNK.
Both the horizontal and vertical synchro signals are EX-ORed into the
composite synchro signal, C SYNC, by U80 and sent to the calor monitor
display along with the RGB signals.
LJ
H ·SYNC lllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll
c . SYNC ~llllllllflllllllllllliUIIIUIIIIIIIIIUilllllllllllllllllilllllllllilllllllllliUIHII~lllllilllllll
Fig.1-22
1-24
- FURU•o - - - - - - - - - - - - - - - - -

1-9. Monitor Interface for CH-16 (MIF Board)

Separation of HV Synchro Signals
As the color monitor display (TM-140F) for the CH-16 can not accept the
composite synchro signal, unlike the AlOA8USPll display for the CH-14, the
horizontal and vertical components are separated beforehand.
See the circuit diagram on page S-8.
As shown in Fig.1-22 (on page 1-24), the horizontal synchro signal com-
ponent contained in the composite synchro signal, C.SYNC, changes its
polarity during the vertical synchro period. The one-shot, U2(1/2), and
the D flip-flop, U1(1/2), detect the vertical synchro period by uti-
lizing this characteristics.
U2(1/2) is triggered by the negative edge of C.SYNC. As the pulselength
of the one-shot is twice as long as the horizontal synchro signal com-
ponent, the C.SYNC level which is sampled by U1(1/2) at the terminal
point of the one-shot output indicates whether or not it is vertical
synchro ~eriod. As shown in the following time charts, the D flip-flop
output (U1 Q, pin #6) usually keeps LOW level, but it turns to HIGH during
the vertical synchro period.

C.SYNC

'I 'I
Ul 0 (Pin #6) ' ' L ' ' - _ _ . L - - - - - f C - - - - - ' I L - - - - -..~-
...

C.SYNC

U 2 Q (Pi n #12 )
'I II I

Ul Q (Pin #5) "t-t" _----L._):_ _ _ _;.!C-----"""-"---~

Fig.1-23
When C.SYNC is EX-ORed with this "reproduced vertical synchro signal,"
the horizontal synchro signal component in the vertical synchro period
is inverted, resulting that pure horizontal synchro signal (H.SYNC) is
reproduced.

C.SYNC --1111111111111111111111111111111111111111111111111111111111111111111111111111111111~
Ul Q (Pin#6)

H .SYNC lllllllllllllllllllliiiiiiiiiiiiiJIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIJIJIIIIIIIIJJIIIIIIIIIIIIIII
Fig.1-24
As for the vertical synchro signal, C.SYNC is inverted by Q4 and
sent to the color monitor display. The horizontal synchro component
in C.SYNC is eliminated by C413 which is provided in the monitor
display. See page S-9.
1-25
--FUIRU-0------------------

Extension of Vertical Blanking Period

The one-shot, U2(2/2), is triggered by the positive edge of the
11
reproduced vertical synchro signal ... As the pulselength of the one-
shot is a little longer than this signal, this process results in the
extended vertical synchro period. The one-shot output is sampled by the
D flip-flop, Ul(2/2), and conducts Ql.
Usually, Ql and Q2 are kept in a cut-off condition, and as a result the
base potential of Q3 is pulled to a negative direction due to CR2. Thus
theY level is also negative, e.g., unblanking.
On the contrary, during the extended vertical synchro period, Ql and Q2
become conductive. This increases the internal resistance of Q3,
resulting that theY level rises, i.e., blanking of vertical flyback
trace. -~

1-26
- FUAU-0 - - - - - - - - - - - - - - - - -

1-10. Calor Monitor Display A1QA8DSP11 for CH-14

See the block diagram on page 1-28.
Outline
The RED, GREEN and BLUE signals fed from the color decoder/matrix, U15,
in the DSP board, are amplified in Q801/804/808, Q802/805/809 and Q803/
806/810 respectively, and finally applied to the R, G and B guns of the
CRT.
The H/V composite synchro signal from the H/V address counter is fed
to IC2 where the signal is separated into horizontal and vertical com-
ponents and they trigger the horizontal and vertical oscillators
respectively. Thus obtained sawtooth waves are supplied to the
deflection coils through the driver and output amplifiers.
One part of the horizontal deflection output is fed to the fly-back
transformer T602 to produce various voltages across its secondary
windings:
(1) CRT Electrode Voltages (R, G, B, HV, G2 and G3)
(2) Input of Pedestal Level Restoration Circuit
(3) Horizontal Blanking Signal
(4) Automatic Brilliance Limiter Input Signal
Pedestal Level Restoration
During the horizontal blanking period, charges in the coupling capaci-
tors of the video amplifiers are discharged through the clamping
diodes D801 thru D803 resulting in restored DC level of each R, G and B
signals.
H/V Blanking
The horizontal blanking signal derived from the fly-back transformer
is ORed with the vertical output of QSOl/502 and fed to the brilliance
controller Q402. This leads the video amplifiers Q808 thru Q810 to
cut-off condition.
Automatic Brilliance Limiting
When the anode current of the CRT excessively increases, it is sensed
by Q401 and the output current of the video amplifiers Q808 thru Q810
are decreased through Q402.

1-27
 COLOR MONITOR DISPLAY
A1QA8DSP1

'c
Q8ot

S©+~t I~
Q804 !I
•
RED
~
Cl
Q8Dl

GREEN ~~
Q
~
Q
0.80J

BLU£
E2-+~t 11~1 ~
1~11' '
Q

.......
r----itr-: B.~cK"--~
N
I TRA.N.S l
00 T60l ~
I

"'T1

........
-'·
(,0

I
N
(J1
~
~
'0
Q

lCZ
QSOI. .SOl OfF.
(SEPP) COILS
ICI
HIV
COJ.rPOSITE l I I
SYNCHRO
( C.S'r'NC) DI.Ol
Q6DI Q601 ' I U'l t + 1/0V
HIGH VOL TA6f TF'1 SCR701
liAAITEI(

'
______________ J

,) )
- FURUINIO - - - - - - - - - - - - - - - - -

1-11. Color Monitor Display TM-140F for CH-16

See the block diagram on the next page.
Outline
The RED, GREEN and BLUE signals fed from the color decoder/matrix(Ul5)
on the DSP 3/3 board are amplified in Q351, Q352 and Q353, and finally
applied to the R, G and B guns of the CRT.
The vertical sync signal is applied to IC401 through Q403. The vertical
sync pulse triggers the vertical oscillator and its output drives the
vertical deflection coil via the output amplifiers.
The horizontal sync signal triggers the horizontal oscillator to produce
a horizontal deflection signal which drives the horizontal deflection
coil thru driver Q501 and output amplifier Q502.
One part of the horizontal deflection signal is fed to the fly-back
transformer T502 to produce various voltages across its secondary
windings.
Overvoltage Protector
When an abnormally high voltage is induced across the secondary winding
of flyback transformer T502, Q503 turns on to disable the horizontal
deflection circuit.

1-29
 cow~ \ :
r - - - - - - - ..... ---..-.----,
-------------------------------------------~J~ I
COLOR MONITOR
Q3S2
Dl SPLAY
,c
BRILL. Y
I
I II
(c.tSYNC =)V. 8YN ~ II I
ti . .3YN 'Wmm:""""'' ' "'W' '""""lll"''llillr"'q , I

I
I I
r
---~--~...J
,QS04t • a__
4o---Z3_
C41 J ( e/imi na.tes H. SYtJ components
FLYBACK TRANSF I
,_,,
........
lC I BUFFER BUFFER which are COflto.ined. ;17 V.SYAJ.)
TS02
I
.......
w
I
N
I I 1'P31Bt.31A
Q40I /Q40Z I
0 0"\
I V. OSC.
I
I I
I I
I H. ATC
H. DSC I
I I
I
+IJOV ----------------------; REGULA-~~~~-+----------------------------------------~
TOR
I
II
QSOJ
OVER VOLTAGE
0505 I
~----~ PROTECTOR 1~~l~~l.l~~·--~~--------------~,

~
I
I I
L---------------~------.1

,) ')
1'' 1
- FUAU•o - - - - - - - - - - - - - - - - -

1-12. Audible Sound (TRX Board/DSP Board 2/3)

See the circuit diagram on page S-13.
The 455kHz output of the IF amplifier, U3, is fed to the balanced demo-
dulator, U7, where the signal is mixed with the 456.1kHz output of the
crystal oscillator, U9. The resultant 1.1kHz signal is passed through
the band-pass filter, U8, and is sent to the display unit as the audible
sound signal, AUDIO. The bandwidth of U8 is wide enough to pass the
Doppler-effected signal.
The one-shot, U13, and the gates, U12, connected to the crystal oscilla-
tor form a mute circuit. The keying pulse is ORed with the output of
the one-shot which is triggered at the terminal of the keying pulse.
The resultant mute signal which is a little longer than KP in duration
disables the crystal oscillator, U9.
See the circuit diagram on page S-4.
The AUDIO signal sent from the TRX board is (1) once more passed through
the band-pass filter, U43, (2) power-amplified by U79 and (3) fed to the
speaker.
When the ECHO PROCESSING CPU, U32, outputs logical ONE on the P13 port
of the 8255 peripheral interface, U56, the oscillator, U83, is activated
and the output (beep sound/alarm) is mixed with the echo signal at the
input of the power amplifier.

1-13. Panel Switch/Control Status Read (UPN+DPN Boards/DSP Board 1/3)

See the block diagram Fig.1-27 and the circuit diagramson pages S-3 and S-6.
The IR( Interference Rejector), AGC and MARKER(4f I{)) keys on the front
panel and the DIP switches (S2, S3) on the DSP 1/3 board are read by the
CONTROL CPU, U71, through the 8255 peripheral interface, U76.
As for the other keys, they are tied to the nodes of the ladder network.
When a key is depressed, unique voltage is fed to the AD converter, U70.
By reading the AD converter output, the CPU can know which key is
depressed. (The remote control, CH-143, is also read in the same way.)
To know the positions of the TVG LEVEL/TIME and GAIN controls, the CPU
simply reads the slider potentials through the AD converter.
NOTE Considering the possibility that the marker is moved in a slant
direction, the MARKER keys %/..!!rand ~/et> are connected to different
devices.

1-31
 * P17

~~c ~-
.2
.l~*
P16
~ P15
MARKER~ - P14
P13 V
u
0
P12 -+-
.._
53 ~
P11 c
P10
2V
P07 ..c
P06
P05
e-
.._
V
Cl..
- ""'
lJ)
\.OLJ)
P04 C"-N
:JCX)
52
P03
P02
P01
POO

*Pulled up to +SV
wrth 4.7KQ

I RANGE
~-------- -<>-~~,.........,..,..,...~....,

TVG LEVEL
LS___ -l,-'-1 CH 1

TVGTIME LS--'-1CH2 .).

.0
0

V.._
CV
c+-'
0 .._
..c~
u c
- 0
..... u

-------------------------------------~.-·---!./-1

CH -14 3 Remote Control :

CH4 ?2-:ia
:J~<l:

- ---------------------------------J*
(similar. configuration to CH-3) :

---A-1 CH5
GAIN~

Fig.l-27

1-32
---IPaJ~--11--------------------------------------

Dimmer
The panel-illuminating LEo•s are driven by the 8254 interval timer
U6(#2)(on the DSP 2/3 board, page S-4) which is programmed for
Mode 2 (rate generator) operation. In order to control the bright-
ness the ECHO PROCESSING CPU simply changes the duty ratio of the
output pulse.

1-14. Raising/Lowering Soundome (Hull Unit/DSP Board 1/3)

See the simplified circuit diagram Fig.1-28.
Raise Operation
To raise the soundome, the CONTROL CPU outputs logical ZERO through the
port P27 of the 8255 peripheral interface, U76.
1) When P27 output becomes LOW, U15 is led into a cut-off condition,
resulting that K1 is inactivated.
2) Terminal (!) of the motor is coupled to the positive line through the
relay contact and the upper limit switch K2, and terminal (g) to the
negative line through the relay contact. As a result the motor
revolves in the soundome-raising direction.
3) When the soundome has been completely hoisted up, the upper limit
switch is kicked, resulting that the positive line is isolated from
the terminal ,Q), and instead the brake resistor, Rl, is connected
across the motor.
NOTE: When the display unit is turned off the R/L level fed from the
display becomes LOW, resulting that raise operation is exe-
cuted automatically.
Lower Operation
To lower the soundome, the CPU outputs logical ONE through P27.
1) When P27 output becomes HIGH, U15 is led into a conductive condition,
resulting that K1 is excited.
2) The terminals, (!) and QD, are coupled to the negative and positive
lines respectively, resulting that the motor revolves in the direc-
tion opposite to the Raise Operation.
3) When the lower limit switch K3 is kicked, the brake R2 is connected
across the motor.
LED Drive
Each LED (CR1, CR2) has two drive sources; one is the limit switch and
the other is the astable multivibrator, U6. The LED is lit unconditionally
when the limit switch is ON.
When the upper limit switch is off and the base potential of Q9 is LOW
(Raise Operation), the CR1 blinks because it is driven by the astable
vibrator (U6) output.
Likewise CR2 blinks while the soundome is being lowered.

1-33
--FURU-0------------------

DISPLAY UNIT HULL UNIT

r·-·-·oRVs~·-·-·1
I . 0

CR1

II
II l.
CR2 -.
-·-·-·,_J
I I ·1
LOWERC:f>
'
'

:
tPPER r--
ltiMIT
LIMIT

'
K3f'',, '~
R2 R1

~
~
QJ
..c
0.
·;:
'if
QJ
a_

I Ii
I Ii
Fig.1-28

1-15. Transducer Tilting (Soundome/DRV Board/DSP Board 1/3)

See the simplified circuit diagram Fig.1-29 on page 1-38.
Drive Side
Tilt-up/down mechanism is driven by the 4-phase stepping motor with the
phased pulse generator, U12.
To drive the motor, the CONTROL CPU outputs logical ONE through the port
P27 of the 8255 peripheral interface, U77, resulting that the clock
signal is fed to the phased pulse generator(U12) from the 8254 interval
timer, U74 #0, which is preprogrammed for the rate generator mode
operation.
While the clock signal is applied, the phased signal generator outputs
HIGH level in the sequence shown in Table 1-2, and the the field win-
dings of the motor are actuated in the same order.

1-34
- FURU•o - - - - - - - - - - - - - - - - -

As you will notice, the field windings are actuated in reverse order
when the U/D input of the phased signal generator changes state. In
order to turn the motor in tilt-up and tilt-down directions, the CPU
outputs logical ZERO and ONE through port P26 of U77 respectively.

~ Table.1-2 ~
Clock Cycle ( U/D = H ) Clock Cycle ( U/D = L)
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
4>1 L L L L L H H H H H L L L L L H
+.J
o- 4>2
~ L L L H H H L L L H H H L L L L
i-.J
'::J ~3 L H H H L L L L L L L H H H L L
<::)
q>4 H H L L L L L H L L L L L H H H
Feedback Side
As shown in the simplified circuit diagram, a disc with slits is coupled
to the motor through gears, and the slits are detected by the sensors
(photo interruptors). Since the slits are provided at known tilt posi-
tions, the CPU can know the tilt status by reading the sensor outputs
through the ports, P05 and P06, of the 8255 peripheral interface, U77.
Table.1-3
P05(+5° Limit Sensor) P06(-90° Limit Sensor) Tilt Status
ZERO ONE + 50 Limit
ZERO ZERO -30°
ONE ZERO -90° Limit
Control by CPU
As you may have noticed, the CPU can not monitor the tilt continuously,
i.e., the control system employed here is not a pure 11 Closed-loop 11
system. Initially the CPU drives the motor until a tilt status (-30°)
is detected, and thereafter the CPU merely drives the motor, while pr-e-
suming the tilt angle from the number of pulses which it has given to
the motor.
Due to uneven load of the motor with respect to tilt angle, the
11
Degrees/Pulse Ratio .. changes from 11 1/10 11 to 11 1/5 11 averaging 11 1/9 11 ;
under light load conditions only 5 pulses are required to tilt the
transducer by one degree, but under heavy load conditions 10 pulses are
required. Such datum is prepared in the ROM for every tilt angle, and
the CPU refers to this table whenever it tracks the transducer tilt by
means of presumption:
The tilt can be tracked by accumulating the following value.
~ {(Degrees/Pulse Ratio) X (Frequency of Tilt Clock 11
TI CLK 11 )
x (Duration of Tilt Gate 11 TIG 11 ) }
NOTE 1. Initial value (tilt) in the accumulator is -30°.
2. Sign (+): applied for tilt-up
Sign (-): applied for tilt-down
The CPU carries out transducer tilt operation, being driven by the timer
interrupt, IIM INT, from the 8254 interval timer, U74 #2, which is
preprogrammed for rate generator mode operation.
1-35
- FURU•o - - - - - - - - - - - - - - - - -

Actual tilt control is done in the following method:

(1) Power-on Initialization

Output -(10°) pulses. ----- Warming-up

*The CPU stops pulse supply

Output +(100°)* pulses. as soon as it has detected
+5° Limit.
No
+5° Limit detected?
Yes "TI NG."
eration.
* The CPU stops pulse supply
Output -(100°)* pulses. as soon as it has detected
-30° Position or -90° Limit.

-30° detected? Yes

No

(The tilt angle should be

oo.)
No
-90° Limit detected?
Yes "TI NG."

Output +(100°)* pulses. * The CPU stops pulse supply

as soon as it has detected
-30° Position.
No Yes

(Tilt should
be 0°.)
INOTEI
+ (10°) pulses
I f { +:t1lt-up
No •. of pulses which will tilt transducer by 10°
-:tilt-down

1-36
- FURU-0 - - - - - - - - - - - - - - - - -

(2) After the transducer is placed in 0° tilt condition, the CPU drives
the motor in tilt-up/down directions according to the TILT key sta-
tus on the control panel. Whenever the CPU drives the motor, it
tracks the tilt angle by means of presumption as explained before and
updates the tilt indication on the screen.
Notice that tilt angle errors may pile up through long-term
operation. In order to solve this problem, the CPU stops sonar
cycle (stops KP) and performs the following operation once a minute.
The CPU tilts the transducer up or down until -30° is detected.
Now, the error which had been accumulated is cleared, and the CPU
drives the motor for the original tilt angle which is indicated on
the screen. Then, the sonar cycle resumes.
Automatic Transducer Stabilization
See the circuit diagrams on pages S-3 and S-20.
The clinometer, BS-704, contains two sensors which detect the ship's
fore- aft and port-starboard i ne l i nations respectively. The outputs
of the sensors are acquired by the CONTROL CPU through channels No.6
and No.7 of the AD converter, U70. These data serve to offset the
i ne l i nations when the CPU drives the tilt motor.
The offset value is related to the transducer's bearing angle. As
raised in the following example, the CPU attaches emphasis to the fore-
aft inclination if the transducer is directed in the fore or aft direc-
tion, and does emphasis to the port-starboard inclination if it is
directed in the port or starboard direction.
Example: (Fore-aft Inclination) = 5° (head-up)
(Port-starboard Inclination) = 3° (starboard-up)

'offset value

. (Bearing)= 0°: - 5°x(l00%) - 3°x( 0%)

. (Bearing)= 45°: - 5°X( 50%).- 3°X( 50%)
. (Bearing)= 90°: - 5°X( 0%) - 3°X(100%)
. (Bearing)=135°: + 5°x( SO%) - 3°x( 50%)
• (Bearing)=l80°:
. (Bearing)=225°: + 5°X( 50%) + 3°X( 50%)
. (Bearing)=270°: t 5°X( 0%) + 3°X(100%)
• (Bearing)=315°: - 5° X ( 50 %) -+ 3° X ( 50 %)

1-37
 Two slits are simultaneously detected
when the transducer is in -30° tilt
condition.

w
2
0
0
z
:::J
0
(./) +5"Limit -90" L1mit
Sensor Sensor

J1 "'~ Jt tlt7 #18

r-!L·- !!.4.-:!L-. !L---·:-- ·-·-·;z ~·-·-·-iis-·-

I
•
~
u
c:: T [ 00(+5") c:: T[ Ol(-90")

1-- I~ U12
z Phased Pulse Gen.
:::J
__J
__J
I
:::J
I
I T! DOH T! D 1 H

U78

1-- U/0
z
:::J
P05 P06
>
<(
__J
Cl..
(./) U77
0 8255 Peripheral [ /F

U74 uo
8254
l n terval Timer

Fig.l-29

1-38
 - FURU•o - - - - - - - - - - - - - - - - -

1-16. Transducer Training (Soundome/DRV Board/DSP Board 1/3)

Basically the circuit configuration is the same as the tilt control cir-
cuit. See Fig.1-30.
The main difference exists in the design of the rotary encoder/pick-up.
The rotary encoder outputs the CENTER pulse which signals that the
transducer is staying at the correct o'clock direction. For o'clock
identification, every center pulse is accompanied with a unique 4-bit
datum, 03-00. As there are many (twelve) positions to check, the
control system employed here is more 11 Closed-loop like 11 when compared
with the tilt control system. However, positioning between two neigh-
boring o'clock directions is achieved by means of presumption. For your
information, the transducer is trained with 5° steps, and 40 clock
pulses (TR CLK) are required for 5° training. Also, it should be noted
that the CPU does not train the transducer until echo reception is
- completed. (The transducer is trained with 2.5° step when short ranges
are selected.)
Power-on Initialization
This routine is executed after the TILT INITIALIZATION (P.1-36) is
ended normally.

Output -(60°)* pulses. * The CPU stops pulse supply

as soon as it has detected CP.
No
11
TR NG. 11

Check the value (03-00). 0,13 to

1 to 12 11
TR 11 + Value(03-00)
Output pulses to direct
the transducer in 12
o'clock direction.
CP detected every No
30° on the wa ?
11
TR NG. 11
03-00 detected in No
ood order?
Yes 11
TR 11 + Value(03-00)

+ (60°) pulses
I I No. of pulses which will train transducer by 60°
+:cw-training
{ -:ccw-training

1-39
 CENTER
PULSE
1nd icates
0
JO"sector
center.
0
0
I

0
w
~
03 02 01 DO
0 0 J
BEARING DATA
0 gires30osector
z
::J o identification
0 0 (o'clock).
rJl

J1 *t 20 'l'fZI ~22 ROTARY ENCODER

·-·!.:!.-·-·-

1-
U4.8. 9.10
z
::J
.....J
.....J
::J
I

1-
z
::J
POO 01 02 03
>
<t:
.....J
Q_
rJl 1-f: 0 U77
0 l: 0 8255. Peripheral 1/F

U74 #1
8254
Interval Timer

Fig.l-30

1-40
- FURUIMO - - - - - - - - - - - - - - - - -

1-17. Power Supply Control for Tilt/Train Motors (DRV Board/POW Board)
This paragraph explains only the tilt motor because the train motor is
powered exactly the same.
See the circuit diagram on page S-16.
The one-shot, U7, is triggered by the positive edge of the AIN input.
While the TI CLK (tilt clock) is sent from the display unit, the
one-shot's outputs (Q and Q) are held to HIGH and LOW levels respec-
tively because the time constant of the one-shot is adjusted for the
output pulselength which is longer than the clock interval.
As a result, Q2 and Q1 (shown on page S-15) become conductive and cut-
off conditions respectively, and +20V output of the regulator (U1, Q5 on
POW) is applied to the tilt motor through Q2.
On the contrary, while the TI CLK is absent, the. one-shot's outputs (Q
and Q) are held to LOW and HIGH levels respectively, resulting that Q2
becomes cut-off condition and Q1 conductive condition. Since +20V is
fed to the motor through R39, the voltage fed to the motor is con-
siderably low, e.g., +8V approx.
NOTE: In case of the train motor, +12V approx. is fed to the motor
while the clock signal is not applied (the motor is stationary).
The above-mentioned arrangement prevents unnecessary power from. being fed
to the motor while the motor is stationary, resulting in less power con-
sumption and extended life of the motor.
+15V Supply for Photo Couplers (DRV Board)
+20V produced by the regulator (U1, Q5 on POW) is lowered to +15V by the
3-terminal regulator, U1, on the DRV board and fed to the photo coupiers
in the soundome.

1-41
- FURU-0 - - - - - - - - - - - - - - - - -

1-18. Interrupt
As shown in the circuit diagrams on pages S-3 and S-4, the CPU is pro-
vided with a single 11 Interrupt Request .. (INT) input. When the level on
this input becomes LOW, the following take place in order:
1) The INT input is internally masked in order to prevent multiple
interrupts.
NOTE: The INT input is level-sensitive (not edge-sensitive). If an
auto-masking mechanism was not provided, LOW level on the INT
would cause repeated triggering of interrupt.
2) The CPU suspends execution of the current program automatically.
3) The CPU automatically jumps to the program (interrupt program) which --.
is written from the specific address on the memory. The interrupt
program must be ended with a kind of 11 return 11 instruction.
4) As soon as the 11 return 11 is executed, the mask to the interrupt
request input is removed, and the CPU restarts the suspended program
by itself. Since the mask is now removed, the CPU is ready to accept
the next interrupt.
Polling
As shown in the circuit diagrams, various devices can issue interrupt
request signals, and those signals are ORed and finally fed to the CPU
as a single interrupt request input. Since it is impossible for the CPU
to know directly from this single input which device is requesting an
interrupt, the first thing that must be done in the interrupt program is
11
polling. 11 The CPU must read the status of each flag flip-flop which is
set by a device. (In case of an LSI, arrangement similar to the flag
flip-flop is provided on the chip.)
Depending on the raised flag, which is found through 11 polling, .. the CPU
- '

jumps to the address where the action which is peculiar to the interrupt
flag is written.
NOTE: Generally, the CPU acquires a signal or data in the interrupt
program. And, the reaction to the signal or processing of the
data is left to the normal program (task program).
After the acquisition of the signal or data, the CPU must clear the
flag. It restarts the suspended program (task) upon execution of the
11
return 11 instruction.
NOTE: If the flag was not cleared, it will cause another interrupt upon
execution of the 11 return 11 instruction.

1-42
- FURU•o - - - - - - - - - - - - - - - -

1-19. Display Power Supply

PWR F02P9042 (CH-14) (Waveforms P.7-19)
See the block diagram on the next page.

When the power switch is turned on, supply voltage is fed to the power
transistors Q3 to Q8, driver transistors Q12/13 and switching regula-
tor U3 through the series regulator Q1/2.
Then the switching regulator starts operation and its outputs switch
the power transistors through the driver. Thus obtained AC voltage is
rectified and delivered to various circuits in the equipment.
The voltage taken from the +5V line is fed back to the switching regu-
lator through the differential amplifier U5 1/3 and the photo coupler
U4 2/2 to maintain the output constant.
CR23 thru 28, U5 2/3 and 3/3 and Q14 form an overvoltage/current pro-
tector. Normally the photo-coupler U4 1/2 is conductive and the poten-
tial at CL+ (Current Limit) pin of the switching regulator is main-
tained below threshold level. At the event of overvoltage/current, the
photo-coupler becomes off as explained below and in turn CL+ potential
goes up above threshold level, resulting that the switching regulator
stops operation.
(1) Overvoltage
When the voltage on any one of the following lines goes up abnor-
mally due to open circuit, etc., the output of the comparator U5
2/3 rises up and in turn the SCR Q14 is fired. This leads the
photo coupler U4 l/2 to cut off condition.
Table 1-4
Line Threshold
+5V line 7V
Rectifier CR3 output 20V
+130V line 150V

Also, when the supply voltage exceeds +48V, the CL+ potential taken
from the voltage divider R18/19 and R39 exceeds the threshold of CL+
input, resulting that the switching regulator stops operation.

(2) Overcurrent
While the voltage on any one of the following lines drops due to
overcurrent, the comparator U5 3/3 output goes down and the photo
coupler U4 1/2 cuts off.
Table 1-5
Line Threshold
+5V line 2V
Rectifier CR3 output 6V
+130V line 80V

1-43
 u p WR u CIRCUIT B 0 A R D
I
--J '1 I ®
I --
DC- is()lo..tion - I F02P9042-l
'c
I
Ship's
Ma•ns
r I I I
I -Gl>- .
!I
-t'lV 3-termino.l
• Re 9 u lo-tor :! C/<
~~ T4~t
CRI
fE
EJ
CL+

~~ ~
•
11
~
Clc
~
'"

EAt
SWITCHING
REGULATOR
us
(TL4-'/4)
11
11 c ~ CR.1
. .I .I .: +SV

I +5V I I
rr
1P 5' 6
11 llr --~ 1..- I ..t. ·l~z I I :!: CR22
II ~ +IZV

2 CRZ3
- f2V

,...... CRl

~
I ~ z
.......
I
..j:::o.
........
tO

:;)' "''t CRI4 -..11 CRICJ

+IJOV
..j:::o.
w
I :;) ' TP4 DV ( 8 oJ Ship's Supp\y)
....... - - - - ___________ J

¥
! TP 1 GND (chassis)
I +5'1
~~~~~
Clc ~ ~
.2
NFB B
R66

I
"'
........
N
~
w 1-12.V ..
I . :...--16 "Jit--lr-,
1\.11\.1
Clc I< ~
f\,o
""
Clc
,~,'()

""
Clc 1\.1
Clc
R?O u 0 {J v v
~ • U

IL
~
w
l us ?-'J
~2.
lJI4
)>
I OVERVOL TAGE

• R71
I
-12.V ._ _ _ _ j
-
,) ,)
- FURU•o - - - - - - - - - - - - - - - -

Outline of Switching Regulator IC 11

TL494 11

As seen in Fig.l-33, TL494 is composed of;

(1) +5V Series Regulator

This internal regu1ator supplies power to various sections in the

chip. Also, the regulated +5V is available on Vref pin.
(2) Sawtooth Wave Generator
The inclination of the sawtooth is determined by the external
resistance and capacitance connected toRT and CT pins. The
generator output is reset to OV as soon as the sawtooth reaches
+3V. (When RT pin is open, the generator output keeps QV.)

VeT= 3· O t
(R27+R9)·C11

Fig.l-32

(3) Comparator, Steering Flip-Flop and Open Collector Transistors

The sawtooth wave is a reference voltage in the comparator.
While the sawtooth exceeds the NFB(Negative Feedback) level,
either internal transistor ql or q2 conducts depending on the
state of the steering flip-flop. As the flip-flop changes its
state every output of the comparator, the driver transistors
Ql2 and Ql3 conduct in push-pull mode.

1-45
- FURU•o - - - - - - - - - - - - - - - - -

When the NFB level goes down, conductive period of the transistors
spreads, resulting that the rectifier outputs are increased. See the
diagram be 1ow.

NFB

VeT

€ , __ ____,j

Fig.1-34

REG 02P9026 (CH-16) (Waveforms P.7-20)

This circuit is basically the same as the PWR F02P9042 board of which
operation is explained above.
Main difference is;
Vcc of the switching regulator Ul is fed from the rectifier CR13
instead of the series regulator Ql/Q2 of the PWR board.
Notice that the rectifier output is not available until the switching
regulator becomes operative. To ignite the switching regulator, Vcc --
is supplied by the series regulator Ql/CRl at the moment of power-on.
As soon as Cl is charged up to enough voltage to cut off Ql, the rec-
tifier output takes the place.

1-46
 . '~-COM (8 Of ship;-5' Mo.ins)
Ships _ _ _..,
Mo.ins

--------- --,------
"RE&• CIRCUIT BOARD
02P'ID26
., •c:
I
1
DClisolQtion
ov
16
Clttll SWITCHING
REGULATOR
I
T4
c:8 CRI9
~: J-Terminol _ _ ___:'"r'

~
t 5V
II
U3 +IZV 8

+t2v
I
cRU,
• • 'I _ tJ.c.
U') cRJfl
,l.
-~V

Cf?23
-J2.V
.,
.....
........
I
.
lC
........ cRzz
I t I J()V
+:=o w
-......J CJ1

a
I
I
(cho.ssis)
~l~i
I .OUT
UB
I ~ G~D
I
i:"' _ _ _ _j
R4-'1
R~l
Rs~
r1)
......... B
/l t-12V ~,C'I,~
m n, n,
N OVER CURRENT Jll.
RS? ct ~ ~
~ '-' u u
UJ I~

.J
I

§1§1~1
<:::::} 9
~

L __
OVERVOL TA6E
/0
N R56

:1::> ' -t2.V

- FURU-0 - - - - - - - - - - - - - - - - -

1-20. Transceiver Power Supply (PWR 06P0145 Board)

See the simplified circuit diagram on page 1-50.
The supply voltage (20-40VDC) is first stabilized by the series regula-
tor composed of Q1 and q1, resulting that constant 10V is produced.
This voltage is fed to the hybrid IC, U1, and the PWM switching regula-
tor, U2, which are placed in the primary side of the power transformer,
T1.
When 10V is applied to the Vc pin of U2, it starts oscillating and dri-
ves the four pieces of the power MOS FET•s (Q2-Q5) which are connected
in parallel push-pull and are powered from the supply voltage directly.
The resultant AC power is (1) stepped up by T1, (2) rectified into
various DC voltages and (3) distributed to various circuits in the
transceiver unit.
NOTE: Pins of RC6220 (PWM Switching Regulator)
Vc Power Supply (input)
VREF Reference Voltage (5V) Output
(This voltage is produced by on-chip series regulator and
is available all the time even when the oscillation has
stopped.)
CL Current Limit Input
(When this voltage exceeds the threshold (2.5V approx), the
oscillation stops.)
FB Feedback Input
(This input controls the pulsewidth. The larger the feed-
back amount, the shorter the output pulse.)
Note that some DC voltages of which capacity is rather small are re-
stabilized by the 3-terminal regulators (U3, U4, U6). These voltages
can be utilized as reference voltages for the PWM inverter control
circuits. --,
Negative Feedback
The voltage picked up from the +5V line is applied to the error
amplifier (high-gain, differential amp.), U5(1/4), and the amplified
error component is fed to the FB input of U2 through the photo coupler,
U7(1/2), for PWM (Pulse Width Modulation).
Overvoltage Protection
When the voltage on either +15V, +5V or +130V line rises due to an open
circuit, etc. and the t input of the comparator, U5(3/4), exceeds
11 11

+2.9V; (1) the comparator output becomes HIGH, (2) the photo coupler,
U6(2/2) conducts, (3) the .. _.. inputs of the comparators, u1 and u2, are
pulled to OV, (4) the CL input of U2 rises up and (5) U2 stops
oscillating.

1-48
- FURU-0 - - - - - - - - - - - - - - - - -

Overcurrent Protection
When the voltage on either +15V, +5V or +130V line drops due to a short-
circuit and the 11 - 11 input of the comparator, U5(2/4), becomes lower than
+3.0V, the comparator output becomes HIGH and the oscillation stops in
the same sequence as the overvoltage protection.

Protection against Ship•s Mains Overvoltage

Supply voltage is divided by rl and r2//R2, and the CL potential is
usually kept below the threshold, i.e., 2.5V. When the supply voltage
exceeds 43V approx., the Current Limiter functions, resulting that U2
stops oscillating.
Igniting PWM Regulator
For a while after turning on the power switch, U6(1/2) remains in a cut-
off condition. Therefore, +lOV is fed to 11 +11 input of u2 without
voltage-drop in r5, while 11 - 11 input is lower than this due to voltage
dividing by r3 and r4. Thus, u2 output is HIGH.
Likewise, 11 +11 input of ul would be higher than 11
-
11
input if C7 was not
connected.
If both ul and u2 outpus are HIGH, CL functions and U2 can not oscillate
for ever.
To solve this paradox, the 11 +11 input of ul is forced to OV by C7 until
U2 starts oscillating and the feedback signal pulls down the 11 +11 voltage
of u 2 through the photo coup 1er, U7 ( 1/2).
NOTE: C7 is an external capacitor though it is put inside the chip on
the simplified circuit diagram.
Ceasing Oscillation of PWM Regulator
Even after the power switch has been turned off, voltage remains on the
lOV line for a while though the voltage on the 20-40V line drops
quickly. During this period, unstable oscillation tends to take place
in U2.
In order to solve this problem, VREF is fed to CL through q2 which is
conductive then.

1-49
 REG
:;1 ~
I
SHIP'S
MAINS
20-40V
01
10V
0
""
.....- ~
,......

-
'l:> '0
---4
,.......c::> ~
.(j) ~
2 .... .,
<1i
g.
U6
.:::::> , , ' +5.0Vref
NOTE 'c
CD~

II
r-
U1
RC6219 ~~
(J) I
~
~.
(/)
t
~
! I + 3.0Vref
•-----1·f--- +2.9Vref
~ : 3-Termlnal Regulator

:r ~
10V -u: +2.5Vref

•
~

~
~
~·
Cl)
1...,_______________ +15V
'-.../
'I 5V U3 +12V
U2 ~-------+------~-4r--------------------12V
RC6220 U4
PWM
SWITCHING
REGULATOR r-----~---------------r-------~+---~----------------------~------+5V
C7 r1 ~
LL U
rs w >
i--'
I
W2 I g;
U1
0 470.
~+130V
r2 I +12V
I
I
I
I ERROR
I AMP.
.!"
---------------------------
J +5.0Vref

+2.5Vref

OVERCURRENT
U5(4/4)

Fig.l-36
U5(3/4)
PWR CIRCUIT BOARD OVERVOLTAGE
06P0145
8
+2.9Vret

) )
- FURUINIO - - - - - - - - - - - - - - - - -

1-21. LSI Principle Summary

8251 (uPD71051C) Programmable Communication Interface

The 8251 is originally intended for the interface between the CPU and
the MODEM (MOdulator & DEModulator). As shown in Fig.1-37, it contains
four registers which are accessible from the CPU:
1) TX Buffer
The TX Buffer is essentially a shift register which is parallel-
loaded by the CPU and shifts out the datum serially (bit by bit),
e.g., TXD. TXD is sent to the partner station through the MODULATOR.
TX C is the shift clock, and is frequency-divided internally
according to the preprogrammed division ratio.
2) RX Buffer
This is also a shift register. The serial data originated at the
partner station is shifted into this register after demodulation.
When the shift register becomes full, the datum is parallel-fetched
by the CPU.
RX C is the shift clock, and is frequency-divided internally
according to the preprogrammed division ratio.
3) Status Register
Every bit of this register is used as a status flag which indicates
the status of the TX Buffer, RX Buffer or MODEM. The CPU can
recognize their conditions by reading this register.
4) Control Register

The CPU can program various parameters (division ratio for the shift
clock signals, data format, etc.) for the TX and RX Buffers and can
send a signal to the MODEM through this register.
When viewed from the CPU, the TX Buffer and the Control Register are
write-only-registers, while the RX Buffer and the Status Register are
read-only-registers. They are accessed from the CPU under the following
conditions:

Register CS C/D(=AO) RD WT
TX Buffer 0 0 1 0
RX Buffer 0 0 0 1
Control Register 0 1 1 0
Status Register 0 1 0 1
(C/D 1s usually t1ed to the LSB of the address bus.)

1-51
--FURU-0------------------

Serial communication is usually conducted through the following three

steps.
1) The CPU outputs DTR (Data Terminal Ready) to the Modem through the
Control Register, informing that the CPU wishes to use the Modem.
When the Modem gets ready, it sends back DSR (Data Set Ready) as the
acknowledgement, and the CPU recognizes this by reading the Status
Register. Now, the handshake (linkage) between the CPU and the
11 11

Modem has been established, and the CPU may transmit or receive data
through the 8251.
2) Transmission
When the CPU wishes to transmit data, it sends RTS (Request-to-Send)
to the Modulator through the Control Register. If the Modulator is
ready to transmit, it signals back CTS (Clear-to-Send). Now the
handshake between the CPU and the Modulator has been established.
If the TX Buffer is empty under this condition(active CTS), TX RDY is
automatically sent to the INTerrupt input of the CPU, and the CPU
recognizes this by reading the Status Register in the interrupt
program (polling). Then the CPU writes a new datum on the TX Buffer.
As soon as the datum in the TX Buffer has been shifted out completely,
the above-mentioned process is repeated.
The signal TX E becomes active whenever a datum is being shifted out
from the TX Buffer. So, TX E is usually utilized to switch the
transmission line between the Modulator and the Demodulator in half-
duplex mode. This function is similar to that of the BK relay used
in the radio telephone.
To cease transmission, the CPU disables RTS, and the Modem in turn
disables CTS.
-..
Reception
Unlike the transmission, there is no handshake between the CPU and
the Demodulator; reception is done so long as the 0TR:DSR
11

handshake is established between the CPU and the Modem.

11

Whenever the RX Buffer becomes full after a series of serial inputs

through the Demodulator, RX RDY is sent to the INTerrupt input of the
CPU, and the CPU recognizes this by reading the Status Register in
the interrupt program (polling). Then the CPU reads out the just-
received datum from the RX Buffer, and reads the Status Register in
order to check if the datum was received without error.
3) To cease transmission/reception, the CPU disables DTR through the
Control Register, and the Modem in turn disables DSR.
NOTE: Above-mentioned handshake logic is employed in RS-232C stan-
dard.

1-52
 ,
I
8251 (uPD71051C) Programmable Communication Interface
'c
!I
TERMINAL

CPU
''A"

82 51 PC I (US ART)
....
TERMINAL
"B"

•
07-00 tc·· · ... · -::::t<::::: · -:>07 -DO

CONTROL REGISTER

07-00
AOI )11 )C/D I I I 1\ I~
GJ
~ MODEM
•v <l: MODEM
WR WT z
0::
''A" "B"
-n 0
lL

.
-'•
<.C
~ Wo-
I ~ I-
01 I
INT <l:
0::
w w 15 TX ROY TXE
........, o·-
14 RX RDY lf)
:::J
:::J <l:
w (J)
I- I- RTS 0::
<l: <l:
0:: I-
tf) CTS 2<t
0 __J
:::J 0::
<l: 0 :::J
(J) 0:: 0
0:: 0
w z
! - --- ------
'l "·"--
r;'
,J
- FUIRU-0 - - - - - - - - - - - - - - - - -

Application in CH-14/16
See the circuit diagrams (OSP 1/3 & 2/3) on pages S-3 and S-4.
Two chips of 8251 s are directly coupled each other; the Modem does not
1

exist. Handshake between the two stations is established by DTR and DSR
only:
1) When the CONTROL CPU wishes to communicate with the ECHO PROCESSING
CPU, for example, it outputs DTR through the 8251. This line is tied
to the DSR input of the 8251 which is located at the ECHO PROCESSING
CPU side.
2) As soon as the ECHO PROCESSING CPU rec~izes this signal through the
8251, it returns the acknowledgement, DTR, through the same 8251.
This line is tied to the DSR input of the 8251 which is located at
the CONTROL CPU side.
3) The CONTROL CPU recognizes that the handshake has been established by
detecting this signal through the 8251.
Now that the handshake has been established, the two CPU•s may transmit
or receive data each other.
Note that the RTS output of the 8251 is directly coupled to the own CTS
input. Thus TX RDY is issued to the CPU unconditionally whenever the TX
Buffer becomes empty.
Jz.t-1 '8zf/
DTR t>-----------;~ DSR
"i5SR DTR

RTS
CTS
RX D~--------1 Tx D

Fig.1-38

NOTE: The above-mentioned handshake logic is employed in Furuno•s CIF

(Communication Interface) standard. (Some equipments do not use
DTR and DSR, i.e., no handshake at all.)

1-54
- FURUINIO - - - - - - - - - - - - - - - - -

8254 (uPD71054C) Programmable Interval Timer

As shown in Fig.l-45, the 8254 contains three stages of Counters and one
Control Register. When viewed from the CPU, the Counters are read/write
registers and the Control Register is a write-only-register. They are
accessed from the CPU under the following conditions:

Register CS A1 AO RD WRI
I
Counter #0 0 0 0 0 or 0
Counter #1 0 0 1 0 or 0
Counter #2 0 1 0 0 or 0
Control Register 0 1 1 0
I
(Al and AO are usually tied to the LSB's of the address bus.)
1) Control Register
The CPU may program the operating modes individually for the three
counters by writing a control word (code) on this register.
2) Counters #0, #1, #2
They are essentially down counters, and the CPU may directly write
initial values on them and may read out the counts on the fly.
MODE-0: Interrupt on Terminal Count (Software-triggered Oneshot)
Upon writing a preset value on the counter, OUT goes LOW. As soon as
down-count is completed OUT returns to HIGH.
(While GATE input is LOW, down-count is suspended.)

CLK

Wlt.

OliT

WR.

GATE

OliT

Fig.1-39

1-55
- FUAU•o - - - - - - - - - - - - - - - - -

MODE-l: Hardware-triggered One-shot

First, a preset value should be written on the counter. When triggered
by the positive edge of GATE, OUT goes LOW and it returns to HIGH as
soon as down-count is completed.

CLK

Wlt, - - - , n- 4

GATE (triuerl _ _ _ _ ___.

our

Fig.l-40 -,
MODE-2: Rate Generator (Frequency Divider)
Once a preset value is written on the counter, it repeats down count
sequence from the preset value to ZERO. OUT becomes LOW every terminal
count. The duration of LOW period is one clock cycle.
(Usually GATE is held HIGH.)

cue

Wll, l n=3 n=4

our

Fig.l-41

MODE-3: Square Wave Rate Generator (Frequency Divider)

The counter operates in the same manner as Mode 2, but duty ratio of OUT --
is 1/2. (If odd number is written as a preset value, HIGH period is
longer than LOW period by one clock cycle.)

CLK

0(41 0(4) 2 0(41 0(4) 2 0!41 0(4) 0(41

our !n = 4 J __j,..;-____;;__...::;1 .-----=------=-;1 1.----___,;;.;..._1_ ___,j
0!51 4 2 0(5) 2 0,;.:...!51_~_;:_____;;.;0(5) 0(51 4

Our(n=S)~___j I

Fig.l-42

1-56
- FURU•o - - - - - - - - - - - - - - - - -

MODE-4: Software-triggered Strobe

Upon writing a preset value on the counter, it starts down-counting and
OUT goes LOW for one clock cycle at the terminal count.
CLK

WR.

OUT

Fig.l-43
(Usually GATE is held HIGH.)
MODE-5: Hardware-triggered Strobe
First, a preset value should be written on the counter. When triggered
by the positive edge of GATE, the counter starts down-counting and OUT
goes LOW for one clock cycle at the terminal count. If GATE goes LOW'
and HIGH again while down-count is going on, the counter repeats the
down-count sequence from the initial preset value.

WR,

GATE _________.
OUT
------------------,

WR,

GATE _ _ _____.,1 1l___JI

OUT

Fig.l-44

1-57
 8254 (uPD71054C) Programmable Interval Timer •c
CPU ~

(j)((
U1W
WO
0:0
P-o
I
I
I
8254 PIT II
> ow ~
.... ou -21
<(0 CS,

AIS-AO {
... ,____
A1 ~
,

I
AO 1
,2
RO 2~
RO
WR
WR 2~,

...
07-00 K: >· . ·.·.
,
.... -:· .. ·... · ~. ·.- :-.) K:····.···:··· ... ·.· .. -_.-:·--.-·_:··.-.·.-.···. ·.·.-· .. .. . .
. . . . ...
. .... 1
07-00 .. I\
~.: ~
1\';>
L. :
/\
L ...

,...... ..

........ (.Q
'J ' 'it V :---...,11-- ... --""~~--
( .''7
---v-----~ •'

I
(J1
00
•
........
I
+:::a
WR AO A1

~~~
i COUNTER uo
AOAI I'l . .

(J"l
L- -- -- --- -'T'---'(--- -- -- --.! r---
'
-..., --- r-- ----V- ---- ~
CONTROL
REGISTER
~~MOD!.etf.~/mrrH~"--~a£~~--~-, _ _ __lj '
-- --- --
.. ·. 7
----v----
~~MODE.etc ..~ff~ WR RO AO A1
COUNTER u 2 J
l ____ - - - - - - - - - - - - - - - - - - - -

\
'
a>l[\ ::: I' $? '!]I\ -;J.I\ ~ ~'I' ';E' r- ~

J V
0
'0 N N
0 N
w w LI.J
::s::: 1- 1- ::s::: 1- 1- ::s::: 1- 1-
_J <( ::J _J <( ::J _J <( ::J
u tJ 0 u 0 0 u 0 0

) )
---IP--~--11--------------------------------------

8255 (uPD71055C) Programmable Peripheral Interface

As shown in Fig.l-46, the 8255 contains three stages of parallel I/0 ports
(Port-A, Port-B and Port-C) and one Control Register. When viewed from
the CPU, the three ports are read/write ports and the Control Register
is a write-only-register. They are accessed from the CPU under the
following conditions:

Register ~ Al AO RojwR
I
Port-A 0 0 0 0 or 0
Port-B 0 0 1 0 or 0
Port-C 0 1 0 0 or 0
Control Register 0 1 1 0
I
(Al and AO are usually t1ed to the LSB's of the address bus.)
The CPU may program the operating mode for the three ports individually
by writing a control word (code) on the Control Register. (Upper and
lower half bytes of the Port-C may be programmed individually.)
MODE-0: Basic Input/Output
(Input)
When programmed for the input mode, the port functions as a latch. The
input datum is latched into the port at the falling edge of RD, and is
put on the data bus during LOW period of RD.
(Output)
When programmed for the output mode, the port functions as a latch.
The datum on the data bus is latched into the port at the r1s1ng edge of
WR and the latched datum is continuously available on the output pins.
MODE-l: Strobed Input/Output
The Port-A and/or Port-B may be programmed for this mode (input or out-
put latch).
In this mode, the high bits (PC7-PC3) and the low bits (PC2-PCO) of the
Port-C function as the control/status registers (for handshake,
interrupt, etc.) for the Port-A and Port-B respectively.

1-59
- FURU•o - - - - - - - - - - - - - - - - -

MODE-2: Bi-Directional Buffer

Only the Port-A may be programmed for this mode. Note that the port can
not latch a datum. It functions as a bi-directional buffer through
which the CPU can input or output data.
In this mode, the high bits (PC7-PC3) of the Port-C function as the
control/status register for handshake, interrupt, etc.

(l)
u
"'
4-
~
(l)
+l
t::
........
,.....
"'
~
(l)
..t:
.,...
~
(l)
a_

(l)
,..... Cl..
..t:::J Cl..

"'
E
E
l..{')
l..{')
N

"'
~
CO

0
S-
a_

-
u
Ln
Ln
0
~
,.......
0
a_
:::::s
..........
~-~-1. . 1---~
':(
Ln
Ln '0
,. et
N
CO ~-... ~I~
.. '7 '--------"""""
V
<.D 1\ CO 1'"'-1' 111/1'~11' /\ 0
·.:. ->·';l
I~ ~ ~ I~ I~ "0
t-----l
~:L300J:30 1
I SS::JCJOO'V

(
I

8 Fig.l-46
I
:::J
Cl.. 0"
u

1-60
- FURU•o - - - - - - - - - - - - - - - -

Chapter 2. ADJUSTMENT OF PRESET CONTROLS

As this equipment is properly tuned at the factory, no adjustment is

required in the field except for those specified in the installation
manual. The pc boards for maintenance are also delivered after adjustment.
Therefore, the adjustments mentioned in this chapter should be conducted
only when extreme detuning is found.
Adjustments of some preset controls in the color monitor display are very
critical or require special instruments. Do not attempt to change the set-
tings of the preset controls which are not referred to in this chapter.

2-1. CH-14 Display Power Supply (PWR F02P9042)

Item Instrument TP Rating Adjuster
Inverter Frequency U3 #5 57.4 KHz R9
Frequency Counter
Output Digital J4 #2 +5.0 -+ 0.1 V R63
Voltages Multimeter
After the +5 V adjustment, check the other
line voltages, too:
J4 #1 +12.0 + 0.4 V
J4 #6 -12.0 + 0.4 V
....______
J7 #1 +125 -+-5 V
Note 1: When measuring the frequency, use TP4 as the common line.
2: When measuring the voltages, use TP1 as the common line.

2-2. CH-16 Display Power Supply (REG 02P9026)

Item Instrument TP Rating Adjuster
Inverter Frequency U1 #5 27.3 KHz R6
Frequency Counter
Output Digital J1 #8 +5.0 -+ 0.1 V R47
Voltages Multi meter
After the +5 V adjustment, check the other
line Voltages, too:
J1 #9 -5.0 + 0.1 V
J1 #1 +12.0-+ 0.4 V
J1 #2 +12 •o + o • 4 v·
J1 #6 -12.0 + 0.4 V
J2 #2 +115 to +13o v
Note 1: When measuring the frequency, use TP ~~-cow• as the common line.
2: When measuring the voltages, use TP .. OUT GND 11 as the common line.

2-1
- - FURU•o - - - - - - - - - - - - - - - - - - -

2-3. CH-14 Screen and Brilliance (Calor Monitor & DSP 3/3 06P0131)

Item Rating Adjuster

H. Position r-=-=~;;;;;;;;=::+-1 w1 R47
' W1 = W2 (located on DSP 3/3)

(Upper and lower

blanks should be
equal in width.)
"-::;;;:;:=::::;;;;;;;:;;~ W2

V. Size W3 = W4 = 1 to 2 mm R511
V. Linearity R520
V. Position (Right and left R524
blanks should be 1
to 2 mm in width.)

- ~ -=·w=3=;;:;;:;;;;o!w"
Screen Characters shall be scarcely pre- SCREEN Pot.
sented on the screen with the
BRILLIANCE control (on the front
panel) turned fully ccw.
Flyback traces shall not appear
even when the BRILLIANCE control is
turned fully cw.

2-2
--FURU-0-------------------
2-4. CH-16 Screen and Brilliance (Calor Monitor & DSP 3/3 06P0131)

Item Rating Adjuster

V. Sync (1) In order to observe the vertical flyback traces, turn
Timing the SCREEN pot. on the monitor fully cw, turn the
BRILLIANCE control on the control panel fully cw and
turn R4 on the MIF board fully ccw.

-Flyback Trace

(2) Slowly turn R4 cw until the flyback trace disappears.

1
(3) Readjust the SCREEN pot. as instructed below.
Screen Characters shall be scarcely pre- SCREEN pot.
sented on the screen with the
BRILLIANCE control (on the front
panel) turned fully ccw.
Flyback traces shall not appear even
when the BRILLIANCE control is
turned fully cw.
V. Amplitude The right and left R409
V. Linearity halves of the R420
circle shall be as
symmetrical as
possible, and Wl and
W2 shall be as short
as possible.

H. Amplitude Diameters, W3 and L503

W4, shall be equal;
i.e., the circle
should not be
distorted.

H. Position R47
W5 = W6 (located on DSP 3/3)
(Upper and lower
blanks shall be
equal in width.)

2-3
- FUAU•o - - - - - - - - - - - - - - - - -
2-5. White Balance (OSP 3/3 06P0131 & Calor Monitor)
Item Instrument TP Rating Adjuster
Preparation
(1) In order to present only the white color on the screen,
turn on the power switch while pressing the MODE key
(ROM/RAM check).
(2) Measure the peak level of the GREEN component of the
character (WHITE) on TP3, using an oscilloscope
(0.5 V/div 50 us/div).
RED Level Oscilloscope TP2 Same level as GREEN R4 (DSP 3/3)
BLUE Level Oscilloscope TP4 Same level as GREEN R3 (DSP 3/3)
RED Low Preparation
Light
(1) In order to present the color bar, operate the unit in
(CH-16 the normal operating mode.
only)
(2) Turn the BRILLIANCE control on the front panel fully ccw
for low light on the screen.
The YELLOW part of the color bar should not R356
be reddish or greenish. It should be pure (1 ocated on
yellow. the color
monitor TM-140F)

2-6. AD Converter, Audio and TVG (OSP 1/3 & 2/3 06P0131)
Item Instrument TP Rating Adjuster
ADC Digital TP13 +4.0 + 0.1 V with the R55
Reference
Voltage
Multimeter NOISE-LIM control on
the front panel
-
turned fully ccw.
·-
Alarm Signa 1 Preparation
Level
( 1) In order to observe the alarm signal, press the TARGET
LOCK key.
(2) In order to prevent the alarm signal from being mixed
with the echo signal, turn the TVG LEVEL/TIME controls on
the front panel fully cw and the GAIN control fully ccw.
Keep pressing the I~ I key unt i 1 the inner zone marker
ring shrinks into a dot and the main bang trace at the
screen center activates the alarm.
Oscilloscope l TP17 2.0 ~ 0.2 Vpp R100
TVG Signal Preparation
Level
Turn the TVG LEVEL and GAIN controls on the front panel fully
cw.
Oscilloscope TP8 +4.5 V peak R17

2-4
- FURUINIO - - - - - - - - - - - - - - - - -

Interference Rejection (Ext. KP Mute)

When the picture is seriously interfered from other sounding equipment
on the same boat, take the following measures.
(1) Feed KP of the sounding equipment in question to J8 #3. KP may
be either a positive or negative going pulse, but the peak level
must be +3 to +15 V.
(2) Depending on the polarity of KP, change setting of the DIP switch
S1 #3:
KP ov ~ S1 #3 = OFF
KP S1 #3 = ON
OV~
(3) Slowly turn R10 clockwise until the interference disappears.
Note 1. See the circuit diagram DSP 2/3 on page S-4.
The peak-hold operation is disabled during EXT KP period and
for a while (pulse-width of one-shot U16) after KP. As the
echo signal is also eliminated during this period, do not
expand the one-shot output excessively.
2. The DIP switch S1 #4 is not utilized.

2-5
- FUIRUittiO - - - - - - - - - - - - - - -

2-7. Transceiver Power Supply (PWR 06P0145)

Item Instrument TP Rating Adjuster
--
Inverter Oscilloscope TP6 or Period T=29 -+ 1uS R5
Frequency TP7
Output Digital TP8 +5.0 -+ 0.05V R23
Voltages Multimeter
After the +5 V adjustment, check the other
line voltages, too.
TP10 +12.0 + 0.5 V
TP9 +15.0 + 0.5 V
TP11 -12.0 + 0.5 V
TP12 +130 -+-5 V

Note 1. When measuring the frequency, use TP1 as the common line.
2. When measuring the voltages, use TP13 as the common line.

2-8. Receiver (TRX 06P0144)

Item Instrument I TP Rating Adjuster

Max. Gain Preparation
(1) Turn off the AGC switch and select RANGE 12. 11 11

(2) Turn the GAIN control on the front panel fully cw and the
TVG LEVEL/TIME controls fully ccw for the maximum gain.
Oscilloscope
I TP14
...
+1.7 V peak R30
See waveform Fig. 2-1.

VErC
- - - - rl-7V
!( I ;
Trigger : TP?.fl
~ I i i
X-scale : m s/div.
10
ov I Y -scale : o.~ v/div.
i
- - !
I

Fig. 2-1
Min. Gain Pre~aration

Select range 1 and turn the AGC switch on.

11 11

Turn the GAIN control fully ccw and the TVG LEVEL/TIME
controls fully cw for the minimum gain.

Multimeter TP14 +0.5 V R27

2-6
- FURU•o - - - - - - - - - - - - - - - - -

Preparation
(1) In order to disable transmission, remove the lead from TB1 #3 (KP).
(2) Connecting S.G. (Signal Generator)
A. Remove the transmission line from TB2, and connect a S.G. with an
Attenuator and a VTVM instead.

S.G >---- ATT ~

B/.._T_B_2--~~-~-rd--
B. Adjust the S.G. output for 80 dBuV reading on the VTVM with the ATT
set for 0 dB attenuation.
C. Set the ATT for 60 dB attenuation.
D. Reconnect the transmission line to TB2 and remove the VTVM. (Now,
the S.G./ATT and the transmission line are tied to TB2.)
(3) In order to disable the AGC function, remove the line from TBl #6
( AGC).
(4) Set the preset gain control R2 at 50% position.
(5) Turn the GAIN control on the front panel fully cw and the TVG LEVEL/
TIME controls fully ccw for the maximum gain.
Item S.G. Freq. (kHz) Instrument TP Rating Adjuster
Tuning 61.00 (for 60 kHz set) VTVM TP1 Peak L1, L2
90.00 (for 88 kHz set) Re ado ut (Repeat tuning
152.00 (for 150 kHz set) adjustment
several times.)
60.00 (for 60 kHz set) VTVM TP1 Peak L3, L4, T4
88.00 (for 88 kHz set) Re ado ut (Repeat tuning
150.00 (for 150 kHz set) adjustment
several times.)
Gain - ditto - Digital TP2 +5.0 V R2
Preset Multimeter

Note: The receiver amplifier adjustment should. be conducted in low-

noise environment.

2-7
- FURUitiiD - - - - - - - - - - - - - - - - -

Adding Main Bang to Audible Sound

See the circuit diagram TRX on page S-13.
The local oscillator U9 is disabled during KP period and for a while
(pulse-width of the one-shot U13) after KP.
If you wish to use the transmission sound as the reference to judge a
target's distance, move the jumper plug on J3 to 11 0FF 11 position. Then
the one-shot is locked in CLEAR condition and as a result the fading
trail of the transmission pulse is reproduced from the speaker.

2-9. Transmitter (TRX 06P0144)

Item Instrument TP Rating Adjuster
Tuning Oscilloscope Between Max. Amplitude T1
TP8 and
TP9
Output Oscilloscope -ditto- 700 + 60 Vpp R76
(for-60 kHz set)
900 + 80 Vpp
(for-88 kHz set)
1000 + 100 Vpp
(for Iso kHz set)

Note: This adjustment should be done under the full power condition
( uc 11) •

2-8
- FURU•o - - - - - - - - - - - - - - - - -
Chapter 3. SPECIFICATION ALTERATION

3-1. Changing Operating Specifications

According to user requirements, and in order to render use even easier,
the operating specifications can be changed to those shown in the
following chart by operating the switches on the DSP board in display
unit. The user should change them to fit his own particular require-
ments.
I
I ~ S2
"'
S1 S3
~
52
51
m
-~ .J
L Fig. 3-1
Note: In the chart below, the values in the .thick-lined boxes show stan-
dard settings (factory settings).
I nterna 1 switch Sl
Item Switch Operational Specifications
Number On Side Off Side
Received Signal 1 ON OFF
Test Pattern 2 ON OFF
External KP 3 l___j JL
4 Unused
Note: To produce test pattern, turn number 2 OFF and turn number 3 ON.

Internal Switch 52
Item Switch Operational Specifications
Number On Side Off Side
Unit 1 OFF ON OFF
Meter OFF Feet ON Fatho- ON ON Hiro
2 OFF
Frequency 3 OFFUn- ON 60KH2 OFF 88KHz ON 150
* 4
5
OFF
OFF
used
Stan- ON
OFF ON ON KHz
OFF High . ON Un-
AGC Level ,.
0 OFFdard OFF Low ON ON used
ON OFF
Stabilizer 7 ~------------------~---
Note: Should be set to ON when the clinometer
(optional) is mounted.
Long Short
Pulselength 8 ~---------- -----------
Note: When set to Long, the pulse length
11 11

of each range will double and the

pulse re~etition will be halved.
* Setting of 52 #3 and #4 changes the pattern of the TVG signal only.

3-1
- FURU•o - - - - - - - - - - - - - - - - -

Internal Switch S3

Item Switch Operational Specifications

Number On Side Off Side
Yellow Red
-----------~----------~
Target Lock 1 Note: Set the level of the signal at which
Level target lock is activated. On the OFF
side it will be activated for the
siqnals above the red 1eve 1 •
Edge Area
Target Lock Mode 2 ~----------- ----------~
Note: For details of target lock operation,
see the operator's manual.
Sign a1 3 ~----------
No J ----------~
Yes
Processing Note: Smoothes signal in azimuth direction.
Red Reddish-Brown
Strongest Calor 4 ~----------
Note: Sets the display ----------~
calor of the
strongest signal.

3-2. Changing Stroke of Transducer Travel

The stroke of transducer travel can be changed from 400mm to 250mm or
vice versa by moving the upper limit switch.
(The limit switch fixing rail has been tapped at the factory for both
positions).

Shaft Retainer
Stopper

Upper Limit Switch

Fig. 3-2

Note: If the transducer travel is changed from 400mm to 250mm, the

transducer may not be retracted into the tank completely; approx.
150mm is left exposed. In this case, lower the position of the
shaft retainer by 150mm.
3-2
- FUAU•o - - - - - - - - - - - - - - - - -

3-3. Clinometer Adjustment

The clinometer should be installed on the horizontal plane at the
ship•s rolling and pitching axes. When it is not installed horizon-
tally, the following adjustment should be made in the display unit to
compensate for the inclination error; error of up to approximately 10°
can be compensated. It is necessary to make the adjustment with the
ship stationary in the harbor.
1. While pressing the MODE switch, turn on the power, and the ROM/RAM/
PANEL SELF TEST 11 picture is displayed as in Fig.4-3.

Fig. 3-3

2 Note ROLL and PITCH values on the lower left of the screen. Polarity
of the values represents ship•s inclination as below.

+ - pool
ROLL
PITCH
Starboard UP Port up
Stern up Bow up \ q)I )
~qjl~
- +
Fig. 3-4 0

3. Measure the ship•s actual inclination with other

clinometer which will be equipped in the bridge
of the ship.

Fig. 3-5
4. Adjust potentiometer R80 for pitching angle and R81 for rolling angle
so that the values on the screen agree with the ones measured at
step #3.
~"\
I
I

R80 R81
~
!ala
.__ Fig. 3-6

3-3
- FUAU•o - - - - - - - - - - - - - - - -

3-4. Connecting the Monitor Display (NTSC only)

~o connect ~he mo~itor TV, the VDO board (optional) is required. Mount
1t to the r1ght s1de of the display unit as shown in the figure below.

-.

VDO Board Mounting Angle Fig. 3-7

3-5. Frequency Alteration

For frequency alteration, the following parts must be replaced. Note
that the display unit does not need to be modified, but do not forget
to change setting of the DIP switch (see page 3-1).

Item 60kHz 88kHz 150kHz

Transceiver Unit
TRX Board 06P0144-60 06P0144-88 06P0144-150
(006-534-080) (006-530-460) (006-530-470)

5oundome Assembly
Matching Trans Tl 0650521 0650522 0650523
(000-108-869) (000-108-870) (000-108-871)
Transducer CH-1422-60 CH-1422-88 CH-1422-150
Black Red Blue
(006-533-250) (006-533-570) (006-533-580)

3-4
- FUAU•o - - - - - - - - - - - - - - -

Chapter 4. MAINTENANCE

4-1. Lubricating the Hull Unit (annual)

After turning off the POWER switch and mains supply, remove the hull
unit cover and apply grease "Molytone #320" (FURUNO Code: 000-824-
001) to the main and screw shafts. Remove old deteriorated grease
beforehand if necessary.

~ X6
/
/
r ·-·-·-

Apply grease.
0

Fig. 4-1

4-1
- FURU-0 - - - - - - - - - - - - - - - - -

4-2. Cleaning Retraction Tank

(annual or when dry-docked)

If the marine growth (barnacle, oyster, etc.,) breeds inside the

retraction tank, the raise/lower operation will be obstructed.
In the worst case, the raise/lower motor may be burnt.
Especially when the sonar has been left unused for extended time
of period, do not forget to scrape off the marine growth before
operation.

Scrape off the marine

growth and coat the
inside of the tank
with antifoulding
piint.

'
~ }--
Be careful not to "',____..,'
hurt the soundome.

Fig. 4-2

·4-2
- FURUIMO - - - - - - - - - - - - - - - - -

4-3. Replacement of Grease Cotton Pieces

(Every two years or when water leaks along with the main shaft.)
For the boat whose waterline is higher than the flange level,
though the water penetration into the boat is restrained by the
a-ring fitted at the bottom of the shaft sleeve, it is recommended
to replace the grease cotton pieces with the boat hauled up.

Main Shaft

Do not secure so much.

(Just before water leaks)
MS x ~~
MS SW
Grease Cotton Retainer

Grease Cotten

Shaft

0 9.5x150(mm) 3 pes.
0-ring

Fig. 4-3 Cut diagonally the grease

cotton into 3 pieces and
place them to the main
shaft with each junction
separated 120°.

4-3
- FURUINIO - - - - - - - - - - - - - - - - -
Chapter 5. TROUBLESHOOTING

5-l. Diagnostic Self-check

The unit is equipped with the following check functions:

No. Item Operation Method

1 Display Unit Check ( 1) While pressing 11 MODE 11 switch, turn on
power.
2 Hull Unit Check While pressing SECTOR 11 1••1 11 switch,
turn on power.
3 Display Unit Check (2) While pressing SECTOR 11 8 11
switch,
turn on power.

1. Display Unit Check (1)

The CPU checks memory ICs, peripheral ICs, operation panel and inter-
nal setting switches, and displays the results as follows:
*CONTROL CPU•s ROM(U72)/RAM(U73) check.
ROM/RAM/PANE SELF TEST In case of an abnormality, 11 NG 11 (No Good)
r--------, .-------,
1 -- MAIN CPU -- 1 1 -- PANEL -- 1 will be displayed instead of 11 0K 11 •
I 0650019000 : I I
: ROM OK I : 0 0 I * Display unit panel switch check.
J
l ~f!. __ Q!( ___ I 0 0 0 If the value changes when each
I : : OSPCPiJ-:..:- -1 I 0 0 0 switch is operated, the switches
: 06500200XX are normal . As for the I GAIN I and
I ROM OK 0
l~f!. __ Q!( ___ j
I
I 0 0 I TVG I contra l s, the number shou 1d be
r ::ViDEO 1fo-:..:- '"'! I 0
255 when turned fully clockwise and
• SNR RAM OK I 0 0 0 when turned fully counterclock-
: ESM RAM OK ~ : wise.
l~f!..~fl!..Q!( ___ j I 2
• :: cuNilietEif ::1 ~ 255 * Remote control box switch check.
1
I
ROll o• 1
I
I (1) (1) The switches are normal if the value
PITCH - 2° 255 changes when each touch switch is
r.:: =na,~ co.L =:.:= l :
I

I Q ~~--------~
I 1
<2s5> pressed.
L----------.1 L----.--.J
r----::o~SMftH::----, * Internal preset switch settings.
l ~ ;l)Cll)I!!JQ!II!. - - - - _j~ Cll)C!!J- - j ! The switches are normal if the value
changes when each switch is operated.
CLINOMETER check. The clinometer is normal if the value changes
following ship•s rolling and pitching.
* FRAME BUFFER MEMORY check. In case of an ab norma 1 i ty, 11 NG 11 wi 11 be
displayed instead of 11 0K 11 • (SNR: U37, ESM: U59, CHR: U11)
* ECHO PROCESSING CPU•s ROM(U31)/RAM(U30) check. In case of an abnormality,
11
NG 11 will be displayed instead of 11 0K 11 •

Fig. 5-1

5-1
- FURUINID - - - - - - - - - - - - - - - - -

2. Hull Unit Check

The hull unit is actually trained and tilted to display the response
to the operational command from the display unit in numerical values.
The order of checking is as follows: CW training--CCW training--
downward tilt--upward tilt--CW training. During checks, 11 * 11 mark
will be displayed at the item being checked.

f __ TRAIN-- COU~'!" 2 * Train and tilt check counter.

I
I
NG NG Advances one point each time one
I 0 0 cycle of train and tilt check is
I 1 239 0 1 239 0 made.
I
I 2 243 0 2 243 0 I
I 3 245 0 3 245 0 * Number of pulses necessary to pro-
I duce 30° rotation. Normal if
I 4 241 0 4 240 0
I 5 241 0 5 240 0 approx. 240.
I 6 242 0 6 242 0
I
242 241 0 * Number of pulses necessary to tilt
I 7 0 7
from +5° to -30° and from -30° to
I 8 241 0 8 241 0
I 9 242 0 9 243 0
-95°. Normal if as shown below.
I 10 240 0 10 239 0
I +5° to -30° ---- Approx. 337
111 244 0 11 244 0 -30° to -95°---- Approx. 532
I
:..1~ _!4~ __o___ 1~ _ ~4! _ _t
r:.:- TI[r-=----- -------- -...,. I
I NG. I
I
NG
I
I+ 5 + 5 I
1 -30 337 0 -30 338 0 I

~ ~- ~3~ - _!)- - _9~ - ~!. - !!. _j Fig. 5-2

3. Display Unit Check (2)

This mode is used to check the display unit by using internally
generated reference signals. The check can be performed without hull
and transceiver units (though it is all right even if they are connec-
ted) and the check result shows, if normal, the signal processor and
coordinator in the display unit are correctly functioning.

I ~ ~

Sl
G
51
ra~
..._ ~
Picture shows concentric circles in
- Set Sl-#2 which signal strength increases from
to ON. the center position outwards.
The picture will differ depending on
the setting of the TVG, GAIN and
Fig. 5-3 NOISE LIM. controls.

5-2
---~--~--~~--------------------------------------

5-2. Troubleshooting Flow Chart

To locate the faulty circuit, perform the following steps, [1] thru
[ 7J, in order.
The flow charts in this section show the general method to locate the
faulty block. In order to track down a faulty component in the block,
the knowledge learned in Chapter 1 (CIRCUIT DESCRIPTIONS) should be
fully utilized.
NOTE
1. This section covers the troubleshooting inside the units.
Troubleshooting one outside the units, such as the damage of
interconnection cables is not covered here. Also, the problems
due to improper installation or operation, for instance wrong ~
wiring or fail in turning on the transceiver power switch, are not
covered.
2. As a rule, the LED's are not utilized for function check in this
troubleshooting. Instead, waveform is measured because it is more
reliable. When a waveform is measured, it should be referred to
the one shown in Chapter 7 (WAVEFORM CHART) for judgement.
3. Detune of trimming potentiometers or coils may deteriorate
performance of the equipment. It may be worthwhile to readjust
them, referring to Chapter 2, when a certain block is diagnosed as
faulty.
4. When so instructed in the flow charts to change wiring or to
replace a component, do it with the power supply to the unit
turned off.

5-3
- FURU-0 - - - - - - - - - - - - - - - - -
[1] Turn on the display unit and check the DC line voltages.
Display Power Supply Troubleshooting

CH-14 (PWR Board)

Measure the supply voltage

on J4 #7. CGND = TP4)
No

Yes Check ship•s supply.

Measure the DC line voltages:

J4 #6 .....• -12V
J4 #2, #3 •• +5V
J4 #1 •••... +12V
J7 #1 •..... +130V

Yes

No
Turn off and on the POWER switch
while watching the LED•s:
CR19 +130V
CR20 -12V
CR21 +5V
CR22 +12V

The LED•s light up even

for a moment?
All LED•s lit Some lit for a No LED lit even
for a moment moment but other(s) for a moment.
not lit at all.
Open circuit of +5V Short circuit of the Check fuse F1.
or +130V line or line(s) of which LED(s)
PWR is faulty. are not lit at all.

Trouble is
cleared by
replacement
of F1?
Yes
5-4 PWR is faulty.
---IPal~--11--------------------------------------

CH-16 (REG Board)

Measure the supply voltage

between J3 #1 (+) and #4 (-).
No

Yes (Check ship's supply.)

Measure the DC line voltages:

J1 #6 ...... -12V
J1 #9 ...... -5V
J1 #8 ...... +5V
J1 #1, #2 ... +12V --~
J2 #2 ...... +130V
(GND = OUT GND)
Yes

No
Turn off and on the POWER switch
while watching the LED's:
CR22 ...•..... +130V
CR23 ........ . -12V
CR24 ••••••••• -5V
CR25 ........ . +5V
CR26, 27, 28 .. +12V

The LED's light up even

-
for a moment?
All LED's lit Some lit for a No LED lit even
for a moment. moment but other(s) for a momnt.
not lit at all.
Open ciruit of +5V Short circuit of the Check fuse F1.
or +130V line or line(s) of which LED(s)
REG is faulty. are not lit at all.

Trouble is
cleared by
replacement
of F1?
Yes
REG is faulty.
5-5
- FUIRUINIO - - - - - - - - - - - - - - - - -

Note: The best way to check the performance of the power supply
board is to connect dummy loads:
CH-14 Display (PWR)
Unplug J4 and J7, and connect:
Power Switch ....... J4 #7- #8
1012 /3W . • • . . • • • . • . • • J4 #2 - #4 (+5V)
1.5k!l /15W ......•..• J7 #1 - #3 (+130V)
CH-16 Display (REG)
Unplug J1 and J2, and connect:
1012/3W .•••••.•.... J1 #7 - #8 (+5V)
1.5kQ/15W •..•..... J2 #1- #2 (+l30V)
If the trouble occurs with both the actual and dummy
loads, the power supply board may be faulty.
Troubleshooting inside the power supply board should be
carried out with the dummy loads in order to prevent the
DSP board from damage due to unintended high output
voltage. ·
Note that an accidental high voltage on the +5 V line can
damage all the digital IC•s instantly.

[2] If the error message, TI NG,

11 11 11
TR NG 11
or 11
TR CODE, 11
is pre-
sented, proceed to step [4].

[3] Conduct DISPLAY UNIT CHECK (Self-check) mentioned on page 5-1.

Display Troubleshooting

Conduct DISPLAY UNIT CHECK (1).

No Check results (OK or NG) aside,
alphanumerics presented normally
in white calor?
Yes
No
Self-check results all OK?).--------.
Yes
The part diagnosed as 11
No
good .. is faulty.

5-6
- - FURU-0 - - - - - - - - - - - - - - - - - - -

Conduct DISPLAY UNIT CHECK (2).

Yes

No
In the following stage, the R/
G/B outputs of the frame buffer
memory are utilized as a kind of
Standard input signals for the
11 11

color matrix circuit and the

color monitor display.
PPI/historical picture Both PPI and Either PPI or
layout is wrong. historical picture historical picture
colors are wrong. is wrong.
H. TIMING Gen. Read circuit for the relevant
Circuit is faulty. frame buffer memory is faulty.
(Ref. P.1-16/7-12) (Ref. P.1-16/7-12)

In order to check the Standard

11 11

input signal itself, check the

waveform on TP8. (Ref.P. 7-5)

Yes ( Standard 11 signal

11

is abnormal.)

Operate CH-14(16) in NORMAL mode.

Col or bar presented normally? No

r---------.

Yes
Color Matrix Circuit
is faulty. (Ref. P.1-23)
Echo Acquisition is faulty
(Ref. P.1-8/7-7/7-10)
If the color bar is OK, the echo acquisition circuit may be
faulty because the color bar is painted by the CPU directly on
the frame buffer memory without using the echo acquisition circuit.

5-7
- FUIRU-0 - - - - - - - - - - - - - - - - -

Check R, G, B and CSYNC outputs

of DSP on TP2, 3, 4 and 5 in
order to judge which part is
faulty, DSP or Calor Monitor.
(Ref. P. 7-17)
Yes

No
Calor Monitor is faulty.
(See *Note.)
C SYNC is wrong. R, G or B is wrong.

Synchro Sig. Generator Conduct DISPLAY UNIT CHECK 2.

Circuit is faulty.
( (Ref. P.1-16/1-23/7-12/7-16)

Display Buffer Memory

U11 is faulty.

Calor Matrix
is faulty.
(Ref. P.1-23)

*Note 1. In case of CH-16, check the MIF board in addition to

Calor Monitor.
2. If scan lines do not appear on the CRT, suspect
deviated setting of the SCREEN potentiometer, too.

5-8
- FUAU•o - - - - - - - - - - - - - - - - -

[4] Conduct HULL UNIT CHECK (self-check) on page 5-2.

Yes
Check results all OK?>-----
No

Hull Unit Power Supply Troubleshooting

Measure the supply voltage between

Jl #1(+) and #2(-) on the POW
06P0147 board.
Yes

No

ship•s supply.

Trouble is cleared
with new fuse?
Yes

Short circuit in Kl or DRV

Measure the +20V regulator output

between J2 #7(+) and #8(-).
No

Yes
Q5/Ul on 06P0147 is
faulty.

5-9
- FURU-0 - - - - - - - - - - - - - - -

Operate the sonar in HULL UNIT CHECK

mode where the display unit continuously
drives the tilt/train circuits.
Train is
problem.
r-----.t Which is faulty, tilt or train?
Tilt is problem.
Tilt Troubleshooting

Check the tilt motor drive pulse +8ms

outputs on DRV. +4.5V~ I'
~1: Q4 (C) ]
~2: Q3 (C) Common is (-) of ovl 1_j
~3: Q2 (C) ship•s supply.
~4: Q1 (c) Fig. 5-4

~--------------~--------------~ Yes
Are check results as shown in Fig. 5-4?>---------------.
No (Driver Circuit is problem.)
Check TI CLK and TI U/D inputs TI CLK
I 2ms I
on DRV. +4-,SV jL_J Fig. 5-5
OV

TI CLK: U14 #8 (si g) J5 #8 (corn)

TI U/D: U14 #6 (si g) J5 #8 (corn) TI U/D UP: 0 V
DN: +4.5 V

Are check results as shown in Fig. 5-5?

Yes The signal line in question
is faulty on DSP.
The signal line in question
is faulty on DRV.

Drive circuit is OK.

(Tilt Motor or Feedback Circuit is faulty.)

In order to check the Feedback Circuit,

remove the soundome plug from J2.

5-10
- FURU•o - - - - - - - - - - - - - - - - -

Change the logic levels at the following

feedback inputs by connecting/removing a
jumper lead to/from the HIGH voltage (+15V
on F1) alternately.
TI D1 (-90°): U3 #13
TI DO (+5°): U3 #1

The LED s at the output ends

1
No
turn on and off alternately?
TI D1: CR9 TI DO: CR8
Yes The sign a l 1 i ne in
question is faulty on DRV.
Do the same things while measuring
the logic levels on DSP.
TI D1: U78 #10
TI DO: U78 #12
No
The logic levels thange
0 and +5 V alternately?
-·--------~--------~
Yes The signal line in
question is faulty on DSP.
(Tilt Motor is faulty~
(U77 on DSP cannot be checked by the above method. But, the
possibility of faulty U77 is negligible when compared with
the motor troub 1e.) -.

Train Troubleshooting

Check the train motor drive

pulse outputs on DRV. +8ms

$1: Q8 (C)] +45V ""~ . I

~2: Q7 (C) Common is (-) of
~3: Q6 (C) ship s supply.
1 o) ~"Lrl_j
~4: Q5 (C)
Fig. 5-6

5-11
- FURU•o - - - - - - - - - - - - - - - - -

Yes
Are check results as shown in Fig. 5-6? >-----------------.

No (Driver Circuit is faulty.)

~
Check TR CLK and TR U/D inputs on DRV. TR CLK +4..SV
ov
JLJ Fig. 5-7
TR CLK: U14 #4 (sig) J5 #8 (corn)
TR U/D: U14 #2 (sig) J5 #8 (corn) TR U/D { CW : +4 • 5 V
!...---------..----=--------~ CCW: 0 V

No
Are check results as shown in Fig. 5-7?>-------.
Yes
The signal line in question
is faulty on DSP.

The signal line in question

is faulty on DRV.

Drive Circuit is OK.

-rfra1n Motor or Feedback C1rcu1t 1s faulty.)
In order to check the Feedback
Circuit, remove the soundome
plug from J2.
Change the logic levels at the
following feedback inputs by
connecting/removing a jumper
lead to/from the HIGH voltage
(+15V on F1) alternately.
TR D3: U8 #3
TR D2: U8 #9
TR D1: U8 #11
TR DO: U8 #13
TR CP: U8 #5
The LED•s at the output ends
come in and go out accordingly? No
TR D3: CR14 TR D2: CR13
TR D1: CR12 TR DO: CR11
TR CP: CR10
Yes
The signal line in question
is faulty on DRV.

5-12
- - FURU•o - - - - - - - - - - - - - - - - - - -

Do the same thing while measur-

ing the logic levels on DSP.
TR D3: U78 #14
TR D2: U78 #16
TR D1: U82 #10
TR DO: U82 #12
TR CP: U82 #14

The logic levels change between No

0 and +5V alternately?
Yes
The signal line in
is faulty on DSP.
Train Motor is faulty.
(U77 on DSP cannot be checked by the above method. But, the possi-
bility of faulty U77 is negligible when compared with the motor
trouble.)

[5] Lower the soundome.

Soundome Lowering Troubleshooting

The LED 11
.()
11
on the panel lit?.____ _
_-.
No

CR18 (R/L CONT) on DSP 1/3 lit No

with the 0 key pressed?
Yes R/L Command Signal
Line is faulty.
____ Ql_SPLJ11_1J.lill_ _ _ _ _ _ _ Lower Soundome is commanded by
11 11

HULL UNIT Display Unit. Fault is in Hull Unit.

Measure the supply voltage
between TB1 #1(+) and #2(-).
No
Yes Check ship's supply.

5-13
- FURU•o - - - - - - - - - - - - - - - - -

No

Yes Trouble is cleared

lacement of F2?
Yes
Measure the supply voltage
between TBl #3(+) and #4(-).
No

Kl or K3 is faulty.

[6] Detect a known target (buoy, pier, seabed, etc.) while operating
the OUTPUT, GAIN, TVG (LEVEL/TIME), AGC, CLUTTER and VOLUME
controls.
(STfRT)
Yes
Echo presented normally?
1
(END)
No

69 Fig. 5-8

Radial Noises
Poor sensitivity in
specific bearings.
Check the Slip Ring in
soundome.

5-14
--FURU-0------------------

Fig. 5-9
mfiiiij <- o' I
Double seabed traces ~~water
Check the soundome.
Water may be inside.

CORROSION OF SOUNDOME
In case that the equipment is installed
on the wooden boat and the metalic part
of the soundome is seriously corroded,
voltage difference may exist between the --
propeller and the soundome (hull unit).
Connect a large wire, such as the one
used for the SSB antenna, between the
retraction tank and the engine body.
Also, do not connect the grounding wire
of the radio equipment to CH-14/16 (incl.
the retraction tank).

CLUTTER does not work.

Level Analyzer (U63) on\
DSP is fault • J

Echo presentation is OK, but

audible sound is abnormal.

Audible signal line is

faulty. (Ref. P.1-31/7-8)/

OSP BOARD

TX.PWR:\
Waveform is
some os
A-6(P. 7-3) \ U53

R230 DQR25
Check the transceiver
controlling signals AGC-----~7
Waveform is j 1
(Ref. P.7-2/7-5) some os
8-3 (P.7-6).
KP ••• TP12 TX PWR .. R23
TVG •• TP8 AGC •.•.• R25
Fig. 5-10
No

Check the sig. line in question.

5-15
- FUAU-0 - - - - - - - - - - - - - - - - -

_D.l_SPLAY JLNIT _ _ _ _ _ _ _
TRANSCEIVER UNIT
Transceiver Power Supply Troubleshooting

Measure the supply voltage

on Jl #2. (GND = TP1)
No

Yes Check ship•s supply.

Measure the DC line voltages:

TP11 ••..• -12V
TP8 . . . • • • +5V
TP10 .•••• +12V
TP9 ••.••. +15V
TP12 ••.•• +130V
(GND = TP13)

Power Supply is OK. Yes

Proceed to the transceiver
troubleshooting. No

Turn off and on the POWER switch

while watching the LED•s.
CR11 +5 V
CR12 +12 V
CR13 -12 V
CR14 +130 V
The LED•s light up even
for a moment?
All LED•s lit Some lit for a moment No LED lit even
for a moment. but other(s) not lit for a moment.
at all .
Open circuit of +5V, Shortcircuit of the
+15V or +13V line line(s) of which LED(s)
or faulty PWR. are not lit at all.

( PWR is faulty.)
5-16
- FUIRU-0 - - - - - - - - - - - - - - - - -

Transceiver Troubleshooting

Measure the TX output between j

TP8 and TP9 on TRX. (Ref. P.7-4)

(RX is faulty.) Yes

No (TX or Transducer is faulty.)

Remove wires from TB2 #1 and #2,

and connect the dummy load (100 ohm,
30W, see Page i) instead.
Measure the TX output again. I
Yes

No
Slip Ring or Trans-
(TX is faulty) ducer is faulty.
Check the transmitter controlling
signals. (Ref. P. 7-2)
KP .. Freq. Divider Enabling
Signal, U15 #2
DRIVE GATE .. Collector Voltage
U10 #1
No

Yes
The sign a1 1i ne in
question is faulty.

TX signal line (Ref. Osc. thru

( Power Amp.) is faulty (Ref. P.7-2)

In order to disable AGC, remove

the wire from TB1 #6.

5-17
- FUAU-0 - - - - - - - - - - - - - - - - -

Check AGC output on U6 #14.

No

Trouble cleared ? Cleared

No AGC Circuit is faulty.
(Ref. P.5-21)
No
Audible sound OK?
Yes Ul, U2 or U3 is faulty.
(Ref. P. 7-6)
(u4 or U5 is faulty.)

[7] Raise the soundome.

Soundome Raising Troubleshooting

CR18 (R/L CONT) on

off with the 1f ke
off Signal Line

_ _QJ_SPLAY UNII_____ _ 11
Raise Soundome is commanded by Display
11

HULL UNIT Unit. Fault is in Hull Unit.

No
Yes Trouble is cleared
replacement of F2?
Measure the supply voltage Yes
between TBl #4(+) and #3(-).

No

Yes Kl or K2 is faulty.
*Motor is faulty.
*Note: Suspect overload of the motor (bent shaft, etc.), too.

5-18
- - FURU•o - - - - - - - - - - - - - - - - - - -

5-3. Static Response of Receiver + Display

If you wish to check the receiver+display response roughly, utilize
the transmitter circuit as a standard signal (cw) generator:
Modifitation to TRX Board
(1) Unplug J2 (+130V) in order to disable the TX power amplifier.
(NEVER FORGET THIS ITEM!)
(2) Remove leads from TB1 #3 (KP) and #4 (TVG).
(3) Connect the dummy load to TB2 instead of the transducer.
(4) Connect the metal oxide film resistor (0.47f.l), the potentiometer
(1 to 2K ohm), the switch and the jumper leads as shown below.

Meta I Oxide Fi I m Resistor

OL..7D (FURUNO CODE·000-371-0L..7)

~, -+-5?---c-g~----~
~
1 TP 13 R7S -c::>- ,----~

R77-c::>-

.:.o-
C47
J2
OPEN/

·~.

1-2KD 100D Dummy Load

(See P .i)

Fig. 5-11

5-19
- - FUIRU-0 - - - - - - - - - - - - - - - - - - -

See page S-13. The meaning of the above-mentioned arrangement is

as follows.

A. When SW is closed, TB1 #3 (KP) is forced to HIGH continuously,

and the one-shot U11 (1/2) output is held HIGH because the
jumper is connected across C47 for the infinite pulselength.
Thus, frequency divider U15 outputs CW (continuous wave).
Notice that J2 (+130V) is unplugged in order to prevent the
power amplifier from damage due to continuous operation.

B. The CW signal (balanced) is picked up at the driver input

(R77, R78) and fed to the receiver front end (TB2). Since the
driver input is well attenuated by the metal oxide film
resistor (0.47Il), the level of the CW signal is comparable to
the actual echo level. Note that the dummy load (100f1) serves
to lower the impedance at TB2 and prevents the jumper leads
from picking noise.
C. As the gain-controlling signal, +5V is divided by the poten-
tiometer and applied to TB1 #4 (TVG).
Typical receiver response obtained with the above arrangement is
shown below. In this test the potentiometer was turned and the
signal levels at various points were measured when the picture
color has changed from DEEP BLUE to BLUE and from RED to REDDISH
BROWN. The signal levels were also measured when the SIG (TP2 on
the TRX board) reached +10V (saturation level).
Conditions; OUTPUT = A
11 11
AGC = 0FF11 11
NOISE LIM = 0 11 11

!TRXI TP3 (TVG)--------- +2V +1.5V +1V

U2 #1 (VCA Output)-- 70 mVpp 500 mVpp 1000 mVpp
TP1 (IF)---------- 60 mVpp 370 mVpp 800 mVpp
TP2 (SIG)--------- +0.5V +4V +10V
IDSPI TP10 (SIG)-------- +0.5V +4V +6V

Color on D.BLU BLU ---- RED R. BRN

CRT:
Note: Signal levels measured on TP3 and U2 #1 will differ con-
siderably with respect to the unit tested.

5-20
- FUAU-0 - - - - - - - - - - - - - - - - -

AGC Function Check

(1) Adjust the potentiometer for +1.5V on TP3 (TVG).
(2) Turn on and off the AGC switch, and confirm the following items.
A. The signal level on TP15 (AGC OUT) should change from OV to
+1V (approx.) when AGC is turned on.
B. The picture calor should drop by two to four calor gradations
when AGC is turned on.
NOTE 1. AGC LEVEL is set to STD throughout the testing.
11 11
(Both S2
#5 and #6 on the DSP board are set to OFF.)
2. The signal level on TP15 should be measured with an -~

oscilloscope. Do not use a multimeter because its input impe-

dance (low) discharges C27.
The breakdown voltage of U6 (4/4) can be measured with extremely high
receiver input:
(1) Remove the metal oxide film resistor and turn on AGC.
(2) Turn the potentiometer until the level on TP15(AGC OUT) (measured
with an oscilloscope) saturates.
The saturation level should differ with respect to the AGC LEVEL
setting:
AGC LEVEL (S2 #5 and #6 on DSP) Saturation Level
LOW (ON and OFF) +1.6 V
STANDARD (OFF and OFF) +2.5 V
HIGH (OFF and ON) +4.0 V

5-21
--FURU-0------------------

5-4. Soundome Check without Dry-docking

Remove the soundome cables from the hull unit (J2 on 06P0146 and TB1
on 06P0149), and measure the resistances shown in Fig.S-12 from the
cable-end plugs. When measuring the resistances, take care of the
following points:
1. The resistances which are marked with "*" in Fig.S-12 may con-
siderably differ depending on the multimeter and the ohmic range in
use. The measurements indicated here were obtained by using
SANWA's CX-505ll multimeter. And, "35-45x10k..Q", for example,
means that the resistance should be 350kQ to 450kil when measured
on the "x1Qk_o_" range.
When a brand-new soundome is available, measure such resistances
(with * mark) by using your own multimeter. The record of the
measurements will be helpful when you check a soundome in future.
2. When a multimeter is used with an ohmic range, some voltage appears
between the RED and BLACK probes of the multimeter. Therefore, you
should be careful about the polarity when semiconductor devices are
contained in the circuit:
(Examples)

The probe with POSITIVE output voltage (BLACK

in case of SANWA's CX-505ll) should be
touched to the pin which is pointed to by the
arrowhead (pin @ 1-g_ this ex amp 1e), and the
other probe to pin ~.

If both pins are pointed to by arrowheads, it

c
means that no semiconductor drvice is con-
nected between the two pins and you may disre-
gard the polarity.

5-22
FURU-0 - - - - - - - - - - - - - - - -

+15V 300
13 @
@ 25
@
* * 35-45
X10KO
*
* 200-300@
x10
.
24
12

@ . 11 ®
23
10 @
@ 22

@ . . 9 ®+--"
21
8
@ 1.5K lK 20 .
7
® 1.5K 1K 19
6
® 1.5K 1K 18 300
@ 17
5 ®
1.5K 1K
@ 16
4 0 //

1.5K 1K
0
//

@ 3
37K lK 15
2
0 /
@ 37K lK 14
CD._)

Tl

01

Fig. 5-12

5-23
---IPaJ~--11--------------------------------------

Chapter 6. LED STATUS CHART

NOTE 1. Q: lit continuously ():blinks tt: not lit at all
Q9: status changes depending on operating condition.
(For judgement, knowledge of circuit theory is required.)
2. Logic 11
+ 11
: The signal makes the LED on.
Logic 11
-
11
: The signal makes the LED off.
Display Unit
PCB LED Status Logic Signal
CR1 +5V 0 + +5V Line
CR2 -12V 0 + -12V Line
CR3 +12V 0 + +12V Line
CR4 EXT KP () + Keying Pulse from other sonar/echo
sounder (Echo data. is forced to zero at
this moment.)
CR5 INT1 () - Interrupt Request to CONTROL CPU
CR6 INT2 () - Interrupt Request to ECHO PROCESSING CPU
3-bit Echo Data Output (binar~) by AD
Converter
CR7 D2 () + • • • • 0 0 0 0
CR8 D1 () + • • 0 0 • • 0 0
CR9 DO () + • 0 • 0 • 0 • 0
Low~ Echo level~ high
CR16 TICLK e/() + Tilt Drive Clock Signal (blinks during
tilt operation)
CR17 TRCLK e/ct + Train Drive Clock Signal (blinks during
DSP t r a i n O_D er at i on )
CR18 R/L ./0 -/+ Raise/Lower Command (lit during lower
operation)
CR21 KP () + Keying Pulse
2-bit Tilt Data (See P.1-38.)
CR23 TI D1
CR24 TI DO
®
®
+
+ •
0
0
0
0
•
Tilt +5° -30° -90°
4-bit Bearing Data (binar~) & Center
Pulse (See P. 1-40)
CR25 TR D3 ® + • • • • • • • 0 0 0 0 0
CR28 TR D2 ® + • • • 0 0 0 0 • • •
• 0
CR29
CR31
TR
TR
D1
DO
®
®
+
+
• 0 0 • • 0 0 •
-0- -
• -0- -• - -
0 -•- -
0 -•-
• 0 0
0 -•- - -
-
•
0 - -• -
CR32 CP ® + 0 0 0 0 0 0 0 0 0 0 0 0
Bearing: 1 2 3 4 5 6 7 8 9 10 11 12
(o•clock)
CR19 +130V 0 + +130V Line
PWR CR20 .!.12V 0 + -12V Line
CH-14) CR21 +5V 0 + +5V Line
CR22 +12V 0 + +12V Line
CR3 13V 0 + 13V Regulator Output
CR22 130VTV 0 + +130V Line
CR23 -12V 0 + -12V Line
REG CR24 -5V 0 + -5V Line
(CH-16) CR25 5V 0 + +5V Line
CR26 12V A 0 + +12V Line (not used)
CR27 12V 0 + +12V Line
CR28 12V B 0 + +12V Line
6-1
- FUAU-0 - - - - - - - - - - - - - - - - -

Transceiver Unit
PCB LED Status Logic Signa 1
CR15 KP () + Ke_yinq Pulse
CR18 TX () + Power Amplifier Input (Check with
OUTPUT= C
11 11
)

TRX CR23 +130V 0 + +130V Line Voltage

CR24 +12V 0 + +12V Line Voltage
CR25 -12V 0 + -12V Line Voltage
CR26 +5V 0 + +5V Line Voltaqe
CR11 +5V 0 + +5V Line Voltage
PWR CR12 +12V 0 + +12V Line Voltage
CR13 -12V 0 + -12V Line Voltage
CR14 +130V 0 + +130V Line Voltaqe
Hu.ll Unit
PCB LED Status Logic Signa 1
CR3 +15V 0 + +15V Line Voltaqe
CR4 TI MO 0 + Tilt Motor Supply Voltage (High. bright-
20V ness while the motor is driven.)
2-bit Tilt Data (See P. 1-38)
CR9 TI D1
CR8 TI DO
®
®
+
+ •
0
0
0
0
•
Tilt +50 -30° -90°
4-bit Bearing Data (binar~) & Center
Pulse (SeeP. 1-40.)
CR14
CR13
TR
TR
D3
D2
®
®
+
+ ••••• • • 0 0 0 0 0
• • • 0 0 0 0 • •
• • •
0
CR12 TR D1 ® + • 0 0 • • 0 0 • • 0 0
CR11
CR10
TR
CP
DO ®
®
+
+
0 • 0 • 0 • 0 • 0
-----------------
0
• •
0 0 0 0 0 0 0 0 0 0 0 0
DRV Bearing: 1 2 3 4 5 6 7 8 9 10 11 12
(o'clock)
CR5 TR MO 0 + Train Motor Supply Voltage (High
20V brightness while the motor is driven.)
CR15 RAISE ()jO + Blinks during RAISE operation, and lit
continuously at upper limit.
CR16 LOWER ()jO + Blinks during LOWER operation, and lit
continuously at lower limit.
CR19 TI ()/. + Tilt Motor Driver Output (Blinks while
DRIVE the motor is driven.)
CR20 TR ct;e + Train Motor Driver Output (Blinks while
DRIVE the motor is driven.)

6-2
- FURU•o - - - - - - - - - - - - - - - - -

Chapter 7. WAVEFORM CHART

The waveform chart shown in this chapter is organized with respect to the
circuit functions so that the service technician may refer to the waveforms
in order, while he is studying Chapter 1 (CIRCUIT DESCRIPTION) or con-
ducting troubleshooting.
Unless noted otherwise, all the waveforms were measured with the DIP
switches (S2/S3) on the DSP board set as tabulated below.
52 #1 OFF) Unit = METER
#2 OFF
#5 OFF) AGC = STANDARD
#6 OFF
#7 Don•t care.
#8 OFF Pulse length = SHORT
53 #1 Don•t care.
#2 Don•t care.
#3 Don•t care.
#4 OFF Strongest Col or = REDDISH BROWN

Contents of Waveform Chart Waveform No. Page

7-1. Transmission A-1 to A-9 7-2
7-2. Reception
Control Signals ..............•......••••..•••.•• B-1 to B-4 7-5
Echo Signal Line ..•..••••.•••.•.•••.•..••••••..• C-1 to C-7 7-6
7-3. Audio Signal .................................... D-1 to D-7 7-8
7-4. Echo Acquisition Timings ........................ E-1 to E-6 7-10
7-5. Frame Buffer Memory Write by CPU ............••.. F-1 to F-4 7-11
7-6. Frame Buffer Memory Read for Screen Refresh
Hor. Timings & Serial Output Clock Signals ...... G-1 to G-8 7-12
Parallel Transfer Timings ....................... H-1 to H-6 7-14
Memory Refresh Timings ..•.•..•.......•.......... I-1 to I-2 7-16
Vertical Timings & Composite Synchro Signals .... J-1 to J-4 7-16
RGB Signals ....................................• K-1 to K-2 7-17
7-7. Power Supply
CH-14 Display Power Supply •..............•.••••• L-1 to L-4 7-19
CH-16 Display Power Supply •..•..............• , •• M-1 to M-5 7-20
Transceiver Power Supply ....................••.• N-1 to N-4 7-21
Note: For easy reference, each waveform drawing bears the page of the cir-
cuit diagram (S-XX).

7-1
- FURU•o - - - - - - - - - - - - - - - - - -

7-1. Transmission (Circuit Descriptions P. 1-3)

KPGr
J 1 l I
_i Trigger IniernoJ
DSP
I I[ ! : LU X-scale : 10 ms/div.
u16 ~ 12. 0 V IHI-+-r-!: "+-t-+: ..........,! --1:~:>+<jl Y -scale 2 v/div.
2/3 ! I !
i i i
(S-4-) J I

KP
Trigger : lnternoY
1)sp X-scale 0.2 ms/div.
TP 12 Y -scale : 2 v/div.
'/3 : I

, I i RAN& E ::: '' 1 ''

(S- 3) I ! i i I :

KP
- (i
Trigger : ln1er;'(\J1
TRX X-scale : 0.2 IYls/div.
TP 7 Y -scale : 2 v/div.
CS-13)
f('ANGE- "I''

Freq,. Diviofer Eno.ble

I I I i ! l
Trigger : lnterncJ2
t I IJ ! •
X-scale 0.2 ms/div.
I i J l
I/ UIS ~2 Y -scale : 2 v/div.
,, I,,
I I i : I

I I ! I i I

I f i i I l
..l. I
Trigger .Inter noJ
I l
1,--+-1-t--t--;-1~
1)----f---1
1

~HE X-scale o. 2. ms/div.

ov I I

l
-,.---1

! Y-scale 2 v/div.
-+-r
I i I •

i i I
I I ! !
I RAI\l6E """ ''I''

7-2
- FUAU-0 - - - - - - - - - - - - - - - - -

TX. PWR
I I
I I i
' A
i
I
lnTerno.l

-
I I I I
B Trigger :
I ! I I
I I
I
X -scale s/div.
,, TP 6 ov ! I I I !
c
: Y-scale : t v/div.

*
I
I ' _j_
i ! 1 I , OUTPUT== ''A'' "8 '', ''C/~

t ! i I i

DRIVE G-ATE
! ! ! I I
Trigger lnternol.
X-scale : o. 2 rns/div.
Y -scale 2 v/div.
! :
!
RANGE "' ,, I ~
i
I
I ! I !I OUTPUT::. "A'' I ''B'', "C''
'Fre~· = ISOKHz

DRIVE. G-AlE

Trigger InTerno12
X-scale : 0-2 s/div.
Y -scale 2. v /div.
! I I
;
I I i
RAN €rE ::;;: 1 ~
11

~ : i
I I OUTPUT ::::: ''A 'I ''13
I I// "C 9
Fre~- =GOkth
Driver Output
I : I :
i .,-.-..,
I

~;- Trigger : Interno.Q

ocross ~~
,, ;
X-scale 0.2 rns/div.
R<(?!; I I
' .......__, Y -scale I0 v /div.
~~ !
: I . i RAN&E == ''I'' OUTPUT=- '' 8 ., AC Couplin~
i ! ! ! I I ! Freq". = IS"Ol<HZ

Dr-iver Output
I I : ~
-r---<
I Trigger : IniernaP

~:
! X-scale : 0.2. ms/div.
i
Y-scale 10 v/div.
~--.-r
I •
RANGE:::: ''I" OUTPUT= "B ~ AC uup I it~~
I
~~+-+i !
I
i
I Fre~- -= 6ot<l-k
I
: I ! i ! !

<=>- R85
0
T2

TRX

7-3
- - FURU•o - - - - - - - - - - - - - - - - - - -

I ;
'Power'" Amplifier OLAtpt.Lt
i ! ! ! i I t

T- I~ I I i Trigger : Intero~
f l i :
between I
--<I X-scale : 0.2 ms/div.
I
11 E ! I Y -scale : I 00 v/div.
TP 3 8t I
'

TP ~ l_ j
RANElE::::: ''I,, OUTPUT= ''B., AC Coup/in3
' l
I
i

i I
I
I
i free,== ts-OkHl (Amplitude d.;ffers on
8'8' ~A-flJ b.OkH1: .612.ts.)

Typical AmElitude 11[11

Freq. OutQut: IIAII IIBII ucu

60 KHz E = 40-70 250-350 640-760
88 KHz E = 100-200 500-600 820-980
150 KHz E = 100-200 500-600 900-1100
Unit: Vpp

7-4
~al~--11----------------------------------

7-2. Reception (Circuit Descriptions P. 1-5)

NOTE 150 KHz
60 KHz

Control Signals

TV&
! ! ~-
I I
I I ! i I I i
Trigger InterncJ
DSP hi I ! ! i I
--r-~~
-t
X-scale : 0.1 s/div.
TP 8 I ; ! I I ! :

'/3 I i I : Y -scale 1 v /div.

I
(:5-3) I I !
RANGE = ··q .,
OV '"---!--!-- t l l
I
• ! ! GAtN; ''to''
TVG TIME ~ ~ 0 '' TVG LEV£L = ,, 0 .,

I I I
r---'
! ! I

I
I
I 1 Trigger : Iilterno..Q
~ ~ ! I

! ·~---k.
I I
I F X-scale : o.1 s/div.
Y -scale 1 v/div.
RANGE::: "9 '1
11
G-AIN = ''0
Tvt,- TtME-= ''10'' TVq LEVEL= ''10''

TV6
I 1 i ! I
Trigger lfltern~i
X-scale 0.1 s/div.
't
Y -scale f v/div.
1:011
~AN & E =- '1 ~ "

oV 1 ! ; 1 ! , rt--' ~AIN == ''o"

TVti T/fvfE = "O'' TVG LEVEL=- "0''

TV§-
Trigger In-rer fl o.9
X-scale 0.1 s/div.
Y-scale : 1 v/div. I:OM
RANGE= '' q ''
aAIN =- '''D ~
1vo- T•ME = '~1 o ,, Tver LEVEL= ''lo"
TV6
TRX IP3 I:W)
(S-/3) Same waveform as above.

7-5
IFaJ~--11---------------------------------

A~C
I i I I I
I ! ! ' :
Trigger
X-scale s/div.
,,
TP 4 Y -scale 1 v/div.
IY±$=$$~=Ef;lsro
11 . LO
l~r+~~~~-rl~~· DSP(V3) S2 It-S 4 6
J I I Af.-C o;:;-- OFF --- -- l 0
oV 1~1-+-+-+1--+-+1-+-!,+i--+--1 =ofF
ofF Off ----- STD
O'FF ON -----HI

VGC
I ! l l I i
I f i
j
I
I
I I Trigger ltltern~
I
'

I
j

J X-scale : 0.1 s/div.

~- : : ll: Y -scale o.5 v/div.
i l
-I
DV•~~-r+~t~j-r,~r!-1
I
f I I
!
I -
RAI\l6E::; "9"

1 AGC =-"OFF" E,AIN =. ''S IJ

TVG llf"fE =- "S ., Tv6 LE. VEl=- ., s- '/

Echo Signal Line (Difference of signal level with respect to the fre-
quency is small.)

Mixer Output
J 1j 1 J~
~~I i
I I i I
Trigger : TP7 CI<P) fi
l Jl
! l i I
TRX 'il.~!ll!i
X-scale : 0.2 ms/div.
~! il~~ I : Y -scale Q. 2 v/div.
(S-13) 1/ I -4J_~
·~1 j I l I
RAN&'E = '' 1 ., OUTPUT= "A"
I j I !
AC Covplir1~
I 1

vcA Outp~t
~
I

I
I
I
I
i I
I i i : j

I t I j I
_j Trigger : TP7 (l<p) fl
I
i
J\' i I
I
!
X-scale : 0.2 l'l'ls/div.
U2 *1
: L' _.w_ I
'I
: ~~_LVi : Y-scale o.S v/div.
i !
"'i j :
RAN ErE =-''I'' OUTPUT ~ ''A''
I
I l I f : I : i
I I &A IN"' ''ID
11
A& C..= 'I OFF,,
I l I I
I TV6 Tlt-'lE "; ··o ., Tl/& L.EVEL = ''0''
AC Cou~
V

If Amp/lfi er Output
I ! I I ! --i-L-J_
t :
.__! ~I~'
! ! ! I ~ ! I
Trigger : TP7 (KP) JL
f I{) ! I !
X-scale o.~ m s/div.
'I
TP 1 Y-scale : o. 2 v/div.
RANGE = '' 1'' OUTPUT = ''A''
GAIN='' l o" A&C = "O'FF ''
TVGJ TtME:: ··o··TVG LEVEL~ ··o''

7-6
- FURU-0 - - - - - - - - - - - - - - - - -

SIG-
I ! I l : i i I
I i i ! : I Trigger : TP7 (Kf') fl
[ ! i !
IJ X-scale : 0.2 ms/div.
TP 2 I I \ i I I I
'I
! I \ i i ! I Y -scale : 2 v /div.

I
I
1/
il\
i~i
ilJ I
RA~6-E =- ''1 ., OUTPUT ~ ''A IJ

ov ! I I I I
i I

I G-AIN= ''rO" AG-C = "OFF'"

Tv6- TrME == ''o" TV6 LEVEL"" ''0"

Slfr
I I
I

1-
! I
I i
I Ii
: Trigger TPI2 (l<p) f1_
DSP ! i I I
:
iT~
X-scale 0.2 rns/div.
! ! I i
1/3 TP 10 ; ,f"h; ~
I
i Y -scale 2 v/div.
I f V : '1\.: I
I
I
I RANGE-::: "I'' OUTPUT""" I~"
(S- 4) l/ i t ""1"..! i l
ov ! I I i ! I
erAtN = ''ro'' Aq.c = ''OFF ''
TV& TIME= ''0'' TV& LEVEL ~''O"

VRE'F
i :
i I I
LL
I : I
I I : i I I Trigger :
I "1o''
, ··o·· X -scale s/div.
11 T i ! I ! I I
!
TP 13 I I ! I : , I Y -scale : 1 v /div.
i
I i I fTl ! I NOISE LIM
::; 'Jo'', "to"
i I I .
I
ov I
I
I
I I i
I
I ITT
:

CLTB
i ' I ! ~t-W
I
I
I
I
!
;
n---r-n
i -r--1 I I I

''10
11
Trigger
X -scale : s/div.
R43
I I ! I I ! 1 i
11
i i I
:
~~-~_j
i ~--1 Y -scale o.s v/div.
I l I
I i
''o"
! [

ov I
I
i i :U
! I ~
NOISE LIM == ''0''1 ··tO''
! I I

Measurmg Point

-=-
I
R43
DSP

7-7
---~--~--~~--------------------------------------

7-3. Audible Signal (Circuit Descriptions P. 1-31)

KP Mute SiancS
I I I . i I I I

! i l Trigger : TP7 (kP) Sl.

! I ! i
! 1--j
i
TRX X-scale : 2. ms/div.
U/2 '"'11 ov I
I I !
i 11 I I I
I i : Y -scale : 2 v/div. IDIJ
(S-13) --t-+---1
I I l
i !
I I I I
i RANGE == ''I"
i I i I ! I I
! I T I I

Local Os~citor OutgcJ

i I ! I f I
I~~
I t rr
~-'
: ! Trigger TP? (kP)
I ! i ! I ! t
!
~ X-scale 2 '('() s/div. ~
,, R44 oV ~~
! I
! ! ~
I

t
l

l
I :
Y -scale 1 v/div. DE
! ! I !
I
i
I
I I
+-I !
!
I
I
RANGE = ''1''

U7
~~4
1
Measuring
Pomt

Mi'xer Outgut
I !
I
I I I

r· I : i ! I
Trigger : TP7 (KP) SL
I I
t-h
!
I
I
X-scale 2 ms/div. ~
lJ7 -:fl-3 I f I

/I i '!
I I
! t ! I I
iH
: Y -scale 0.5 v /div. DE
(C33 anode) !
l?AN6E ''1
X OUTPUT :: 'A"
11

\JI : I I I
AGC =- ''D'Ff" 6-A/N =="10"
I I i I I
TV6 TIME= ''0" TVer LEVEL= ''0''
Ampl;tude nor stAble. KP Mute (J3/P1) ::: OFF AC Coi)PiinQ

c33n
.Q uu7
l
Measuring
Point

7-8
- FURUINIO - - - - - - - - - - - - - - - - -

AUDIO

Trigger : TP7 CkP) fl_

'1 :.A f I i I
X-scale
I 1 I~Unn : ,_;_ ... ~,,,,. 2 rYl s/div.
'I
TP 5" I rill uv·T :"' : "1--: Y -scale o.os- v/div.
:r
I !
1 l I
.SO.,e conditions as obove.
fre9>· = 1!;O KH~
Am_pJituole not stc:tble.
AUDIO tN
~!i i!!
~-~ Jlli
;m .fl
i i I I

Trigger : TPI2 (KP)

; :1 , I
DSP X-scale : 2 rf/s/div.
TP ~ 1
2/3 Y -scale : o.os- v/div.
(S-4)
S£),me conditions .aA o.bove.
Fre1>· -c:.f50 kf·h

AUDIO MID

Trigger : TPI2 (I<P) fi

X-scale 2 ms/div.
'J TP 9 Y-scale D.OS" v/div.

Sa.me can~iTions o.s etbove.

FreLD. : :. 1~o f<Hz

AUDIO OUT

Trigger : l1' 12 (I<P) f i

X-scale 2 m s/div.
'I TP 17 Y-scale : 0.5 v/div.

Above concl itio()S pkks vo l ="to''

Fre~- = 1!>o f<Hz

Note: The signal levels, D-4 to D-7, considerably differ with respect
to the frequency. The signal levels of 60 kHz are almost
double of the above levels (150KHz).

7-9
- FURUINIO - - - - - - - - - - - - - - - - -
7-4. Echo Acquisition Timings (Circuit Descriptions P. 1-8)

KP
I /
I I i I
I ! I i i --1
Trigger In1ernoJ
I ! !,., I j I
I
DSP
oVIh-~-~~·.~~~~~ill~,~~~
X-scale 50 ms/div.
•/3 TPI2 ! I ' : Y -scale S v/div.
i
1

I I I :
1!--+--+--+----+---+-+--+-+-r
(S-3) i i I i ! I ' RAN&E === ''S" SECToR"''' S"''
I ! I i t l !

CNT CLR

Trigger TPI 2. O<P) f l

DSP X-scale SO ms/div.
2/3 Y -scale 2 v/div.
(S-4)

RE-C

Trigger : TPI2 (l<p) fl

X-scale >O ms/div.
,, Y-scale : 2 v/div.
I ~ i RANGE=="!;'"'' SECToR== "5" ''

SMP
Trigger TPf2 (KP) Jl
Li[l X-scale 5D m s/div.
,, U3 #-6 o\1 111! Y -scale 2 v/div.
I
RANGE - ., s- '' -
- -..

END INT

Trigger TP 12 (KP) fl
X-scale SO m s/div.
,, U5 #~ Y -scale 2 v/div.

Use High fre~- ( ~ 20Mt·fe) O:scilloscope.

OE
I i
l I
i i I
I
l
Trigger : TPI2. O<p) fl.
! ! ! ilr-r-r X-scale so m s/div.
!lJ!!
1/
U3 *#'3 ov !
I ; r}J:': I--- •
Y -scale 2 v/div.
I : ' I

I t ~
RANEJE =- '' S' '' SECToR =- '' 5<'"
I t
I f I i
: i

7-10
- FURUINIO - - - - - - - - - - - - - - - - -

7-5. Frame Buffer Memory Write by CPU (Circuit Descriptions P. 1-10)

i I ! i ! : l I _l I
! ! I ~ r· ~ Trigger Iri[erno.2
DSP X-scale 0.2 fs/div.
3/3 U.23 ~13 oV Y-scale 2 v/div.
(S-S)

ROW/<:OL

Trigger U23 ft-/3 (IORG) lS

X-scale : 0.2 )ls/div.
I!
042 ~6 Y-scale 2 v/div.

Use ~i8h fre~. (C. 20fv1H-z) Oscilloscope.

CAS
Trigger : U23 ~13 (IORQ) 1S
X-scale 0.2 fs/div.
/f U4-2 # 8 Y-scale 2 v/div.
:

! : ! I

WE
Trigger U2"3 1fl3 (IORS) 1S
X-scale 0.2 tfs/div.
u13 ifJ Y -scale : 2 v /div.

7-11
IPaJ~--11----------------------------------

7-6. Frame Buffer Memory Read for Screen Refresh

Hor. Timings & Serial Output Clock Signals

(Circuit Descriptions P. 1-16)

H. Counter Reset S;ancJ

1 I T1 1 ! I
I '
Trigger Intern~
DSP TI I I I J . ! 11 I
X-scale : 10 fs/div.
1/li!i~:lf Jl
:3/3 U27 *8 ov ! : i i Y -scale 2. v / div.
(S-S)

SNR R
'I ·~--~! Trigger : U27 #-8 l i
I : li I I

ov 'f I t ~~~-~
X-scale : 10 ,Ms/div.
'I U50 :tr-2_ • i Y -scale 2 v/div.
~iil! il
; I ' f _,____,_· __;_~ MODE = ''NORMAL'' ( - )
! ! ! 1 : i i ! I
''EXPANDED HISTORicAL" (----)

se
lt---.~'_ _ : ~~-'_.___~___,___...
h :. •I j I ;; f"'i:"T:' Trigger U27 -q:g 1..f
I!~I:! ; l ~
r--.~-~---'-----,1-il~--.;. X-scale :
lt U23 =4 3 ov: i ;·
;
li '.
Y -scale
10
2
fs/div.
v /div.
~~~------!- , --!-!---,-~•

. ! I I I :

ESM R
Trigger U27 #-8' l.J
~ lr 1: ! : _J
'i
· : 1

I t .UI i i :
1

X -scale : 1~ f s/div.
uso ~7 ov I
I I
I

! ! ~ I 1 1
Y -scale 2 v /div.
; l I ! : i I I
·~'--+--1~\-+
i I I I J I I
+ - - - c , .'

MODE =- ''NoRMAL"(--)
''ExPANDED HISTORICAL'' (----)

ESC

Trigger U27 :$f~ U

X-scale 10 f s/div.
'I Y -scale 2 v/div.

MODE= ''NORMAL''

7-12
IFal~--11---------------------------------

ESC
! I ! I '
I
I
I i i ~b' I I Trigger : U27 #.~ 1:I
i
I
~ J:
I! :
rr-
~
I
X-scale 10 f s/div.
lj t; oV J
i
I
t I

Y -scale : z v/div.
i I
I ! i I I
i i L! I I
l MODE;: ''EJ.PANDED HISTORICAL''
l f ! I i
!

BLNK
J ! ! I I I
h
u
I

!
I
!
~~
I I :j i i
I I

I
Trigger :
X-scale :
U27 lf% u-
rs/div.
If
uso #.10 ov 11 I I U' lji~ 10
I
I I ; _! ~ Y -scale 2 v /div.
I I I !
! i I I

i I I l i I i li
i ! ! I
I I I
! I

I
H. BLNK
I I i i •
fi~
~ : : Trigger : U27 ~8 1S
I :I
I U4-q #Jf ill I 11 X-scale : 10 ;J s/div.
'I
oV Y -scale : 2. v/div.
I
-+! t--:
~
I I
I

! I
I
I i 1 m
!
H. SYNC
! ! i I

1/ U60 #-12 ov
I
~~
.
!
1-: -rr-: ..
...:1

:
~
Trigger :
X-scale
Y -scale
U2? .»-~ tS
10 fls/div.
I ; I
2 v/div.
r-..---·
\--,_
i . : .

! t ! ~~~

7-13
- FURU•o - - - - - - - - - - - - - - - - -

Parallel Transfer Timings (Circuit Descriptions P. 1-19)

BLNK
I
I i t i i i I

DSP
7
!I'
i
I

I
~r--"-1'
11: I'
Trigger U27 #~ u
I
L;-----i'
!
X-scale 10 f s/div.
3/3 uso #10 ov 11 !
!
I
r
I

!
11
:
I
I Y -scale 2 v/div.
(S-5) I I ! J :
!
I
i
I ! !
I I I
i

BUSRG
I I l I I I I
tll Trigger U27 tt~ Lr
! lll! : : l X-scale 10 f1 s/div.
024 #6 u I I
IJ
oV I

Y -scale 2 v/div.

I I
:
TT-
I: : ~-L
!
.

I
:

! ; I
t± Use H;sh Fre'b. (2 2.0HHl) Osc.iiloscope.
I !

I BLJSAK
t
i r 1 :

I !I' i
Trigger U27 #~ u
I ;u
X-scale 10 fs/div.
'I U25 #5 ov 1 I
I
! I
i
.: I

Y -scale 2 v/div.
I I
I
I I
+-__;
i i I I !
I I I ! ! : : Us~ High Fre~. (~cz.DMHl) Oserliosrope.

7-14
~--~--~~----------------------------------

BUS{jK
I
: i ! i I

r :
Trigger : InTerno.Q
I I i :
X-scale : o.2 fl s/div.
/j 11
ov I
i I i l
I ;
;
i

Y -scale : 2 v/div.
I !
i i i i
i
I f
I
i I I

!
!
I t I
I I I I

--
RAS
i :
l I
;

I ~ ! Trigger : U25 :tt-S (BUSAK) 1S

l r -I
- -_ F :
-+ 'I X-scale :
. ! I 0.2 f1s/div.
/I U~l lr6 ov ! I t : Y -scale 2 v/div.
I ! :
-~

i
I I ! ! ! ;

goWLCOL
i
I i
• i
~ ! t i
-f------, Trigger : U2~ :#5 (BUSAK) tS
! I I ; il : i i '
I ! l
-+-----t----<
~ I
X-scale o. 2 fl s/div.
'/ U4-2 :ti6 DV I I
I
I £
!li
: .
: I Y -scale : 2 v/div.
~

! ! I t I :
i i I
I I i I f : : I I

I I ! ~ i I I

C'AS
1 ! i !t i I I I
~ Trigger U2~ :tt:~ (BUSAK) li
:_j i~_j~-~
: I :
! ,, f,li~
X-scale 0.2 (f s/div.
ov
I

U42 #\5"
I I
'/ !
!
Y -scale : 2 v/div.
I : ! f : r--r
I
I i I i I
I I I t : I iI

7-15
- FUAU•o - - - - - - - - - - - - - - - - -

Memory Refresh Timings (Circuit Descriptions P. 1-13)

--
RFSH (CAS)
i I I i I I IL
! ~~- .., ,_......_!~
Trigger Intern o.~
DSP
ov
f--
-~±+rr- !
11
U
I

I
i!!
! I, X-scale 0.2 ~s/div.
3/3 U23 *S I I ·
I I I
!

! I
·r I
I I ;
Y -scale : 2 v/div. IlD
Cs-5) ! I I i
Hi3h Fre~. (~ 2ot·,H-il) Osc.i2§oscop~.
I i
I I ! I I ! I I
I
i Use

ffi+J ~
. I.I :
ll J ;
:

: I
. l
i
r---<
-.j-+rJ
I
RAS
Trigger
X-scale
: U23
0.2
#5 (RfSH)
~s/div.
u
,, US/ #8
! '

f--+-:~~
J
Y -scale 2. v/div.
; I i I f ! I

I ! ! ! I I i
! ! I I i I I I ! Use High Fre9;. ((zDMH"i) Oscl@oscope.

Vertical Timings & Composite Synchro Signals

(Circuit Descriptions P. 1-24)

v. Counter Reset. Sian~

Trigger IrJternoJ
DSP X-scale : 2 ms/div.
3/3 U2~ ~3 Y-scale 2 v/div.
(S-5)

v. SYNC.
Trigger : U2.9 ~3 u
X-scale : 2 m s/div.
lj U47 #11 Y -scale 2 v /div.

V. BL-NK

rt~~:
·
hll~ --r, r.-+A-. · I I,
Trigger
X-scale
U2~ ~3
2 n1
1S
s/div.
U47 tt-3 oV . ·
'
i;
t~-t---'
1 ; , Y -scale : 2 v/div.
! ; +~-~--,-------,.-,~·
1
l ! 1
t I l I

7-16
- FURUIMO - - - - - - - - - - - - - - - - -

c,. SYNC
; i I I
;
I
1
I ; I
Trigger : U29 #3 lS
! I I I ;liT X-scale s/div.
2. I'Y)
1/ TP 5 ov i I I I lliJ
I
f--·'
i
I
l

I !
!
I
I
l
I t
-1---l
I
!
:--rw
I
I

I
I

I
I

i
Y -scale 2. v/div.

r ! I
; ! ·r [ ;

RGB Signals (Circuit Descriptions P. 1-23)

R
i I ! I I i I ' J :
i !~ t_]_,_i i Trigger TPS" Cc. SYNC)
DSP 1:1!J 1 ~~ X-scale : 2
OV I I i 1
1 -~~;~!-i rfl s/div.
3/3 lP 2 I
I I
I !
I
i Y -scale 1 v /div.
(S-S) I I I t
I ! i I I

I i t i I
! i
I I I
l + DISPLAY CHECK (f)
' '

q
Trigger : IPS" (C. SYNC)
X-scale : 2 ms/div.
TP 3 ov•~:~----~i--~~~ Y -scale : v /div.
lf-+-..--+-;--l---"""""""!-~~
f
1 I I : i ' f
I ; I i j·~--~~·~i: - :
~~r-r~ 1 1 1:
DtSPLA'( o-IECI~ (J)

B
Trigger : TP5 (C.SYNC)
TP 4
X-scale :
Y -scale :
2.
1
ll')s/div.
v/div.
•••
DISPLAY C!-IECK (I)

7-17
IFal~--11---------------------------------

R
~~-----------------------
i i I ! i : ' I

J- I_ l. .L j =h ! Trigger : TPS (C.SYI'JC)

X-scale : 2 rYls/div.
'I TP 2 Y-scale : I v/div.
DISPLAY CHECK (l) *
r 1 , 1 1 RANcrE = ''8'"'' GAIN==-''5'' NOiSE LlM-== "o''
TVG Tttv1E = "5'' Tv'~ LEVEL= ''5''

Trigger : TP S (C. SYNC.)

X-scale 2 n'1s/div.
TP 3 Y -scale 1 v/div.

Same conditions a..s obove.

B
I I
i I I I i
I .~.1 ! I ' I lnn•hn Trigger IPS" (C. SYNC)
~·

----- X-scale 2_ ms/div.

11 TP 4 ov' !

I
'

!
: I
!
~·
:
l
l
I
Y -scale I v/div. URI
l
i I
:!~
i
~
I
Sa.me COY) ait; O() S os. r;J;ov.e..

*NOTE: When measuring R, G and B signals with DISPLAY CHECK(2), wait until
360° full circle is painted.

7-18
- FURU•o - - - - - - - - - - - - - - - -

7-7. Power Supply

CH-14 Display Power Supply (Circuit Descriptions P. 1-43)

CL
f ! !
l
Trigger
4--~~;~~-?~1--~·1~:.·~:_I~' X-scale s/div.
P wR u3 -# 16 oV .., Y-scale 0.5 v/div.
($-ID)

So.w tooth Wave

b~
Trigger InterncJ
X-scale : 6 J(s/div.
ovl . : .. Y-scale 1 v/div.

PWM Inverter OutpuT

I! . ; ~

~~}1=
Trigger : InTern~

~- -_ =~
befwren X-scale S fs/div.
U3 ~9 Y-scale 0. 5 v/div.
-lf-10
!J,.
~~- --i ~. -.~-
Suprly Voli~e ~ 24v' DC
AC Coup/ir1~

AC Output
r-·~.- - : - . ~--:----"
I i l ~ ~ -+-~ Trigger Interno..-2
l ! ~ I : \
between X-scale S" ,Us/div.
1; TPS & Y-scale : 10 v/div.
Tr 6
Supply Vo ITC\fle ~ 24-V DC
AC Couplin~

7-19
- FURU•o - - - - - - - - - - - - - - - - -

CH-16 Display Power Supply (Circuit Descriptions P. 1-46)

CL(-r)
: I ! 1 ! I t I
I ! I j I I I i I
Trigger
I I iTI!~
REG U1 # 16 ov I 1i-~~.~ X-scale : s/div.
Y -scale v/div.
(S-11)

Trigger Interr1oJ
X-scale S )ls/div.
" U1 tr- S Y -scale 1 v/div.

I I ! : I

PWM Inyerter Otlfpv.t

Trigger I11ter ncJ'
between X-scale S jJs/div.
If
01 ~q
Y-scale 1 v/div.
tWd #10
Sup pi; Voh o.ge ~ 24V DC
At Covplifl~

AC Output
Trigger lttter nrJ
beTween X-scale t; fs/div.
,, (()4 (c_) Y -scale : 20 v /div.
lti~c\ Q (c s
Svf>Flt Volt "'Ue ;: : 24 V DC.

Ac CovplirJ~

AC Output
Trigger InterncJ
beTween X-scale !; _rs/div.
~6 (c) Y -scale : 20 v/div.
lMAo\ G7 re;
Supply Va!to.~e ::o:: 24-V DC
IJ
AC Couplin~

7-20
- FURU•o - - - - - - - - - - - - - - - - -

Transceiver Power Supply (Circuit Descriptions P. 1-48)

CL

Trigger :
PWR X -scale : s/div.
TP 2 Y -scale o.s v /div.
(5-14)

SawTooth Wave
Trigger : Intern~
X-scale : 2 ~s/div.
TP 5 Y-scale 1 v/div.
·~~------.--l--~-~

·~---~~'~--f-.---.-·-r--~--<1
~ i ! ' I I I

PWt-11 Inverter Output

Trigger IntemoJl
between X-scale S f's/div.
,, TP 3 & Y-scale : S v/div.
TP4 Supply VoiTtt~e = 2.4V DC
Ac Couplin8

AC Output
Trigger : lnterncJJ
between X-scale S fl s/div.
,, TP 6 8t Y -scale : 20 v /div.
TP 7
Supply V&ho.~:. 24-V DC.
AC Coup( it> 3

7-21
- FURU•o - - - - - - - - - - - - - - - - -
Chapter 8. DISASSEMBLING SOUNDOME AND TILT/BEARING ALIGNMENT

8-1. Transducer
(1) After removing the SOUNDOME
COVER (black plastic),
unfasten the four pieces of
the TRANSDUCER FIXING METALS.

(2) Pull out the TRANSDUCER from

the TRANSDUCER CASE.

Fig. 8-1

8-2. Tilt Gear Box

(1) Loosen 2 nuts and lift up the
upper soundome cover.
UPPER
;e-. SDVNDOME
tt::1' COVER
@
I
//
/

(2) Unplug P1 and separate the

soudome assembly from the
hull unit.

06p0Db0
Fig. 8-2
ObPOOf; I

8-1
- FURU•o - - - - - - - - - - - - - - - - -

(3) Loosen 4 screws, disengage

the RACK GEAR from the TILT
SHAFT by sliding the gear box
assembly in "t" direction
and remove the TILT GEAR BOX.

Tlt.:T 6£-AR BO>\

Fig. 8-3

8-3. Transducer Slip-Ring

After removing the TILT GEAR BOX (see paragraph 8-2) and the PCB•s
06P0060/06P0061 (seen in Fig. 8-2), carry out the following job •
. . . . . - - - - - - - - - - - - - - ( 1) Loosen 4 screws.

(2) Remove this part from the

soundome assembly.

Fig. 8-4

8-2
---~--~--~~--------------------------------------

8EA,RlNEf RoTARY-ENWDER

-r---- ( 3) Loosen 2 socket head screws

and remove the BEARING
ROTARY-ENCODER.

Loosen 2 screws and remove

the CARBON BRUSH ASSEMBLY.

Fig. 8-5

(5) Removing the SLIP-RING ASSEMBLY.

si~,lll-<
Shieltf ~
(6ND)
I

~
~ ~.Remove the
r::
~ insulation tubes.
ll 1--
Note: The SLIP-RING ASSEMBLY for replacement should be installed
after the CARBON BRUSH ASSEMBLY has been fix~d. When setting
the SLIP-RING ASSEMBLY, take care not to operi the arms of the
carbon brushes excessively.
The three leads of the SLIP-RING ASSEMBLY must be soldered to
the transducer leads, taking care so that the brushes contact
the center parts of the slip-rings as shown below.

:: i
Fi . 8-6

8-3
- - FUAU•o - - - - - - - - - - - - - - - - - - -

8-4. Bearing/Tilt Rotary-Encoder Alignment

When reinstalling the TILT GEAR BOX or BEARING ROTARY-ENCODER, take
the following points into account.
Bearing Rotary-Encoder Alignment
See Fig. 8-7. The BEARING ROTARY-ENCODER must be fixed so that the
binary-coded holes, (D4D3D2Dl=0001) and (D4D3D2Dl=Olll), are aligned
with the transducer's aperture and rear sides respectively.

BEARr Ncr ROTARY· ENCODER

.----Aperture Side

-------o--------- -rnANSPUCER

--------- --------

Fig. 8-7
Tilt Rotary-Encoder Alignment
As shown in Fig. 8-8, there are three slits on the TILT ROTARY-
ENCODER; two slits are very narrow (-30°) and the other is wide (+5°,
-90°).
The TILT GEAR BOX must be fixed so that the lower edge of the wide
slit is aligned to the upper side of the +5° DETECTOR (photo coupler)
with the transducer facing exact horizontal.
Operate the sonar. If the tilt reading on the screen does not match
the actual tilt angle of the transducer, rotate the TILT ROTARY-
ENCODER a little by loosening the four sockethead screws (see Fig. 8-8).
NOTE: If you wish to tilt up the transducer more, rotate the TILT
ROTARY-ENCODE ccw.

8-4
- FUAU-0 - - - - - - - - - - - - - - - - -

:....--------+1~-- Socketheo..cf
Screw

+So DETECToR

Q
TILT RoTARY-ENCODER

The lower edge of the wide slit must align

exactly with the upper side of the +5°
DETECTOR.

Fig. 8-8

8-5. Fixing Train Photo Interrupter PCB's (06P0060/06P0061)

In order to avoid feedback of erratic bearing signals, the job should be
carried out as instructed below.
(1) When assembling the PCB•s into one, fasten the two panhead screws,
taking care so that the LED•s be placed right in front of the photo
transistors.
r DbfOD60

PHOTO
TT?ANSisro'R.S

Fig.8-9
D6f006f

8-5
- FURUINIO - - - - - - - - - - - - - - - - -

(2) To fix the 06P0060/06P0061 assembly onto the soundome unit, push the
screw threads into the two slits on the chassis completely, and
fasten the two hex. nuts.

PUSH PANHEAD SCREWS

1b BOTToMS Of SLIT.S
AND FASTEN NUTS.
y
,---------------~
f:t-

o6 poo 6o I 06 P0061
ASSEMBLY

Fig.B-10

8-6
SYMBOL
IC
FUAUNO
~
TYPE
~ta
SPECIFICATIONS

:ll *'
CH -140/ 160 DISPLAY UNIT (Ref. Page S-1, 2)
CODE NO.
:::J-1-'·~ .
CH- 14/16 Electrical Parts List

REMARKS
~
SYMBOL

CR
IC -IJ
TYPE
~ta

PI ODE

TLG124A
SPECIFICATIONS

?\\f-;f-
:ll
t-\\
*'
CODE NO.
:::J-1-'·-IJ

000-135-Ril?
PL 1
REMARKS

• ~

CR TLG124.\ 000-135-882
er< TLG124A ooo-135-a~2
11!11 DSP 06P0131 Board (Ref. Page S-3, 4. 5) C!l TLR124 000-135-8~3
CR TL 1H24 000-135-3~3
CR TLR124 ooo-ns-t~R3
CR TLR124 000-135-8P.3
er< TLR124 000-135-883
06P0131 fl5P CH-14/16 006-533-010 CR TLFU24 000-135-Sil3

CR 10 155227 D lODE ARRAY 000-100-99o

CR 11 155227 D!UDE ARf~AY 000-100-?96
CA'?ACITOR CR 12 155227 DltJDE 1\RF< AY 000-100-996
CR 13 155227 [J! OllE ARfiAY 000-100-996
iH'E132F104Z50 O.lUF 50V 000-104-501 CR 14 155227 DIODE ARRAY 000-100-996
<lf't132F10~ Z5 0 O.lUF 5CV 000-104-501 CR 15 155?27 ~!O;!E Af1i<AY 000-100-996
I< P ~ 1 3 2 F 1 0 4 Z 50 O.liiF 50V 000-104-501 CR 11> Tll\124 000-135-8~3
ECE-AirU221[ 2201JF,25V 000-206-106 CR 17 TLFil 24 000-135-~83
RPE132F104Z50 0.1\JF 50V 000-104-501 CR lll TLR124 ooo-n5-~~3
ECF-A I Fll221E 220UF,25V 000-206-106 CR 19 1S 513 3 000-103-097
liP E 1 >2 F 1 0 4 Z 5 0 O.lUF 50V 000-104-501
CCl-f'lH103KVW O.Ol!JF 50V 000-260-416 CR 20 155133 000-103-097
24 2>' 2502-4 75 <!2 4.71JF 25V 000-2)0-350 CR 21 nrn24 000-135-8R3
CR 22 1SS1~3 000-103-097
10 ECE-A1AU222 Z?OOUF 25V 000-201-705 CR 23 TL'!124 000-1 >5-8°,3
11 RF'f132F104Z50 O.liJF 50V 000-104-501 CR 24 TUil24 000-135-8R3
12 242~:2502-475f'2 4.7UF 25V 000-2~0-350 CR 25 TLR124 000-135-i\~3
13 HPE132Fl01,Z50 O.lUF 50V 000-104-501 (il 26 15 513 3 010-103-097
14 r<Pfl32F104ZSO O.lUF 50V 000-104-501 CR 27 155133 000-103-097
15 [C5Fl(f'10~E 1UF 50V 000-2)2-301 Cf\ u TL'?l24 000-115-~q3
16 EC5F1Cf1~5t liiF 50V 000-232-301 CR 29 TL'<l ?I, 000-135-,'<'l3
17 Rf'E132F104l'50 0.1UF 50V 000-104-501
18 Rf'f132F104Z50 0.1UF 50V 000-104-501 C'< 30 155133 000-103-097
19 RPF132r104Z50 0.1UF 50V 000-104-501 CR 31 TLR124 000-1 35-tl~3
CR 32 Hr1124 000-135-,'383
20 llf'IC 13 2 F 11)1+15 0 O.liJF 50V 000-104-501 33 lSS133 000-103-097
21 fiPF132FlD4750 O.lUF 50V 000-1•)4-501 c ·~ 34 155133 000-103-097
Ct\
22 1lP!:l3?F104Z50 O.liJF 50V 000-104-501 CR 35 1:,5113 000-103-097
23 RPF132FlOt,Z50 O.liJF 50V 000-104-501 CR 36 ozc•Z2. 2 Z E ~J [ f< ooo-110-3q5
24 P,f'f13?F104Z50 O.lUF 50V 000-104-501 CR 37 1SS227 D!OI"lE ARil AY 000-100-996
25 RPF132F104Z50 O.llJF 50V 000-104-501 ('I 38 155227 DIODE ARi\ AY 000-100-996
26 RF'E132F104Z50 0.1UF 50V 000-101,-501 Cfi 39 155133 000-103-097
27 RPf132Fln4Z50 O.liJF 50V 000-104-501
28 242!~2502-475~~2 4.7UF 25V 000-230-350
~9 F<f'E132F104Z50 0.1lJF SOV 000-104-501
JACK ~\\fi:J?

30 rwruzFl04Z50 O.lUF 50V 000-104-501

31 242"12502-475"2 4.7UF 25V 000-210-.150 5 ?LL-4 0 31>0 -770 0 ( '112 > 02S501~-1 000-505-142
32 1lf'E 132F1 04Z 50 O.lUF 50V 000-104-501 HLJ230il-Ol-3010 000-102-049
33 'l PE 1 3 2 F 1 0 4 Z 50 O.lUF 50V 000-104-501 FllCZ -C ?6<;13- OL (6D 000-505-156
34 Rf'F132F104750 0.1UF SOV 000-104-501 :~9F'-511F-1AA-K 13-~-3')09-1 000-100-593
35 RPf132F104Z50 O.l!JF 50V 000-104-501 '' 7P-511 F -1AA-'< 13-3-1~09-1 000-100-591
36 iH' r 1 3 2 F 1 o4 zs o O.lUF 50V 000-104-501 1l1r'-Stl F-1 AA-K 13-3-3~09-1 000-100-592
37 RI' El ) 2 r 1 0 t, Z 5 0 o.1uF 5nv 000-104-501 ['.;,P-5t!F-1AA-K 6P 000-100-534
3~ '<PF132F104Z50 O.lUF SOV 000-104-501 ".SD-5dF-lAA-K 5P OOO-l00-5R2
39 [('l-M1H1031(V\1 O.OlUF 50V 000-260-416
10 tc.3P-5tiF-1.\A-~ 3P 000-100-572
40 [(';-M1H103KV'w O.OliJF 50V 000-260-416
41 RPE132F104Z50 O.lUF 50V 000-104-501
RPF132Fl04Z50 0.1'-JF SOV 000-104-501
'· 2
43 RPF132F104Z50 0 .1'J F 50 V 000-104-501 (rJ IL J1'ru
1,4 I< P f 1 3 2 F 1 0 4 Z ') 0 O.lUF SOV 000-104-501
45 RPE132F104Z50 O.lUF 50V 000-104-501 F•:-c,5- ·so 0?50560 000-730-065
46 ~PF132F104Z50 O.li!F 50V 000-114-501
47 IH' U 3 2 F 1 ~ 4 Z 50 o.lUF 5nv 000-104-501
4~ ECE-~lEUlOOE 10UF 25V 000-201-i\12
49 F:C~-Pl'I1?2JZ 0.0012UF 50V 000-21)2-714 T ,; Ar,s IS Till': ~');.:,":Z.?-

50 EC0-Pllil??JZ n.0012'.JF 50V 000-262-714 2SCH15-Y 000-125-631

51 RPtl32F104Z50 O.lCIF 50V 000-104-501 ?SCU 1 S-Y 000-1?5-631
52 i<f'U32Fl04Z50 O.lUF 50V 000-104-501 2SCH1 S-Y 000-125-631
53 RP [ 13 2 F l>l 4l 50 O.lUF 50V 000-101,-501 25C2655Y 000-126-250
54 r<P!::132F104Z50 O.liJF 50V 000-104-501 2SC1Kl o-Y 000-125-631
55 24 21'1 2502-4 751'2 4.7UF 25V 000-230-350
56 EC i'-~ 1 Hl 03 K V',/ O.Oli_IF 50V 000-260-41f,
57 ECE-AElllOOE lOIJF 25V 000-201-,qlZ
58 RPE132F104Z50 O.lUF 50V 000-104-501 RL5IST0t< T1'J?
59 242''2502-4 75:~2 4.7UF 25V 000-2~0-.350

E:U116TJ102 0.? 5 I< 1':: 000-3 30-801

60 [CO-MHI102KV',J lOOOPF SOY 000-260-415 [I,D-16T J103 0.2511 lOK 000-330-802
61 RF'f13<'F104Z50 O.llJF 50V 000-104-501 EVt,:-'<CGA 01 f\ 2 3 21:. 000-103-630
62 iH' E 1 3 2 F 1 0 4 l 5 0 O.l.IJF SOV 000-104-501 EV'1-f'CGA01R23 2K 000-103-630
(, 3 EC'l-~l:H02KVW lOOOPF 50V 000-260-415 Ef<nnr J102 0.25.< 11( 000-330-,301
64 EC•'-f'1'1102KVW lOOOPF 50V 000-260-415 ERD-16T J332 0.25\i 3. 3K 000-329-045
65 ECE-A1FU470E 471JF 25V 000-201-815 Efi'J-16T J332 o.zs• .3.3K 000-32'1-045
66 ECE-AIFU221E 220UF,25V 000-206-106 [Ril-16TJ47? 0.25w I+. 7K 000-330-812
'>7 ECCi-lllH102KVII 1000PF 50V 000-260-415 t:RD-16TJ472 0. 2 5 ',j 4. 7K 000-330-~12
6~ EC0-''1H102KV'w 1000PF 50V 000-260-415
69 F<PE132Fl04Z50 O.llJF 50V 000-104-501 10 EV'l-MCGAOll\54 50~ 000-103-590
11 fR:J16TJ102 0. 2 5 .• 1K 000-330-801
70 ECE-Alfd100[ lOUF 25V 000-201-812 12 EFID-16T J683 0. 2 5 w 63K 000-.129-071
71 Ri'E132F104Z50 O.lUF 50V 000-104-501 13 ER::JlAT J222 0.25W 2.2K 000-330-809
72 242!~2502-4 750,:2 4.7Uf 25V 000-230-350 14 U'f116T J222 0.25W 2.2K 000-.330-309
73 HPE132F104Z50 O.lUF 50V 000-104-501 15 ERD16T J2?2 o. 2 5 'w 2.2K 000-.330->-,09
74 RPF:132F104Z50 O.lUF 50V 000-104-501 16 FR0-52CHF5111 5 .llK 000-104-1%
75 RPU32F104Z50 0.1UF 50V 000-104-501 17 EVM-i"CGA01~14 1 OK 000-103-632
76 r:f'E132F104Z50 O.lUF 50V 000-104-501 18 ERD-16TJ303 0.25\J 30K 000-329-0<'>.3
77 llPE132F 104 l 50 O.lUF SOV 000-104-501 19 f~016T JlOl 0. 2 5 w lOO 000-329-013
78 [ ( 1i'-''1 Hl 0 2 KVW lOOOPF 50V 000-260-415
79 EC:il-t 1 1'1103KVW 0.01UF 50V ooo-260-41o ;!o EXR-F5r472J 0.1?5w 4. 7r.X4 000-"179-07.3
21 Ef<D16 T J1 02 0.25W 1K 000-3"10-.':01
80 RPE132F104Z50 O.llJF 50V 000-104-501 22 ERD-16T J471 o.25w 4 70 000-3;>9-029
81 E.Clil-}1} H102KV'./ lOOOPF 50V 000-260-415 23 El1fl16TJ101 0.2SW 100 000-329-013
82 RPf132F104Z50 O.llJF 50V 000-104-501 24 EIHJ-16T J471 0.25<1 470 000-329-029
83 RPF132F104Z50 O.liJF 50V 000-104-501 25 EHD16TJ101 0.25W 100 000-3? 1-013
R4 Rf'E13?F104Z50 O.lUF 50V 000-104-501 27 Eflfl-16T J153 0.25>1 15K 01)0-129-059
85 242~2502-t.75M2 4.7UF 25V 000-2>0-350 29 ERD1oT J222 0.? 5 w 2. 2 K 000-3:10-609
86 EC<il-fHH102KV~' lOOOPF 50V 000-260-415
87 ECIV-!~1H103KVW 0.011JF SOV ooo-2'>0-41o 31 Ei\Dl6TJ2?2 o.zsw 2. 2 ~ 000-330-~09
32 EEn6TJ2?2 0.25.1 2.2K OQ0-3)Q-cl09
34 ERD-16T J472 0.25W 4.7K 000-310-012

NOTE:

• •=
 .=-UAUNO CH-14/16 Electrical Parts List
I PL-2

SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS

R
IC -IJ
35
~ ~

ERD-16T J202
M.
0.25\ol 2K
*' :::J-1-"•-tt
000-330-807
• ~

u
IC -it
22
~~

U-rD74HC163C
M.
*' :::J-1-"·-ij-
000-107-445
• ~

R 36 ERD-16TJ132 0.25W 1. 3K 000-329-038 u 23 U-P D7 4 HC0 8 C 000-107-44 7

37 ERIH6T J302 0.25\1 3K 000-329-044 u U-PD74HC74C
"
H 38 ERD-16T J472 0.25W 4. 7K 000-330-812 u
24
25 U-PD74HC04C
000-107-443
000-107-448
R 39 ERD-16T J162 0.25W 1.6K 000-329-040 u 26 U-PD7411Cl63C 000-107-445
u 27 U-PD74HCOOC 000-107-449
R 40 ERD16T J102 0.25\ol lK 000-330-801 u 28 U-PD74HC21C 000-107-450
R 41 Et<O-S2CHF5111 5.11K 000-104-196 u 29 U-PD74HCOOC 000-107-449
R 42 ERO-S2CHF5111 5 .l!K 000-104-196
I~ 43 ERD-16T J241 0. 2511 240 000-329-072 u 30 H'16264LP-15 000-162-358
R 44 EXR-F5E472J 0.1251.1 4. 7KX4 000-379-073 u 31 r11HI27C 251\A-2 5 000-110-145
R 45 ERD16T J101 0.25\ol 100 000-329-013 u 32 T 11 PZ 8 4C 0 OP AP 000-100-690
R 46 ERD-16T J151 0.25\ol 150 000-329-017 u 33 U-P074HC153C 000-107-444
R 47 EVM-MCGAOlf:\14 !OK 000-103-632 u 34 U-P074HC153C 000-107-444
R 48 EKD16TJ102 0.251./ 1K 000-330-801 u 35 U-PD74HC153C 000-107-444
R 49 ERO-S2CHF5111 5.11K 000-104-196 u 36 U-PD74HC153C 000-107-444
u 37 U-Pll41264C-15 000-107-454
R 50 ERD-16T J201 0.25\ol 200 000-329-020 u 38 ~19 7114 EM 000-107-0f\d
R 51 ERD-16T J271 0.25\ol 2 70 000-329-023 u 39 U-PD74HC163C 000-107-445
R 52 ERD-16T J391 0.25\1 390 000-329-027
R 53 ERD-16 T J561 0. 2 5 '..J 51\0 000-329-031 u 40 U-PD74HC163C 000-107-445
R 54 ERD16T J221 0.25\ol 220 000-329-021 u 41 U-PD74HC163C 000-107-445
R 55 EVM-MCGAOE\13 lK 000-103-593 u 42 U-PD74HC74C 000-107-443
R 56 EXB-FSE472J 0.12 5 w 4.7KX4 000-379-073 u 43 UPC45SRC 000-103-520
R 57 EXB-FSE472J 0.125'~ 4. 7K X4 000-37?-073 u 44 U-PD74HC04C 000-107-448
H 58 EXB-FSE222J 0.125,J 2.2KX4 000-379-072 u 45 U-PD74HC08C 000-107-447
R 59 ERD16T J221 0.25\1 220 000-329-021 u 46 U-PD7411C04C 000-107-1+48
u 47 U-PD74'1C32C 000-107-441
R 60 ERD16T J221 o.25w 220 000-329-021 u 48 U-PD74HC32C 000-107-441
R 61 ERD16T J221 0. 2 5 '~ 220 000-329-021 u 49 U-PD74HCO~C 000-107-447
R 62 ERD16T J221 0.25VI 220 000-329-021
R 63 ERD-16T J470 0.2511 47 000-329-005 u so U-PD74HC175C 000-107-451
R 64 ERD-16T J470 0.25\1 47 000-329-005 u 51 U-PD74HC74C 000-107-443
R 65 ERD16T J221 0.2511 220 000-329-021 u 52 SN74LS145tJ 000-163-0RO
R 66 ERD-16T J470 0.25\o/ 47 000-329-005 u 53 Si<74LS14S~; 000-168-0~0
R 67 ERD16T J221 0.2511 220 000-329-021 u 54 U-PD71051C 000-105-729
R 68 ERD-16T J470 0.25W 47 000-329-005 u 5) U-PD71051C 000-105-729
R 69 ERD-16T J470 0.2511 47 000-329-005 u 56 UPD71055C 000-105-731
u 57 ll-PD74HC163C 000-107-445
R 70 ERD-16T J103 0.25\ol !OK 000-330-802 u 58 U-PD74HC163C 000-107-445
R 71 ERD-16T J103 0.25\ol 10K 000-330-802 u 59 U-PD41264C-15 000-107-454
R 72 EXB-F5E4 72J 0.1251.1 4. 7KX4 000-379-073
R 73 ERD-16T J470 0.25\1 47 000-329-005 u 60 TC74HC123P 000-103-095
R 74 ERD-16T J470 o. z·s w 4 7 000-329-005 u 61 T062503P 000-163-096
R 75 ERD16TJ102 0.25\1 lK 000-330-801 u 62 UPC624C 000-100-689
R 76 ERD-16T J303 o.zsw 30K 000-329-01\3 u 1\3 t1A 7416A 02S4b1R-O 000-152-103
R 77 ERD16T J222 o.zsw 2.2K 000-330-809 u 64 ~A7461D 0254621-0 000-152-106
R 78 ERD-16T J332 0.2511 3.3K 000-329-045 u 65 MA7461E 02546?2-0 000-152-107
R 79 ERD16T J222 0.25\o/ z.zK 000-330-309 u 66 M)l953Al 000-106-230
u 67 U-PD74HC139C 000-107-440
R 80 EV)1-MCGA01fl13 lK 000-103-593 u 68 U-PD74HC74C 000-107-443
R 81 EVM-MCGA01fl13 1K 000-103-593 u 69 U-PD741fCU8C 000-107-442
R 82 ERD16T J222 o.zsw 2. ZK 000-330-809
R &3 ERD-16T J332 0. 2 5. 3.3K 000-329-045 'J 70 U-PD7004C 000-107-455
R 84 ERD16T J102 0.2511 lK 000-330-601 u 71 r!PZR4COOPAP 000-100-690
R 85 EXB-FSE472J 0.1251./ 4. 7K X4 000-379-073 u 72 r:H• 2 7C 2 5 6A -2 5 000-110-145
R 86 ERD-16T J103 0.25\1 !OK 000-330-'l02 IJ 73 Ht'621\4LP-15 000-162-358
R 87 ERD16T J102 0.25 w lK 000-330-gol u 74 UP071054C 000-106-626
R 88 ERD16T J222 0.25\1 2.2K 000-330-809 u 7) UP071054C 000-106-626
R 89 ERO-S2CHF5111 5 .llK 000-104-196 u 76 UP011055C 000-105-731
u 77 UP071055C 000-105-731
R 90 ERO-S2CHFS111 5 .llK 000-104-196 u 78 TLPS21-4A 000-135-653
R 91 ERO-S2CHF5111 5 .llK 000-104-196 u 79 TA7222AP 000-163-003
R 92 ERO-S2CHF5111 5 .llK 000-104-196
R 93 ERO-S2CHF5111 5 .llK 000-104-196 u 80 U-PD74HCR6( 000-107-453
R 94 ERO-S2CHFS111 5 .llK 000-104-196 u 81 UI'C35ilC 000-11\1-053
R 95 EXB-FSE472J 0.12511 4. 7KX4 000-379-073 u 32 TLP521-4A 000-135-':$53
R 96 EXB-F5E472J 0.12511 4. 7KX4 000-379-0 73 u 63 U-PD74HCOOC 000-107-449
R 97 EXB-FSE472J 0.12511 4. 7KX4 000-379-073
H 98 EXEI-F5E472J 0.125\o/ 4. 7KX4 000-379-073
R 99 ERD16T J102 0.25\1 lK 000-330-801
CRYSTAL 7 'JJ.?:v
R 10 0 EV~-MCGA01823 2K 000-103-630
R 101 ERD-16 T Jl53 0.25W 151( 000-329-059 y 1 TC0-711SC14.3131R~HZ 000-107-456
R 102 ERD-16T Jl\83 0.25\1 68K 000-329-0 71
R 103 ERD-16T J683 0.25\1 68K 000-329-0 71
R 104 ERD-16T J303 0.25\1 30K 000-329-063
R 105 EXB-F5E472J 0 .125\ol 4. 7KX4 000-379-073

SIIITCH H'H DB UPN 06P0132 (CH-14) /06P0134 (CH-16) Boards

s 1 510-0401 000-106-105 (Ref. Page S-6)

s 2 510-0801 000-106-194
s 3 S!D-0401 000-106-105

PRINTED CIRCUIT !JOAR0/ 0

'J:J~ti\":J

INTEGRATED CIRCUIT Oll~HIJ1'0 A 1 06P0132 UPN CH-14 006-534-040

ObPOI34 Ul'N CH-I G 1)06-SH-160
u 1 UPC78LOS 000-161-120
u 2 U-PD74HC139C 000-107-440
u 3 U-PD74HC32C 000-107-441 DIODE 9"1 ;t- t-"
u 4 U-PD74HC138C 000-107-442
u 5 U-PD74HC74C 000-107-443 CR 1 GL-9PG? 000-UZ-897
u 6 UPD71054C 000-106-626 CR 2 GL-9PR2 000-132-899
u 7 U-PD74HC153C 000-107-444 CR 3 SLP-4 ?RC 000-107-457
u 8 U-PD74HC153C 000-107-444 CR 4 SLP-4 ?ilC 000-107-457
u 9 U-PD74HC153C 000-107-444 CR 5 SLP-478C 000-107-457
u 10 U-PD74HC153C 000-107-444 CR 6 SLP-478( 000-107-457
u 11 U-PD41264C-15 000-107-454 CR 7 SLP-478C 000-107-457
u 12 U-PD74HC153C 000-107-444 CR 8 SLP-478( 000-107-457
u 13 U-PD74HC32C 000-107-441 CR 9 SLP-47~C 000-107-457
u 14 U-PD74HC163C 000-107-445
u 15 M67690 0654605-0 000-107-648 CR 10 SLP-478C 000-107-457
u 16 TC74HC123P 000-103-095
u 17 U-PD74HC153C 000-107-444
u 18 U-PD74HC153C 000-107-444
u 19 U-P074HC153C 000-107-41+4 JACK ;.J"'t'''J?

..
u 20 U-PD74HC153C 000-107-444 J 1 l:l13P-SHF-1AA-K 13P 000-100-597
u 21 U-P074HC163C 000-107-445

NOTE:
:
 FUAUNO CH-14/16 Electrical Parts List
I PL-3

SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
le ~ ~ ~

~ESISTOl 71J?
,.,._
~ :::J-r•~
• ~ IC ~ ~ ~
,.,._ ~ :::J-r•~
• :1j

EXfl-F11'll0 1G 100 000-107-458

mm MIF 06P0136 Board (Ref. Page S-8)

l'X'l-F5E2?1J 220 0 0 0-.579-0 70 (CH-16)

PR I~TED C I FlC Ill T R0 AR D7 • 11::.. ~ t 11"::..

S\i ITCH k('H 06DQ131) ~ 1r CH-160 006-533-740

SclD~A1397·\ 0653~~4-0 000-107-459 C'!-14

SKHCAC037A o.J0-100-6 71
SKHCAC037A 000-100-:l71 CAr>ACJTOR J:Jf"J.,_
SKHCAC037A 000-100-:-.71
SKHCACOHA 000-100-u71 llPEl32F104Z5 0 0 .11JF 50Y 000-104-501
SKHCAC03711 000-100-i;71 ECiol-1' I H4 73KYW 0.047UF SOY 000-260-417
S~f!CAC057A 000-100-0::71 Rf'El32FU4ZSO 0 .1'JF SOY 000-104-S01
5KHCAC037A 000-100-'!71 fCr'-~·1H102KYw' 1000PF SOY OOO-Z60-41S
SKHCAC•B7A 000-100-671 ECF-A1FU330[ ws.o 3 31<\F 2SY 000-201-314
ECE-A1Ev101E ws.o 100'<F 25Y 000-206-10S
10 SKHCAC037t\ 000-100-.\71 ECF-AHU101[ .. 5. 0 lOO~F ?SY 000-206-105
11 St~HCAC037A 000-10J-67l [CE-A1FU10H .:5. 0 10 011F 25Y 000-206-105
12 S~HU.C037A 0 0 0-1 o) 0-Hl
13 SKHCACOHA ooo-10o-:n1

D I O~E ?''1't- t-''

CR O'iAZ5.ll l[;~Ff< 000-104-425

CR 15158h 000-112-795
D lODE ARRAY 000-100-996
mm DPN 06P0133 (CH-14) /06P0135 (CH-16) Boards
Cl<
CR
c~
155227
155227
155227
D !OD[ ARRAY
D !ODE ARRAY
000-100-996
000-100-996
(Ref. Page S-6) 000-100-991)
CH 155227 D I OflE ARRAY

Pf~ I 'JTED C I RC Ill T l1 ;J Ae~ ll7 • 11:;. ~ t 1\":;.

06F'013.~ DP~ ("1-]4 006-534-050 JACK :.t"I''J?

061'0135 DPN 006- 534-J '10

-
CH -16
3)07o2-4 000-504-5R1
)50760-4 000-504-5°.0
9"1:f-t-" f'4P-SHF-lt\A-IC 4P 000-100-573
ll!Ol!E
'l7P-SJIF-1AA-K 13-3-3309-1 000-100-591
C,'l SLP-484C-S1 000-107-460
CR SLP-4ti4C-51 000-107-460
CR SLP-484C-S1 000-107-460
TKM.S!STOK ~5:;.01"!.?-
CR SL 0 -4ii4C-51 ooo-107-4nO
Cll SLP-H:4C-51 000-107-460
SU'- 48 4C- 51 ooo-1o7-4nO 2SC1X15-Y 000-125-631
CR
000-107-460 2SA1015-Y 000-113-041
CR SLP-484(-51
000-107-460 2SU015-Y 000-113-041
CR SLP-484C-51
?SC1R15-Y 000-125-631
2SClR15-Y 000-125-631

JAC<: ~''t"")?

~13P-SHF-1AA-f~ 13P 000-lJ0-5'17 RESIST 01< 'i'1J.,

Ff<CZ-C26S13-0L Zf·P 000-505-156
>kD-?5PJ203 0.25\ol 20K 000-330-383
[ F D- 2 5 P J I, 7 2 0.25\o/ 4. 7K 000-330-373
ll<fl-25rJ51>3 0.25~ 5oK 000-330-399
i'1'J? EV:~-t'CGAO 1 ~ 2 4 200:: COOS0119J 000-103-591
RESIST:Ji~
Ef<D- 2 5 "J 10 3 0. 2 5 ti 10K
1
000-330-35(1
000-107-461 W/SI, EIID-2SPJ103 o.2~w 10K 000-330-3R1
[YH-YrJ3248Fl,l3 1K
[YH-Y:n2qfl13 1K 000-107-41,1 w/S~ EF\D-25PJ10? 0. 2 5 w 1K 000-330-357
000-107-727 E k D- 2 5 P J S 11 0. 2 ~ .• 510 000-330-350
E~G-A1A04SQ1) lK
000-1 117-727 ElW-25fJJ102 0.25~ 1K 000-330-357
[W(i-A1AO 4 S H13 H
CXI<-F9 :n 01 G 100 000-104-140
47 000-379-076 10 Eii::J-25PJA80 0.25\ol 68 000-330-329
EXf\-F5f'470J
100 000-104-140 l1 FI<D-25PJ123 0.25\.1 12K 000-330-3113
EX'l-F9N101G
EX~ -F9!H 01 G 100 000-104-140 12 EI<D-2~PJ103 0. 2 SW 10 K 000-330-381
13 Ef;D-25PJ102 0. 2 5. 1K 000-330-357
14 Eflf\-25PJ103 0. 2 5 >I 10K 000-330-381
15 EI<D-25PJ102 0.2511 1K 000-330-357
H'Jf 16 EI<D-25PJC21 0. 2 5 w 2 20 000-330-341
SWITCH
17 [<lD-25PJ6bO 0. 25 w 6il 000-330-329
18 ERD-25PJn.~O 0.25\o/ 68 000-330-329

- :~-2 0 28N3-3G 000-107-41>2

~~-2028N~-3G 000-107-462
S'<R!! 1C 06S38~S-O 000-107-463

INTE::G~.H[tJ CIRCUIT Oll?tfl]fD

u U-P;l74HC74C 000-107-443
u TC74HC1?3P 000-103-095
\) U-PD74HC%C 000-107-453

mm Connectors (Ref. Page S-1)

(CH-14)

JACK DmJ A 1QA8DSP11 Color Monitor (Ref. Page S-1)

SRCN2Al3-5P OJ0-508-651 (CH-14)

RPC2-12RFl-3P ( 01 J 000-107-468

PidNTE.D CIPCUIT BOARD7° 1I:JHII"::..

PLUG J05?" A1ilA8DSP11 000-107-465 ~/CRT

p H13F'-SHF-AA,1W 'JH HOIJSING 000-505-610

p H13P-SHF-AA,l3P tHI IIOIJSING 000-505-610
p F'lCZ-176 HARNESS 01\54019 000-505-136 /J/P4
r FRC2-176 HAR'JESS 0654019 000-505-136 \oi/P3
p
p
H9P-SHf-AA ,9P
119P-SHF-AA,9D
~H HOIISING
~~ H HOUS WG
000-505-602
000-505-1>02 DmJ Connectors (Ref. Page S-2)
p H5P-SHF-AA,SP NH HOUSING 000-505-598 (CH-16)
p H3P-SHF-~A ,3P NH "'OUSI~G 000-505-596

JACK

SRCN2A13-5P 000-508-651
RPC2-12R;l-3P(01J 000-107-41,8

NOTE:
• :1j:
 FUAUNO CH-14/16 Electrical Parts List
r PL-4
SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
IC ~

PLUG
~ ~

J05?"
M.
*' :J-1-'·~
• '* IC ~ ~ ~ M.
*' :J-1-'•-tt
• '*
FU5[ tl-;l."
p 1 1113P-511F-AA, 13P NH HOUSING 000-505-610 000-549-064
F 1 FG[lO-A SA AC le 5 V 005009.3
p 2 Hl3P-5HF-AA-13P ljfl HOU5 I NG 000-505-610
p 3 F t~C 2-17 o HMHIES 5 0654019 000-505-136 W/P4
p 4 FRC2-176 f'Af(NJ:SS 0654019 000-505-136 W/P3
p 5 1.-430706-0 000-504-268
JACK 01" ~-~:~
p 6 i!9P-5HF-AA,9P ~~ H HOUSING 000-505-&02
p 7 H5P-SfiF-AA,5P NH HOU5I~<G 000-505-598 000-506-504
J .3 ~(5-253-R ('1) 3P
p 11 H3P-5iiF-AAdP fiH HOUSING 000-505-596 oou-100-593
J 4 [l9P-5HF-1AA-K 13-3-3~09-1
p 9 H4P-SHF-AA,4P NH HOUSING 000-505-597 000-100-572
J 7 rl3P-51JF-1AA-K 3P
p 10 H7P-SiiF-AA, 7P NH HOUSING 000-505-600
f' 1l H7P-SHF-AA,7P NH HOUSING 000-505-600

COIL J1to

L 1 02SoOof:>-o, 0. 3'1H 5 V, 2A 000-726-086

L 2 o2s:,o~7-c, 1.6t-!H 1 5V, 0.5A 000-728-0~7
L 3 0 2 s:: 0 3 7-0, l. 6MI! 15V, O.SA 000-723-087
lliJPWR 02P9042 Board (Ref. Page S-10)
L 4 5C-10-100 000-424-9RO
(CH-14) L 5 02 Sf· 0 b ~-o, 9. 7Mii 130V, 0. 2 ~A ooo-728-0So

PI\U,TD C!'<Cli!T f10ARD7" 'i:J ~ *II":J

T~ANSISTOR ~5:>01"7.?-

A 1 FU2P9042 P.,R CH-14 006-53.3-050

1 2SJ595Y 000-121-104
'~
il 2 25(1<'15-Y 000-1?5-631
r~ 3 25(2334(6)-<, 13-3-414~ 000-126-152
:,~
4 2SC2334(6l-(. 13-3-4143 000-126-152
CAPAC I TOJ< ]j]'\\:,..'1-
5 25(2334(1-.)-<: 13-3-4143 000-126-152
"'
!:J: 6 2SCZ334(6l-K 13->-4148 000-126-1~2
c 1 ECE-A1JF221 ??OIIF 63V 000-201-663
I·J 7 2SC2?-34<6l-K 13-3-4148 000-126-152
c 2 EC E-AE'Jl 01 lOOUF 25V 000-201-720
c< 8 25CZ 334 ( 6) -~, 13->-4148 000-126-152
c 3 ECf-AlElJlC 1 lOOUF 25V 000-201-720
c 4 ECE-At.JF221 220UF 63V 000-201-663
12 25(2334(6)-<. 13->-414~ 000-126-152
c 5 ECE-A 1 ru4 71 4 70MF 25V 000-201-723 'ly·" 15 2SC2334(6)->; 13-3-4143 000-126-152
c 6 ECK-[l3A222K:3N 2200PF HV 000-2'i5-755
14 5FOnl'l42 000-135-126
c 7 ECK-D3A222CHi 2200PF lK V 000-255-755
'" 15 25Cl815-Y 000-125-631
c 8 EC K-D 3Al O!K·l t·J 100PF lKV 000-2~5-756
'"
c 9 ECE-A1AF222 2200lJF lOV 000-201-642

c 10 ECE-AlAF?22 2200UF lOV 000-201-642

R[SI ST.)'< j'o(J.,
c 11 RPE113C'1103J50 o. o 1 uF 50 V 000-101-112
c 13 E CEA 50 Z 3 F: 3 3.3UF sov 000-201-345
R 1 EIW-25PJ51 0 0. 2 5 .• 51 000-330-326
c 14 ECE-A1fdl01 10 0 IJF 2~V 000-201-720 f( 2 fF-fl-?5PJ200 0. 2 ~ ;o/ 20 000-330-.316
c 16 ECE-AH'F101 !OOUF 2'iV 000-201-6~1
R .3 ERD-25f>Jl03 0. 2 5 \i !OK 000-330-381
c 17 ECE-A1JF221 220UF 63V 000-201-663 ., 4 f!i;)-25PJ103 0. 2 5 ~ 101( 000-330-381
c 18 Xu2-2A-105K lUF 100V 000-262-371
!\ 5 [t'ii-2~'U101 2w 100 000-371-350
c 19 t·1Cl2-2A-105K 1 UF lOO V 000-21\2-371 r( 6 ERG-?A"J101 2" 100 000-371-350
ll 7 [h:G-2A'IJ1.7l 2\i 470 000-371-357
c 21 [C[-AlCUlOl lOOUF 25V 000-201-720
f< f. ERG-2A•·:J471 2'<1 470 000-371-357
c 22 ECE-AlHIJ"47 0. 4 7 UF 50 V 000-201-736
ii g !<Gf'l 0 2-10 2 1K 000-316-255
c 23 ECE-A1Hu010 !UF 5 ov 000-201-737
c 25 ECEA50Z3R3 3.3UF 50 V 000-201-345
~ 10 Ef<il-2)PJ564 0. 25W 5 60 K 000-330-423
c 27 ECEA5013R3 3.3LIF 50 V 000-201-345
'< 12 2~ D j 103
0:: lW- 0. 2 'i ~ !OK 000-3~0-3'll
c 28 :HJ-2 -2f -10 4'~ 0.1UF 250\iV 000-262-1°.3 .l u u:n-2sr>J1o~ 0. 25" !OK 000-330-381
c 29 r',D2-2A-104 '1 0.1UF lOO V 000-262-369
•l 14 E iW-? 5 P J 1 0 3 0. 2 ~ w !OK 000-3)0-3~1
r< 15 fC(::J-25f'J103 o.25w 10<: 000-330-3.H
c 30 ~~C2-2A-104M 0 .lliF !OOV 000-262-36') ,, 16 [iW-25Dn21 0. 2 5 w 220 000-330-341
c 31 ,'iD 2-2 A-1 0 4 !1 0 .!UF lOO V 000-2n2-369
17 lii11-25PJ2?1 0. 2 5 ·-~ 220 000-330-341
c
c
32
33
ECE-A2EG100S
ECE-A2~S1005
10UF 250V
lOUF 250V
000-104-Zill
000-104-281
"
'( 18 C!:D-25PJ105 0.25. 1M 000-330-429
:( 19 [fW- 2 5 P J4 3 3 0.25 w 4 31( 000-330-396
c 34 ECf-A2EG100S lOUF 250V 000-104-231
c 35 ECEA50Z31n 3 .3UF snv 000-201-345 f( ?0 fi:D-2C,PJ560 0 .25W 56 000-330-327
c 36 ECEA50Z3f0 ) • 3'JF sov 000-201-\45
i< ?1 fkli-1A'UBO lW 33 000-371-226
c 37 FTE!G?22 2200UF 40V 000-21d-011
R 22 [i(C:-1 A~iJ\30 lW 33 000-371-226
c 38 I·WD2-2A-225K ?.2UF,100\IV 000-262-400 !( 23 'OKG-1A'JJ~3:l l'J ~3 000-371-226
c 39 fHJD2-2A-225J( ?.2\JF,lOO.V 000-2!>2-400
24 ERX-1 A':J 4f< 7 HI 4.7 000-371-071
" 25 PU<-1A'JJ4'l7 HI 4.7 000-371-071
c 40 ''-DD2-2A-225K 2.21JF,100WV 000-262-400
" 26 EF\X-1 A'<J 41l7 1\ol 4.7 000-371-071

""
c 41 ECK-F1'1103ZF 0. 01 UF 50 V 000-255-litS
27 [,\rJ-2~PJ132 0.25 w 1. 3K 000-.330-360
c 42 ECK-F1H103ZF O.OlUF 50 V 000-2~5-145
c 43 ECK-D3A101K:lN lOOPF lKV 000-255-756
R 32 Fi<D-25PJ51? 0.25" 5 .lK 000-330-~74
c 44 ECE-A1Cu100 1 OUF 25V 000-201-716 R
R
33
34
[r\::J-2~PJ471
EiW-2~PJ102
0.2'iW
0.25W
470
1K
000-330-349
000-3~0-357
-,
?"1'~- ~ \\
,,R 35
36
E '' !l- Z 5 P J 1 ~ 3
E iW-2 5 P J!O 3
0. 2 ~ ..J
0.25\ol
!OK
!OK
000-330-3Rl
000-330-31\1
DIODE 'l 37 fR[)-25PJ!03 0. 25 w!OK 000-330-3Rl
q 38 l fi:1-25PJ104 o.2~w 10 0 K 000-330-405
CR 1 510SC4~ .1/ACCESSO>lY 000-1>5-363 I'( 39 FIW-Z~P.J30? 0.25\1 3K 000-330-368
CR 2 5DG2Z41 000-130-215
CR 3 SDG2C41 000-131-530 ,., 40 Eh:l-25PJSD0 0.25\i 56 000-330-327
CR 4 151834 000-112-917
ll 41 ERS-1A'd3.50 lW :n 000-371-226
CR 5 1515R!I 000-112-795
R 42 E/\G-1 t, 'd .13 0 1\oi 33 000-371-226
CR 6 151538 000-112-795
R 43 Fr: G-1 A:U33 0 HI 33 000-371-226
CR 8 1515 8 8 000-112-7?5
f< 44 EKX-1A'U4R7 l'.J 4.7 000-371-071
CR 9 1515 8 8 000-112-795
i< 45 ERX-1A,J4R7 1 w 4.7 000-371-071
t' 46 ER X-1 Ar•J 41<7 HI 4.7 000-371-071
CR 10 151g34 000-112-917 000-330-393
fl 47 ERll-25PJ>33 0.25:. 33K
CR 11 1S158!l 000-112-795
I< 49 ERD-25PJ333 0.2 5. 33K 000-330-393
CR 12 1S15ll3 000-112-795
CR 13 6((13 000-130-317 000-330-357
i< 50 ERfl-25PJ102 o .z~w lK
CR 14 F114F 000-132-717
il 53 EfW-25PJ332 0. 2 5 1~ 3. 3K 000-330-369
CR 15 F 114F 000-132-717
R 54 ERD-25PJ33? 0 .25>1 3.3K 000-330-369
CR 16 F 114F 000-132-717
R 55 ER0-25PJ471 0.25 w 470 000-330-349
CR 17 F114F 000-132-717
R 56 fRD-25PJ102 0.25W lK 000-330-357
CR 19 TL'l-102A 000-135-843 57 EkD-25PJ102 0.25\1 1K 000-330-357
R
f< 58 ERG-1A"'J563 56K 1\o/ 000-371-088
CR 20 TLR-102A 000-135-Il43 000-330-373
K 59 ERD-25PJ472 0.25w 4. 7K
CR 21 TLR-102A 000-135-t>43
CR 22 TLR-102A 000-135-843 0.25\1 2.2K 000-330-365
R 60 ERD-25PJ222
CR 23 151588 000-112-795 000-330-373
R 61 ER0-25PJ4 72 0.25\AI 4. 7K
CR 24 151588 000-112-795 000-330-367
R 62 ERD-25PJ272 0. 2 5" 2.7K
CR 25 151588 000-112-795
i< 63 RGP102-102 1K 000-316-255
C'l 26 151588 000-112-795 64 ERD- 2 5 P Jl5 2 1. 5K 000-330-361
I< 0.25"
CR 27 151588 000-112-795 65 ERD-25PJ102 0. 25 .• 1K 000-330-357
R
CR 2R 1515 88 000-112-795 il 66 EHD-25PJ153 O.?SW 15K 000-330-385
CR 29 15lb34 000-112-917 ll 67 ERD-25PJ822 0.25W 8.2K 000-330-379
R 68 ERD-25PJ392 0. 25\1 3.9K 000-330-371
CR 30 HZ9HC2 ZENfR 000-133-142 Erw- 2 5 P J3 o 2 0.251.1 000-330-363
K 6? 3K
CR 31 HZ-7tl Z F~J ER 000-133-155

NOTE:

• ,.:
 .=:-UAUHO CH-14/16 Electrical Parts List
I PL-5
SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
la ~ rl :ta ~
*' ::::J-1-'·-iJ-
• ~ E -iJ- rl :ta ~
*' ::::J-1-'·-iJ-
• '*
I( 70 Ef!D-25PJ563 o.zsw 56K 000-330-399 02P9026 Board (Ref. Page S-11)
- REG
R 71 ERD-25PJ563 o.zsw 56K 000-.330-399 (CH-14)
1\ 72 CRD-25PJ562 0.25\1 5 .6K 000-3~0-375
t< 73 Ef<D-25f'J224 0.25w 2?0K 000-330-413
R 74 ERD-25PJ752 0. 2 5 ·~ 7. 5K 000-3~0-373
R 75 ERD-2 5 f' J273 0.25\o/ 27K 000-330-391 PR I"JTEr.1 CIRCUIT ROARD7° 1 J::..~~i\":;..
ll 76 r:tlD-25PJ332 o.Z5w 3. 3K 000-330-3()9
I< 77 ERD-Z5PJ101 o.25w 100 000-330-333 A 1 02P9026 REG 002-115-610
I< 78 ERD-25PJ752 0.25\1 7. 5K 000-350-378
R 79 Ef'D-25PJ75? 0.251-/ 7. 5K 000-330-378

CAPACITOR Jjf'';;tt-

TRANSFOR':ER ~ 7::..7. c 1 ECfA1HS221 2 ZOUF 50 V 000-201-468

c 2 ECE-A1EF101 100UF 25V 000-201-651
T 1 02S80ll4-0 5V 000-728-0~4 c 3 E(r,-'11 H1 0 4 KZ 0 .1UF 50V 000-2f>0-390
T 2 025t::Oil5-1 130V 000-728-0'l5 c 4 ECEf,1A5101 100UF 10V 000-201-414
T 4 RT-409R-1 000-734-098 c 5 ECE-A11iFS3Fl3 3.3UF sov 000-108-64 7
T 5 RT-409~-1 OOO-n4-098 c 6 902A1003-103J3 0.01UF 100V 000-261+-100
c 7 F:CE-A1HFS3R3 3.3UF 50 V 000-108-64 7
c 8 tCEAlA5330 33UF 10V 000-201-412
c 9 ECf-A1HFS3R3 3.3UF 50 V 000-108-647
INTEGRHED CIRCUIT :..1?1?'1'~1"0
c 10 [ CK-D 3A2 2 2 K1l 2200PF lKV 000-255-750
u 1 UPC791.?H 000-161-180 c 11 ECE-A1JF221 220\JF 63V 000-201-663
u 2 UPC7812H 000-161-142 c 12 fCE-A1EF101 100UF zsv 000-201-651
u 3 !1tJ 37 59'1 000-157-500 c 13 E CK-D 3AZ? 2 Ktl Z?OOPF 1KV 000-255-750
u 4 TLP504A 000-135-(.24 c 14 ECE"-A1JF221 220UF 63V 000-201-663
u 5 TA75902P 000-163-700 c 15 ECF-A1JF470 4 7UF 63V 000-201-662
u 6 UPC78L05 000-161-120 c 16 ECF-A1JF470 4 7UF 63V 000-201-662
c 17 fCE-A1JF470 4 7UF 63V 000-201-662
c 18 MD-2-2E-1QI,I~ 0.1UF 2~0\IV 000-262-133
c 19 >~[)-2 •2 E-10 I, :1 0 .1UF 250WV 000-21)2-183

c 20 FTE1G332 3300UF sov 000-218-012

c ?1 EC~-['3A101K::l 100UF 1KV 000-255-740
mil TM-140F Color Monitor (Ref. Page S-2) c
c
22
23
ECE-A250G33
fCE-A250G33
33UF 250V
33UF 250V
000-200-613
000-200-613
(CH-16) c 24 ECE-A1JF?21 Z?OIJF 63V 000-201-663
c 25 ECE-A1JF?Z1 220UF 63V 000-201-6()3
c 26 ECF: -A 1 JF 4 7 Oil 4 7UF 63V 000-201-661
PRI~TED CIRCUIT ROARflJ••J:;.. ~ltl":;..
c 27 FCt:-A1EF101 100UF 25V 000-201-651
( 2~ ECE-A1EF101 100UF 25V 000-201-651
A 1 TM-140F 025~019-0 000-574-009 '..t/CRT c 29 ECE-AlEFlJl 100UF 25V 000-201-651

c 30 ECD-F4103KZ 0. 01 UF 1000V 000-261-014

c 31 E C~- D3 A1 0 2 Kil 1000PF 000-255-741
c 32 ECE-A1AF222 2200UF 10V 000-201-642
c 33 ECr-A1AF222 2?00UF 10V 000-201-642
c 31, ECE-A1 EF101 100UF 2 5 V 000-201-651
c 35 EC E-A1HFS3R:J 3.3UF 50 V 000-108-647
llmJ Mounting Base (Ref. Page S-2) c
c
36
37
EC[-A1JF?21
ECE-A1FF101
2201./F 63V
1 OOUF 25V
000-201-663
000-201-651
(CH-16) c 36 !1 :J- 2 - 2 r:- 1 0 4 ~ 0 .11/F ?50WV 000-262-1R3
c 39 f".c-z-zr-1u4t·• 0 .1liF 250\IV 000-262-1R3

c 40 M!)-? -2[ -1 (J 4 t·' 0.1UF 250\o/V 000-262-183

FUSE tl-7-" c I, 1 :·I.J-2-2[-104" O.lliF 250\o/V 000-2()2-183
c 4•2 ":l-2-21 -10 4'~ 0.1UF 250\IV 000-2()2-183
F 1 FGBO ?A AC 1 2 5 V 10500'10 000-549-013 c 43 ~~ :J- 2-2 E -10 4 '1 0 .liJF 250WV 000-262-183
c 44 'IG-2-?E-104!1 0.1UF 250WV 000-262-133
c 45 M:J-2-2E-i04H 0 .11/F 250\o/V 000-262-1R3
c 46 ECE-A1HFS3R3 3.3UF 50 V 000-108-647
FILTER 7-flo~- c 47 ECE-A1HFS3R3 3. 3UF 50V 000-108-64 7
( 48 ECF-A1fF101 100UF 25V 000-201-651
FL 1 PLF-2V-15A-O 13 13-~-4217-1 000-533-826 c 49 ECD-M1H104KZ 0.1UF 50 V 000-260-390

c 50 EC(o-M1rll04KZ 0.1UF 50 V 000-260-390

c 51 ECE-A1HFS3R3 3.3liF sov 000-108-647
RESISTOR HJ'?

R 1 ERG-1A"JJ101 1~' 100 000-371-240

D!Ol!E :;1"-(;t- ~\I

CR 1 HZ-11A ZEN ER 000-133-157

S'w ITCH 7.1"'H CR 2 1S1334 000-112-917
CR 3 TLR102 000-135-789
s 1 ST-52t--t" 000-4 70-043 CR 4 151834 000-112-917
CR 5 1515g8 000-112-795
CR 6 151834 000-112-917
CR 7 151834 000-112-917
TERMitJAL (lQARD 9J:JI\''J CR 8 151583 000-112-795
CR 9 1S1334 000-112-917
TB 1 LC-01-30A 6P 1-6 000-101-871
CR 10 1S158il 000-112-795
CR 11 HZ-7ll ZEN ER 000-133-155
CR 13 5DG2Z41 000-1 ~0-215
CR 15 F114F 000-132-717
CR 16 F 114F 000-132-717
CR 17 F 114F 000-132-717
CR 18 F114F 000-132-717
IJim Connector (Ref. Page S-2) CR 19 S105C4t1 \//ACCESSORY 000-135-368

(CH-16) CH 20 5DG2Ud 000-131-530

CR 21 5DG2Z41 000-130-215
CR 22 TLR102 000-135-789
J• 7?'' CR 23 TLR102 000-135-789
PLUG
CR 24 TLR102 000-135-789
p 21P4B ( 'l521P-4 l (F l 4P 000-503-295 CR 25 TLR102 000-135-789
3
CR 26 TLR102 000-135-789
CR 27 TLR102 000-135-789
CR 28 TLR102 000-135-7~9
CR 29 151588 000-112-795

CR 30 151588 000-112-795
CR 31 151588 000-112-795
CR 32 1S1588 000-112-795
CR 33 1S158H 000-112-795
CR 34 1S1588 000-112-795
CR 35 6CC13 000-130-317

NOTE:

• *=
SYMBOL
IC -it
IFUAUNO

JACK
TYPE
~~
SPECIFICATIONS

M.

~\'1''./:7
*' .CH-14/16 Electrical Parts List

REMARKS
~
SYMBOL
IC -it
TYPE
~~

TFANSFOR''ER
SPECIFICATIONS

M. *' .
PL-6

REMARKS
~

350763-4 ?P 000-504-5il9
350759-4 2P 000-504-5il5 02580/+R-1 000-728-048
AA-6, 4P <ll fWli"'D 000-500-314 025804~-1 000-721:$-048
02SR045-2 000-723-045
025R044-0 000-72~-0it4

COl l

RL-1419 1.8t'H 0356125 000-731-416 INTEGRATED CIRCUIT

SC-15-100 15A 000-424-9R5
1059210-1 7MH 000-729-212 M:.l 3759'1 000-157-500
1059203-1 lOOUrl 000-729-203 TLP504A 000-135-824
0258046-l 0.7~H 1.5A 000-7211-046 UPC78M12H 000-161-137
RL-3100 630 UH 0353100 000-733-100 UPC71l12H 000-161-142
UPC78Ml2H 000-161-137
UPC7912H 000-161-180
UPC7905rl 000-161-150
TRM.S!STOR UPC7RL05 000-11\1-120
TA75902P 000-163-700
25B434Y 000-120-~71
25C2334(6l-K 13-3-411>8 000-126-152
25C2334(f>l-K 13-3-4148 000-126-152
25C1870 000-125-M3
2SC1870 000-125-683
25C1il70 000-125-I\R3
25CUI70 000-125-6~3
SFOf\11:\42 000-135-126

CH- 141 TRANSCEIVER UNIT (Ref. Page S-12)

RE 5 I 5 TOil HJ?

[RD-25PJ471 0. ~ 5 ··~ 470 000-330-349

ERD.-25PJ472 o.zsw 4. 7K 000-330-373 EmJ TRX 06P0144 Board (Ref. Page S-13)
ERD-25PJ562 o.zsw 5. 6K 000-330-375
~
ERD-25PJ560 o.z5w 56 000-330-327
ERD-25PJ560 o.zsw 56 000-330-327
PN822H102H 0.5W lK 000-319-400 f'f'l NTEfl C I RC lll T 'lOA RD7° 'J;, ~*I\";,
ERD-25PJ152 0.25\o/ 1. 5K 000-330-361
ERD-25PJ103 0.25:.1 lOK 000-330-3H Ot>P0144-(,0 TRX Cll-14/16 006-534-080 60KHZ
ERD-25PJ103 0.25 w 10K 000-330-381 06PO 11,4-1\0 TRX ('1-14/16 006-530-460 8RKHZ
Of, PO 141·-15 0 T'iX C H-14 I 16 006-530-470 150KHZ
10 ERD-25PJ10~ 0.25\1 10K 000-330-381
11 ERD-?5PJ103 0.25~ lOK 000-330-381
12 ERD-25PJ471 0. 25 w4 70 000-330-349
13 ERD-25PJ51? 0.25W ) .lK 000-330-374 CAPAC IT,)~ J)7":J'1-
14 ERD-25PJ333 0.25\1 33'( 000-330-393
15 ERD-25PJ221 o.25w 220 000-330-341 ECW-H15H392JD 3900PF 1. 5K V 000-2<'>1-972 60KHZ
16 ERD-25PJ221 0. 2 5" 220 000-330-341 EC'o-Hl5H?72JD 2700PF l.SKV 000-107-420 8RKHZ
17 ER0-25PJ104 0. 2 5 w lOOK 000-330-405 EC'~-1115i1152JD 1500PF 1500\IV 000-261-965 150K'IZ
18 ERD-25PJ103 0.25w lOK 000-3~0-381 EOI-H1 'i11>??Jfl 3900PF 1. SK V 000-261-972 60KHZ
19 ERD-25PJ103 0. 2 5 w lOK 000-330-3111 [C'.I-Hl511?72JD 2700PF 1. 5K V 000-107-420 88KHZ
EC'w-1115H1)2JD 1500PF 1500\IV 000-261-965 150KHZ
20 ERD-25PJ103 o.zs• 10K 000-330-381 DD 10 4-69 1\2 21 K 5 OV 220PF 50 V 000-253-760
21 ERD-25PJ102 0.25-..1 1K 000-330-357 Dll104-A9r~ 2 21 K s ov 220PF 50 V 000-253-760
22 ERD-25PJ102 0. 2 5. 1K 000-330-357 DD 10 6-69(115 I; nJr, 0 V 5 6PF 50 V 000-253-774
23 ERX-2ANJ3R3 2W 3.3 000-371-161 DD106-I\9CH560J50V 56PF 50 V 000-2 53-774
24 Ei,G-2ANJ100 ? ',J l 0 000-371-172 FCE-A1CU101 E 1001JF lf>V 000-206-112
25 ERG-2ANJ100 zw 10 000-371-172 ECE-A1CU101[ 100UF 16V 000-206-112
26 ERX-2ANJ3R3 2\o/ 3. 3 000-371-161
27 ER X- 2 A:;nrn 2W 3.3 000-371-161 10 ECf-.AlCUlOlt lOOUF lf>V 000-206-112
28 ERG-2ANJ100 2'.1 10 000-371-172 11 [Cf-A1CU101E lOOUF l6V 000-206-112
29 ERG-2ANJ100 2'.1 10 000-3 71-172 12 f:CE-AlCUlOOE 1 OUF 16V 000-201-672
13 Rf'F132F104Z50 0 .1UF sov 000-104-501
30 ERX-2A~J3R3 2\1 ' . 3 000-371-161 14 RPE132F104Z50 0 .1lJF 50 V 000-104-501
31 ERG-2ANJ221 2 •' ?20 000•371-354 15 RPE132F104ZSO 0.1 UF sov 000-104-501
32 ERG-2ANJ221 211 220 000-371-354 16 f:C!~-r1102JZw lOOOP 000-262-819
33 ERG-2ANJ332 211 3. 3K 000-371-373 17 [Cti-M1H103K v·~ 0.01UF sov 000-260-416
34 ERG-2ANJ510 211 51 000-371-340 18 ECE-AlCUlOOE lOUF 16V 000-201-672
35 ERX-2ANJ331 zw, 330 000-371-203 19 E Cro-M 11110 2 KVW lOOOPF 50 V 000-260-415
36 EflG-2A"<J510 2'.' ~1 000-371-340
37
38
39
ERG-2AI<J)33
ERD-25PJ332
ERD-25PJ152
2W 331(
0.2511 3.3K
0.25>1 1. 5K
000-371-390
000-330-369
000-330-361
20
21
22
2 .~
Rf'E132F10t.Z50
r;PE132F104Z50
ECE-A1CU101E
ECCO-M1Hl03KVII
O.lUF sov
O.lUF 50 V
100\JF 16V
0. 01 UF sov
000-104-501
000-104-501
000-206-112
000-260-416
- "
40 ERD-25PJ152 0.25W 1.5K 000-330-361 24 ECCO-M1H103KVW O.OlUF 50 V 000-260-416
41 ERD-25PJ332 o.z5w 3. 3K 000-330-369 25 ECE-A1CU100[ lOIJF 16V 000-201-672
42 ERD-25PJ33? 0.25W 3.3K 000-330-369 26 ECiil-tHH103KVII 0.01UF ~OV 000-260-416
43 ERD-25PJ332 0.25W 3.3K 000-330-31\9 27 ECw-V1H105JZW 1UF 50 V 000-104-801
44 ERD-25PJ101 0. 2 5"' 100 000-330-333 z.q RPE132F104Z50 0 .lUF 50 V 000-104-501
45 ERD-25PJ332 0.2511 3.3K 000-330-369 29 I~ PE 132 F104ZS 0 0 .1UF 50 V 000-104-501
46 ERD-25PJ152 0.25>1 1. 5K 000-330-361
47 PN ~22H 302V 0.2511 3K 000-319-398 30 ECGl-'HH103KVW O.OlUF 50 V 000-Zf>0-416
48 ERD-25PJ~22 0.25W ~.2K 000-330-379 31 ECE-AlCUlOOE lOUF 16V 000-201-672
49 ERD-25PJ153 0.25W 15K 000-330-3115 32 ECE-A1CU100E lOUF 16V 000-201-672
)3 ECE-A1CU100E 10UF 16V 000-201-672
50 ERD-25PJ?24 0.2511 220K 000-330-413 34 ECE-A1CU100t 1 OUF l~V 000-201-672
51 ERD-25PJ562 0. 2 5 .• 5. 6K 000-330-375 35 ECE-AlCJlOOE 1 OlJF 11\V 000-201-672
52 ERD-25PJ273 o.zsw 27K 000-330-391 36 RPE132F104Z50 0 .1UF 50 V 000-104-501
53 ERD-25PJ752 0.25W 7. 5K 000-330-378 37 RPC132F104ZSO 0 .1UF sov 000-104-501
54 ERD-25PJ152 0.25.1 1. 5K 000-330-361 38 RPE132F104Z50 0 .1UF sov 000-104-501
55 ERD-25PJ102 o.zsw 1K 000-330-357 39 ECQ-M1H333JVW 0.033UF 000-109-526
56 ERD-25PJ563 0.25W 56K 000-330-399
57 ERD-25PJ563 0.2511 56K 000-330-399 40 EO-M1H333JVW 0.033UF 000-109-526
58 ER0-25PJ392 0.25\i 3. 9K 000-330-371 41 ECGl-M1H103KVW O.OlUF 50 V ooo-2r,0-416
59 CRD-25PJ302 0.25W 3K 000-330-:168 42 ECiii-M1H472KVW 4700PF, 50V 000-ZA0-421
43 RPE13ZF104Z50 0.1UF sov 000-104-501
60 ERD-2SPJ102 0.2511 1K 000-330-357 44 RPE132F104Z50 0 .1UF 50 V 000-104-501
61 ERD-2SPJ102 0.25W 11( 000-330-357 45 ECCO-M1H103KVW 0.01UF 50 V 000-21\0-416
62 ERD-25PJ471 0.2511 470 000-330-349 46 ECiii-M1H223KVW 0.02211F 50 V 000-260-414
63 fRD-2SPJ332 0.25;.1 3. 3K 000-330-369 47 ECSF1VE105E 1 UF 25V 000-232-512
64 ERD-25PJ332 0.2511 3. 3K 000-330-31\9 48 EC5F1VE105E lUF 25V 000-232-512
65 ERD-25PJR23 0.2511 82K 000-330-403 49 DD104-691H 71K50V 470PF 50 V 000-253-807

50 RPE132F104ZSO O.lUF sov 000-104-501

51 RPE132F104ZSO 0.1UF 50 V 000-104-501
52 RPE132F104Z50 O.lUF 50V 000-104-501
53 ECiii-P1563JZ 0.056UF 100WV 000-261-116 60KHZ
ECQ-P1393JZ 0.039UF 100\oiV 000-261-815 38KHZ
EC·~-P122>JZ 0.022UF 100WV 000-21\1-832 150KHZ

NOTE:

• •=
 FUAUNO CH- 14/1 6 Electrical Parts List
I PL-7
SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS

c
le -it
54
~ ~

ECW-H10H822JR
M.
O.OOil2UF lOOOV
*' :::J-1-'•-~t

000-259-598 60KHZ
• ~ IC -IJ ~ ~ M. M :::J-t-'·-1}
• ~

ECw-H10H562JR 5600PF ,!OOOV 000-259-582 8RKHZ

ECw-H10H332JR 0.0033UF lOOOV 000-261-962 150KHZ i~E SI S TO I< 71'J?
c 55 ECE-A2DG470S 4 7UF 200V 000-104-282
c 56 ECE-A2DG470S 4 7UF 200V 000-104-282 R 1 EI\D16TJ102 0.2511 lK 000-330-.".01
c 57 ECE-AlCUZZlE 220MF 16V 000-201-673 R 2 PK502H303HO 30K 000-110-002
c 58 ECE-AlCU221E 220MF 16V 000-201-673 K 3 EF:D16T J222 0. 2~ lo/ 2.2K 000-330-K09
c 59 ECE-A1CU221E 220MF 16V 000-201-673 R 4 ERD-l6T J470 0.? 5 .• 47 000-329-005
5 ERD16T J101 o.25w 100 000-329-013
c
c
60
61
24 2t-13 5 02-10 5M2
242M3502-105M2
1UF
1UF
000-230-470
000-230-4 70
'I{ 6 ERD-16T J103 0.25\o/ 10K 000-330-:)02
7 ERD-16T J471 0. 2 5 ..J 470 000-329-029
c
c
62
63
Z42M3502-105M2
ECQ-P1182JU
lUF
1800PF
000-230-470
000-262-822 60KHZ
"
'< 8 ERD-16TJ823 0.2511 82K 000-329-073
ECQ-P1122JZw 1200PF 000-262-820 il8KHZ E!<D16T J302 0.25\1 3K 000-329-044
,{ 10
ECQ-P1751JZw 750PF 000-107-425 150KHZ ERD16TJ101 0. 25 w 100 000-329-013
R 11
c 64 ECQ-MIH473KVW 0.047UF 50V 000-260-417 R 12 ERD-16T J223 0.25\o/ 22K 000-330-:HO
c 65 RPr132F104Z50 0.1UF 5 ov 000-104-501 K 13 EkD16T J222 0.25~ 2.2K 000-330-809
K 14 Ei<D-16T J203 0.251. 20K 000-330-1\08
il 15 Ef<D-16 T J6S 2 0.2511 6. 8K 000-329-052
R 16 ERD-16TJ203 0.25\o/ 20K 000-330-30S
DIODE 7"1'~- ~\\
R 17 ERD-16T J203 0.25\1 20K 000-330-808
K 18 ERD-16TJ103 0.25vl lOK 000-330-802
CR 1 1SS227 DIODE ARRAY 000-100-996 R 19 ERD-16T J822 0.25\o/ il.2K 000-329-054
CR 2 1SS133 000-103-097
CR 3 15S133 000-103-097 I{ 20 ERD-16T J683 0.25W 6>lK 000-329-071
CR 4 1SS133 000-103-097 fl 21 ERD-16T J470 0.25>1 47 000-329-005
CR 5 1SS227 DIODE ARRAY 000-100-996 k 22 EIW-16T J470 0.2501 47 000-329-005
CR 6 1SS227 lJIODE ARRAY 000-100-996 ~ 23 Ef,Dl6T J101 0. 2 SW 100 000-329-013
CR 7 1SS227 DIO[)E ARRAY 000-100-996 R 24 ERD-16TJ100 0.25\o/ 10 000-330-839
CR 8 1S5227 DIODE ARRAY 000-100-996 25 Ef<D-16TJ103 0.2511 lOK 000-3)0-802
CR 9 1SS133 000-103-097 "
R 26 ERD-16T J183 0.2511 18K 000-329-061
000-103-6)2
~ 27 EV"1-MCGA01R14 10K
CR 10 1SS227 DIODE A'<RAY 000-100-996 R 28 EflD-16T J681 0.25W 6P.O 000-330-813
CR 11 1S5227 DIODE ARRAY 000-100-996 R 29 ERD-16TJ223 0.25\1 22K 000-330-1'10
CR 12 1 s 52 2 7 DIODE ARRAY 000-100-996
CR 13 1SS133 000-103-097 I\ 30 EV~1-MCGA01B53 SK ( OOS0119l 000-103-631
CR 14 1SS200 000-104-279 K 31 ERD-16T Jl52 o.25w 1. 5K 000-329-039
CR 15 TLRi24 000-135-3.B R 32 ERD-16T J223 0.25\ol 22K 000-330-810
CR 16 1SS133 000-103-097 k 33 LP1/8 10K JT54 10K 000-104-324
CR 17 1SS133 000-103-097 R 34 ERD16T J101 0 .25w 100 000-329-013
CR 18 TLR124 000-135-8~3 k 35 ERD-16T J103 o.25w lOK 000-330-802
CR 19 RG-2Z 000-134-890 R 36 ERD-16T J103 0.25>1 10K 000-330-802
'< 38 ERD-16TJ103 o.25w !OK 000-330-:302
CR 20 RG-2Z 000-134-<l'IO R 39 ERD-16T J470 0.2511 47 000-329-005
CR 21 RG-2Z 000-134-390
CR 22 RG-2 Z 000-134->l'IO I< 40 ERD-16T J470 0.2511 47 000-329-005
CR 23 TLR124 000-135-8R3 R 41 ERD-16T J223 0.2511 22K 000-330-810
CR 24 TLR124 000-135-1!83 R 42 ERD-16T J470 0.25\o/ 47 000-329-005
CR 25 TLR124 000-135-883 R 43 ERD16T J102 0. 2 5 '..1 lK 000-330-801
CR 26 TLR124 000-135-3~3 R 44 ERD16T J102 0.25;1 1K 000-330-801
CR 27 1SS133 000-103-097 R 45 Ef<D16T J101 0.25\o/ 100 000-329-013
~ 46 ERD-16T J4 70 0.25\o/ 47 000-329-005
1\ 47 LF14HZZF 8.2K 000-373-636
R 48 LF14221F 2 20 000-373-617
FILTER 71'1o?- f{ 49 ERD-l6T J104 0.2511 lOOK 000-330-803

FL 1 BFU455K2 455KHZ 02S3636 000-5'l8-808 H 50 LF14913F 91K 000-109-525

FL 2 flFU455K2 455KHZ 02S363o 000-588-808 Er<D16T J101 0.25\o/ 100 000-329-013
FL 3 SFZ455!33 45 5~HZ 02S3635 000-588-812 "
f{
51
52 EHD16TJ101 0.25W 100 000-329-013
FL 4 SFZ45533 455KHZ 02S3635 000-588-812 R .53 ERD16T J101 0.25>1 100 000-329-013
•< 54 ERD-16TJ103 o.25w 10K 000-330-302
R 55 ERD16T J101 o.25w 100 000-329-013
H 56 EfW-16TJ153 0.25.1 15K 000-329-059 60KHZ
JACK :1"1''1? ERD-16TJ103 0.25W 10K 000-330-802 88KHZ
ERD-16T J752 0.2511 7. 5K 000-329-053 150KHZ
J 1 B7P-SHF-1AA-K 13-3-3809-1 000-100-591 f{ 57 ERD-16T J103 0. 2 511 10K 000-330-802
J 2 B3P-VH 3P 000-505-821 R 58 ERD16T J222 0.2511 2.2K 000-330-1)09
J 3 D I C-149-3P 000-501-900 R 59 ERD-16TJ103 0.25\o/ !OK 000-330-802

R 60 EFW-16T J103 0.25\1 !OK 000-330-802

K 61 EHD-16T J470 0.2511 47 000-329-005
eo IL J {IU t< 62 ERD-16TJ470 0. 2 5 '" 47 000-329-005
R 63 EI<D16T J222 0.2SW 2.2K ooo-:n0-809
L 1 0650506-0 06S0506-0 000-107-416 f>OKHZ K 64 ERD-16T J752 0.25W 7. 5K 000-329-053
06S0510-0 06S0510-0 000-107-421 88KHZ R 65 ERD16T J102 0.2511 lK 000-330-801
06S0514-0 06S0514-0 000-107-426 150KHZ R 66 ERD-16T J103 0.25vl lOK 000-330-802
L 2 06S0506-0 06S0506-0 000-107-416 60KHZ R 67 ERD-16T J471 0.25\1 4 70 000-329-029
06S0510-0 06S0510-0 000-107-421 88KHZ R 68 EiW-16TJ473 0.25\o/ 47K 000-330-314
06S0514-0 06S0514-0 000-107-426 150KHZ H 69 ERD16T J222 0.2511 2.2K 000-330-309
L 3 02S068o-o, 1MH 000-727-680
L 4 02S0680-0, lMH 000-727-680 R 70 ERD-16T J333 0. 25 w 33K 000-329-064
R 71 EI<D16 T J1 01 0.2511 100 000-329-013
R 72 ERD-1bTJ471 0.25\o/ 470 000-329-029
R 73 E!W-16T J471 0.25W 470 000-329-029
PLUG J05?" R 74 Ef<D-16T J103 0.25W !OK 000-330-802
1\ 75 ERD-16T J103 0.25\o/ 10K 000-330-802
p 1 DIC-12/l 000-501-950 R 76 EVM-MCGA01f124 20K (0050119> 000-103-591
fl 77 EIW-16T J332 0. 2 5 w 3.3K 000-329-045 60KHZ
Ef<ll-16T J202 0.25W 2K 000-330-807 88KHZ
ERD16T J102 0.25W lK 000-330-801 150KHZ
TRANSISTOR ~5;,:J"J.7- R 78 ERD-16T J332 0.25\o/ 3.3K 000-329-045 60KHZ
ERD-16T J202 0.25iol 2K 000-330-807 88KHZ
Q 2 2SC1815-Y 000-125-631 ERD16T J102 0.25\oi lK 000-330-i->01 150KHZ
(" 3 2SC1815-Y 000-125-631 R 79 ERD-l6T J153 0.25W 15K 000-329-059
Q 4 2SC1815-Y 000-125-631
Q 5 2SC2333 G-21 FE-614/814 000-126-150 R 80 ERD-16T J151 0.25W 150 000-329-017
Q 6 2SC2333 G-21 FE-614/814 000-126-150 R 81 ERD-16T J151 0.25\o/ 150 000-329-017
Q 7 2SC3833 02S4639-0 000-107-408 R 82 ERD-16T J100 0.251.1 10 000-330-839
Q 8 2SC3833 0254639-0 000-107-408 R 83 ERD-16TJ100 0.25W 10 000-330-139
Q 9 2SC3833 02S4639-0 000-107-408 R 84 ERD-16TJ1RO 0.2Sw 1 000-330-&15
R 85 ERG-1SJ122 1W 1. 2K 000-102-444
Q 10 25(3833 02S4639-0 000-107-408 R 86 ERX-15TJ1RO lW 1 000-371-125
Q 11 2SC3833 02S4639-0 000-107-408 R 87 ERX-15TJ1RO lW 1 000-371-125
@ 12 2SC3833 O?S4639-0 000-107-408 R 88 ERX-15T JlRO 11.1 1 000-371-125
ill 13 2SC3833 02S4639-0 000-107-408 R 89 ERX-1SJ4R7 1\.1 4.7 000-371-731
ill 14 2SC3833 0254639-0 000-107-408
Q 15 2SC3833 02S4639-0 000-107-408 R 90 ERX-1SJ4R7 111 4.7 000-371-781
Ill 16 2SC3833 02S46~9-0 000-107-408 R 91 ERX-1SJ4R7 1W 4.7 000-371-781
R 92 ERX-1SJ4R7 1\J 4.7 000-371-7.~1
R 93 ERX-1SJ4R7 1W 4.7 000-371-781
R 94 ERX-1SJ4R7 1W 4.7 000-371-781
i-l 95 ERX-1SJ4R7 1\.1 4.7 000-371-781
R 96 Ef<X-15J4'H lW 4.7 000-371-7~1

NOTE:

• *=
 FURUNO CH-14/16 Electrical Parts List
I PL-8
SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS

~
IC -1}

97
ll :tt

E~X-1SJ4f<7 1W 4.7
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000-371-781
000-107-410
BIJ PWR 06P0145 Board (Ref. Page 5-14)

H lOO ERX-1SJR47 Hi 0.47 000-107-410

101 Cfi X-1SJR4 7 l\1 0.47
"R 102 ERX-lSJ"'• 7 HI 0.47
000-107-410
000-107-410
PI~ IN TEll CIRCIIIT B0 AR D7 • 'I "J ~ f 1\ ""J

R 103 Er<X-1SJ'l47 111 0.47 000-107-410 A 1 06P0145 PiiP CH-14/H> 006-534-090

R 104 ERX-1SJR47 111 0.47 000-107-410
R 105 Ef<X-1SJfl47 a 0.47 000-107-410
R 106 F:f<X-1SJ!l4 7 111 0.47 000-107-410
R 107 ERX-1SJR47 1W 0. 47 000-107-t.lO CI\PAC !TO!< JJT"Jtt-
R 108 ERX-1SJR4 7 1\J 0.47 000-107-HO
R 109 ERD-16T J470 0.25ioi 47 000-329-005 c 1 t1UD-2-2A-474K 0. 4 7UF 1 oov 000-1011-726
c 2 WlD-2-2A-474K 0. 4 71JF 10 OV 000-108-726
R 110 ERG-2SJ473 2W 47K 000-107-1+11 c 4 [([-AlJF221 220UF 63V 000-~01-663
!l 111 ERG-25Jl02 2'>1 lK 000-102-449 c 5 ECE-AlJF221 2 20UF 63V 000-201-663
R 112 ERG-2SJ102 2\1 lK 000-102-449 c 6 ECE-A1CU101 lOOUF 16V 000-201-712
R 113 EXB-F5F472J 0.125 1.1 4.7KX4 000-379-073 c 7 CCE-AlCF$4 70 4 ?!IF 16V 000-108-727
R 114 ERD16T J101 o.2s• lOO 000-329-013 c 8 ECE-A1CFS4 70 4 7UF loV 000-108-727
R 115 ER0-16T J,<,~3 0.251. oP.K 000-329-071 c 9 ECC-UHFS100 10UF 50 V 000-108-728
R 116 Ef<Dl6T Jl02 0.2Sioi 11< 000-330-301
R 117 ERD-16T J683 0.25.1 6~r. 000-329-071 c 10 I<PE113CH4 7 2 J 50 4700PF 000-101-893
R 118 E'W-16 T J4 72 0.25>1 4. 7K 000-330-'ll2 c 12 FCK-D3A222K'lN 2200PF 1K V 000-255-755
R 119 Eol D16 T J10 2 0.2511 1K 000-3~0-!lOl c 13 ECK.-D3Al01K'l~; 100PF 1KV 000-255-756
c 14 [CF-A1AF22? 2?00UF 10V 000-201-642
R 120 ERD-16T J472 0.2511 4.7K 000-330-ill?. c 15 ECE-A1VFnl 2?0UF 35V 000-103-729
R 121 ERD-16TJ473 0. 2 SW 47K 000-330-!J14 c 16 t:CF-A1VF?21 2?01JF 55 V 000-108-729
R 122 Eh'D-16T J103 0. 2 5 .• lOK 000-330-'l02 c 17 ECE-Alf:F101 100UF 25V 000-201-651
c H ECE-AlEF101 lOOUF 25V 000-201-651
c l ,, ECE-A20::G470S 4 7UF 250V 000-108-730

THERill STOR 'J-:::7.7- c 20 1-!,):)-2-2 ~-1 04 M 0 .1liF 000-105-203

c ?1 ~10D-2-?A-104M 0 .1UF 000-105-203
RT 1 D-33A 000-1~0-625 c 22 2-? A-1 04 ~
'~liD- 0.1lJF 000-105-203
RT 2 D-33A 000-1il0-1'>25 c 23 "!l>D-2-2E-104K 0 .lUF 000-104-392
c 24 CCF:-A1CU4 70 4 7UF l6V 000-201-711
c 25 fCF-AlCUlO 1 100UF 16V 000-201-712
c 2f, [([-AlCU470 4 7UF 16V 000-201-711
VII RI STO'l 1\\\'1 A'J- c 27 f:CE-A1HLI3R3 3.3UF sov 000-201-739
c 28 ECC-A1HU31<3 3. ~lJF sov 000-201-739
RV 1 VR-6 OB 0254625-0 000-1il2-fJ12 c 29 ECC-nHU010 lUF 50 V 000-201-737
R.V 2 VR-6 OB 0254625-0 000-1H2-612

DIOOE ?""(;t- t-"

TRANSFORMER ~5-:Jl.
CR 1 1511>34 000-112-917
T 1 0650507-0 0650507-0 000-107-417 60o<IIZ CR 3 S10SC4 1 1 '.41 AC CF 5SO'lY 000-135-368
0650511-0 Of>SOS11-0 000-107-4?2 38KHZ CR 4 5DG2C41 000-131-530
5UG2Z41 000-130-215
T 2
0650515-0
0250798-0
0650515-0 000-107-427
000-730-148
150Kd7
60KHZ
cCil·~ 5
6 1\ u 4 i~ 000-111-753
0250798-0 000-730-148 :~RKHZ Cfi 7 RU4tJ 000-111-753
0250800-0 000-730-149 150Ko!Z c !~ B 'lU4:J 000-111-753
T 3 06S050'l-O 065050'>-0 000-107-418 60KHZ C:l 9 RU4::J 000-111-753
0650512-0 0650512-0 000-107-4?3 ~RKHZ
0650 516-0 OoS0516-0 000-107-428 150KHZ CR 10 ll06(j 000-1 ~5-904
T 4 0650505-0 01\50505-0 000-107-409 CR 11 Tli?1?4 000-1>5-383
CR 12 TLR1Z4 000-135-883
CR 13 TL'<121, 000-135-883
CR 14 TLf<P4 000-135-383
TERMINAL GOAfiD ?J:,Il\\J CR 16 1552;>7 D lODE ARRAY 000-100-996
CR 17 1552?7 DIODE ARRAY 000-100-996
TB 1 236-410'11-10 0659000-0 000-107-412 Cil 18 155227 D lODE ~RfiAY 000-100-996
TB 2 t'L-40S1'3YF-3P 000-107-413 CR 19 151034 000-112-917

CH 20 155133 000-103-097

INTEGRATED CIRCUIT ;Jl?HIJ1D

u 1 EHM3827W79 0254611 HI-MIC 000-164-259 JACK :;\\~·.:J?

u 2 EHM3826H42 0254612 HI-MIC 000-164-258

u 3 MC 13 50 000-169-454 J 1 r14P-VH 4P 000-505-822
u 4 UPC159C 000-161-032 J 4 'i?P-VH 7P 000-505-825
u 5 UPC159C 000-11'>1-032 J 6 t;3P-Vf\ 3P 000-505-621
u 6 TA75902P 000-1'>3-700
u 7 TA-7320P OOO-lfJ2-900
u 8 UP Cl 59( ooo-lo1-032
u 9 TC0-7115( 456.1KHZ 000-107-407 RELAY lj[J-

u 10 Ik3F02 000-100-638 K 2 5T2-DC12V A•l-202 3 000-454-543

u 11 TC453H9P 000-163-907
u 12 TC4011W>P 000-163-313
u 13 TC453gRp 000-163-907
u 14 TC0-7115( 3.840MHZ 000-107-415 60KHZ COIL J111·
TC0-711SC ~.632·'1HZ 000-107-419 ?~KHZ
TC0-711SC 9.oOOHHZ 1100-107-424 150~HZ L 1 0650519-0 0650519-0 000-108-733
u 15 TC74HC393P 000-100-6116 L 2 0650519-0 0650519-0 000-108-733
u 16 SN-75451n,p 000-167-564 L 3 0650519-0 0650519-0 000-108-733
L 4 0650520-0 06505?0-0 000-108-734

ZCNER DIODE '~It-7"-f:t-~"

Tf\ANS I STOR ~5);'!"7.?-

VR 1 GY-?3 0254624-0 000-132-971

GY-23 0254624-0 000-132-971 2S959SY 000-121-104
VR 2 ·~ 1
VR 3 HZ9C2L ZfNFR 000-1 ~3-241 (,) 2 2SK459 G21 000-103-158
VR 4 15Z5 8 ZEt.CR 000-114-170 (ll 3 2SK459 G21 000-103-158
Q 4 2SK459 G21 000-103-153
w 5 2SK459 G21 000-103-158
Q 7 2SC366GP1-Y 000-123-549
Cf~YSTAL ? IJ l.'JI~

y 1 HC-6/UII 515. OKHZ 0(>53607-0 000-107-414 60KHZ

HC -6/UW 543KHZ FD#-5513 000-490-263 R3KHZ fiE SI STOR ,.1J?
HC-6/U\1 605KHZ SD#-5300-0 000-665-300 150KHZ
R 2 Ef<D-16T JS63 0.2 511 56K 000-329-069
R 3 ERD-16TJ103 0.2511 10K 000-330-802
R 4 ERD16T J222 0.251/ 2.2K 000-330-809
R 5 EV~1-MCGA011314 10K 000-103-632
R 6 ERD-16T J470 0. 2511 47 000-329-005
R 7 ERD-16TJ470 0. 25\o/ 47 000-329-005

NOTE:

• =-=
SYMBOL
~ ~
FUAUNO
TYPE
I! ta
[RD-16T J470
EIW-16T J470
SPECIFICATIONS
M.
0. 2 5 .• 47
0.25W 47
*'
CODE NO.
:J-1-'·~

000-329-005
000-32?-005
CH -14/16 Electrical Parts List

REMARKS

• ~
SYMBOL
~
"""
TYPE
I! ta

s·~ITCH
SPECIFICATIONS

... *'
CODE NO.
:J-1-'•-tt .
PL-9

REMARKS
~

10 [I<G-25J101 2\.' 100 000-371-783 5-332 000-474-217

11 EHG-3SJ102 3\,; lK 000-371-7R5
12 ERG-1SJ101 HI lOO 000-102-41;2
13 ERG-5SJ121 511 120 000-371-7q6
14 fRG-5SJ330 SW 33 000-371-7~7 TU:"'P:AL [JOARD
15 ERG-1SJ4 73 111 47"(. 000-102-446
16 EXll-F5E472J 0.125\1 4.7KX4 000-379-073 TB ,...TiH-2 000-104-297
17 ERD-16TJ471 o.2s• 470 000-329-029
18 EHD-16T J333 0.2511 33K 000-329-01>4
19 EX3-F4V3>2J 000-108-731

21 ERD-16T J332 0.2511 3. 3K 000-329-045

22 EfiD-16TJ24? 0.25W 2.4K 000-329-042
23 fV:1-MCGA01R23 2K 000-103-1>30
24 EHD-16TJ470 0. 2 511 47 000-329-005
26 [RD-16T J471 0. 2 5 \.! 4 71) 000-32?-029
27 ERD16TJ102 0.25\1 1K 000-330-801
28 ERD-16T Jl62 0.2511 1.6K 000-32?-040
29 Ef<D-16T J470 0.25W 47 000-329-005
CH - 142 HULL UNil (Ref. Page S-15)
30 EIW-16T J333 0.25\1 33K 000-329-064
31 Ff!D-16T J473 0.25~ 47K 000-3 30-814
32 EIW-16T J563 0.25.: 56K 000-329-069
33 ERD-16TJ563 0.25'11 56K 000-329-069
34 EllD-50TJl84 0. 5 .• 180K 000-330-111
35
36
ERD16T J562
ERD-16TJ~22
0.25'11 5.6K
0.2501 3. 2K
000-329-050
000-32?-054
IJII DRV 06PO 146 Board (Ref. Page S-16)
37 ERD-16T J153 0.25-.1 15K 000-329-059
38 ERD-16T J3?3 0.25\1 39K 000-329-066
39 EIW-16TJ752 0.25\1 7. 5K 000-329-053 PRirJTED CIRCUIT B 0 ARD7 • 'I;, ~ ~ 1\";,

40 ERD16T JlOl 0.25W lOO 000-329-013 06P0146 D~V CH-14/16 006-532-650

41 EXB-F4V332J 000-1011-731
43 Ef<D-50T J104 0. 5\1 10 OK 000-330-105
44 ERD-l6T J682 0.2511 6.8K 000-329-052
45 ERD-16T J223 0. 2 5 .• 2?K 000-330-.-310 CAPAC JTOK ]jf\\J'1-

RPE132F104Z50 0.11JF 50 V 000-104-501

RPE132F104Z50 0 .lUF sov 000-104-501
Tr~A\SFORMER ~'jj],
I'PE132F104Z50 0 .liJF sov 000-104-501
RPE132F104Z50 0.1UF 50 V 000-104-501'
06S051R-O 06S0518-0 000-lOR-732 RPE132F104Z50 O.lUF 50 V 000-104-501
ECE-BlCU470 4 71JF 16V 000-102-521
ECfl-MlH103KV O.OlUF 50 V 000-260-213
RPE132F104Z50 0.11JF 50 V 000-104-501
INTEGRATED CII~CUIT Oll?t'tiJ1"rJ EC F- A1 H!J01 0 1UF sov 000-201-737
RC6219 0356219 000-104-530 10 RPf132F104Z50 0.1UF sov 000-104-501
RC6220 03SI)220 000-104-531 11 RPE132Fl04Z50 0 .lUF 50 V 000-104-501
UPC7812H 000-161-142 12 RPE132F104Z50 0 .11JF 50 V 000-104-501
UPC7912H 000-1,<,1-HO 13 r~PE132F104Z50 0.1UF 50 V 000-104-501
TA75902? 000-11:>3-700 14 ECE-AlEU4R7 4. nlF 25V 000-201-756
UPC78L05 000-161-120 15 ECQ-M1'-1103KV O.OlUF 50 V 000-260-213
TLP504A 000-135-t>24 16 ECE-AlEU470 4 7l!F 25V 000-201-719
17 ECf-AlEU470 4 7UF 25V 000-201-719
111 ECE-AlHU010 1UF 50 V 000-201-737
1? ECE-A1HU010 1UF 50 V 000-201-737

20 RPF132F104Z50 0 .1UF 50 V 000-104-501

21 ECE-A1HU010 lUF 50V 000-201-737
22 ECE-A111U010 1UF SOV 000-201-737
E Parts on Chassis (Ref. Page S-12) 23 ECF-AlHJOlO 1UF 50 V 000-201-737
24 E Cfi-M 1 H?7~K V 2700PF 50 V 000-260-206
?5 ECQ-MlH272KV 2700PF 50 V 000-260-206
26 EC~-~HH272KV 2700PF 50 V 000-260-206
27 FCQ-M1H272KV 2700PF 50 V 000-260-206
CAPACITOR JJT\\J'f- 2~ ECE-A1HU010 1UF 50 V 000-201-737
29 RPE132F104Z50 0.1UF 50 V 000-104-501
GW160L<iSN4 70 OC 4 70 OUF .t60V 000-207-500
30 EC Q-t'lH2 72 K V 2700PF ~QV 000-260-206
MDD-2-2E-105K 1UF 250V 000-105-201
MDD-2-2E-1051: lliF 250V 000-105-201 31 tCC)-~HH272KV 2700PF 50 V 000-26'0-206
HDD-2-2E-105K liiF 250V 000-105-201 32 fCIV-t11H272KV 2700PF sov 000-260-206
33 ECQ-Ml11272KV 2700PF sov 000-260-206
34 E ([~-M 1 Y 2 72 KV 2700PF 50 V 000-260-206
35 ECf·l-M1H272KV 2700PF 50 V 000-260-206
FUSE 36 [((i)-M1H272KV 2700PF 50 V 000-260-206
37 ECQ-M1H272KV 2700PF 50 V 000-2'>0-206
FGBO-A SA Act25V 0050093 000-549-064 38 ECQ-tHH272KV 2700PF 50 V 000-260-206

FILTER DIOL>E 7"1"t- ~"

FL PLF-2V-5RA-501 0255021-0 CR 1S158R 000-112-795

CR 151588 000-112-795
CR TLR124 000-135-8113
CR TLR124 000-135-883
PLUG CR TLR124 000-135-883
CR 1S15R8 000-112-795
H7P-SHF-AA,7P NH HOUSING 000-505-600 HOUSING CR 1S1588 000-112-795
LHF-OOlT-0.8'35 000-505-504 CONTACT CR TLR124 000-135-883
VHR-3N 000-505-886 HOUSING CR TLR124 000-135-883
f\VH-21 T-P1.1 000-100-049 COIH ACT
VHR-4N 000-505-887 HOUSING CR 10 TLR124 0 0 0-13 5-8 8 3
BVH-21 T-P1.1 000-100-049 CONTACT CR 11 TLR124 000-135-883
VHR-7N 000-505-891 HOUSING CR 12 TLR124 000-135-883
l:lVH-21 T-P1.1 000-100-049 CONTACT CR 13 TLR124 000-135-883
VHR-3N 000-505-3% HOUSING CR 14 TLR124 000-135-8R3
BVH-21T-P1.1 000-100-049 CONTACT CR 15 TLR124 000-135-883
CR 16 TLR124 000-135-883
CR 17 1S1588 000-112-795
CR 18 151588 000-112-795
RESISTOR CR 19 TLR124 000-135-8R3

ERF-20HMJ4 70 2011 4 7 000-104-292 CR 20 TLR124 000-135-883

ERF-20HMJ242 20\1 2.4K 000-104-293 CR 21 DAN401 DIODE ARRAY 000-132-498
111 47 000-371-228 CR 22 DAN401 DIODE ARRAY 000-132-498

.
RfG-1ANJ470
CR 23 DAP4 01 DIODE ARK AY 000-132-499
CR 24 DAP401 DIODE ARRAY 000-132-499
CR 25 1S1588 000-112-795

NOTE:
,.:
SYMBOL

u;
C'<
CR
IC
IFUAUHO
~

26
27
211
TYPE
~ ~

151536
1515~6
1 S1>~<;
SPECIFICATIONS
~
*'
CODE NO.
:::J-1-'·-IJ
000-112-795
000-112-795
000-112-795
CH-14/16 Electrical Parts List

REMARKS

• ~
SYMBOL
IC ~

10
11
TYPE
~ ~

T[)(,25001'
Tl.>625Qr,;>
SPECIFICATIONS

~ *'
CODE NO.
I
:::J-1-'·-IJ

000-163-099
000-163-099
.
PL-10

REMARKS
~

CR 29 1S15S8 000-112-795 12 P;P1:3713 000-161-541

13 p·:·:~713 000-161-541
14 TLP521-4G'• 000-135-866
15 TLP:OZl-1-.:i'l 000-135-86R.
FUSC tl-l-"

F-7142 lA ~C 12 5 V 000-547-056

EJII POW 06P0147 Board (Ref. Page S-15)

JACK :.."1''1?

Ff~C2 -C4 0 SU-OL 000-505-163

17Df;25PA-J4 000-504-137
r'.5P-SHF-1AA-K 3P 000-100-572 CH-14/16 006-534-100
06P0147 P~R
'l8P-SI1F-1AA-K 13-3-380Y-1 000-100-592
IJ 10 P-SHF -lA A-'( 13-3-3809-1 000-100-594

CAPAC ITUR
T'\A•·iSISTOR ~?;,;.."?,?-
ECE-P1FS3R3 3.3UF 25V 000-203-307
25[l105?A 000-128-062
2S0105?A 000-12il-062
2Si'1052A 000-128-062
2SD1052A 000-128-062
JACK "" ~ '1?
2SIH05?A 000-128-062 ;16P-Si:F-1AA-K 6P 000-lOU-584
2snos2A 000-12~-062
f',:~ F'- Sl1 F -1 A A- K 13-3-3809-1 000-100-592
25Dl052A OOU-123-01)2
2SD1052A 000-126-062
2SC366GTt-<-Y 000-123-549
I-5~;J";I,'J-

zsf;6R:~-a 000-121-225
RES! STOI~

Et<0-25PJ?24
EI<D-25PJ103
71' J?

0.25w' 220K
0.25~ 1 Of~
000-330-413
000-330-3~1
2Srl6t:t>-O
2Sfl6Pi:-o
2Sii6£~-o
000-121-2?5
000-121-225
000-121-225
-"
25[<(,83-0 000-121-225
~RD-25PJ103 u .25" lOK 000-330-3H
UD-25PJ102 0. 2 5 w lK 000-330-357
EiHl-25PJ56? 0.251o/ 5. 6K 000-310-375
ERD-25PJ102 0.25lol 1K 000-330-357 l:fS IS T'li< f1'J?
C:Rrl-25f'J103 o.25w !OK ooo-33u-3Rl
CrW-25PJl 0 3 0.25\J !OK OJ0-330-Bl E!Ul-25PJ202 0.25..1 2K 000-330-364
ERf1-25PJ333 0.25111 33K 000-330-393 tr;rl-25PJ202 0. 25>' 2K 000-330-364
ERD-2)1'J202 0. 2 5. 2K 000-330-364
10 EP."-25fJJ123 0.25w 1?r- ooo -.no- 3R3 For,- 2 5 r J 2 oi' 0.25w 2K 000-330-364
11 ECI0-25PJ102 0.25>1 lK 000-330-357, r ,, D- 2' r J 1 o1 0. 2 5. 100 000-330-333
1? E!'<il-25PJ392 0. 2 5 w 3. 9K 000-330-371' EI<D-25PJ?02 0.25• 2K 000-330-3f>4
13 Lf~:J- 2 5 p J22 4 o.25w 2 2 OK 000-330-413 r~rW-50T J102 0. 5\.1 lK 000-3,0-057
14 FfW-25PJS22 0.25W ·3. 2K 000-330-379 EfW-25PJ202 0. 2 5 w 2K 000-330-364
15 E>W-25PJ.~?? 0. 2 5 ..J ~. 2 K 000-330-379 Elill-50TJ102 0. 5 \ol H 000-330-057
16 FX~-T44272J 7. 7K 000-37~-~01
17 EfW-2 5 P Jl23 0.25\o/ 12K 000-330-393
18 [I\:J-2SPJ102 0.25\o/ 11( 000-330-357
19 fi<r"J- 25 PJ10? o.25w lK 000-330-357

20 EX~.-P£8-473J 4 7K 000-378-499 TA7e>L020AP 000-163-612

21 EXr.-T44272J 2. 7K 000-3 7.3-601
2? Ef\ D- 2 5 P J 10? 0.25• lK 000-330-357
?5 F.iW-25PJ102 0.2511 1K 000-330-357
24 fi<:l- 2 ~ p J 10 2 0.25>1 lK 000-330-357
25 Ei:0-25f'J562 0.25\o/ 5. (,I( 000-330-375
26 E Xfi-P>\5-1 0 3J 0.125\J 10K X 5 000-37!>-410
27
28
EkD-25PJ473
Er\D-25PJS62
0.25\J 47<
0. 2 5 ',o/ 5. 6K
000-330-5'17
000-330-375
lDS 06P0149 Board (Ref. Page S-15)
29 EIW-25f'J47? 0.25\o/ 4. 11( 000-330-373

30 ER:1-25PJ472 o.?S..J 4.7K 000-330-373

31 EXR-P~;?.-562J 5. 6~ 000-107-433
32 UW-25PJ562 0. 2 5. 5.61( 000-330-375 06?0149 '-:ATCI!ING (11-14/16 006-532-620
ERD-25PJ332 0. 2 5 ·~ 3. 31( 000-330-369

-
33
34 ti<D-25PJ472 0.25W 4. 71( 000-330-373
35 fRil-25PJ4 72 0. ~ 5 w 4. 7'( 000-330-373
36 ERD-25PJ472 0.25\1 4. 7K oao-330-373
JACK
"
37 EXB-P8R-473J 4 7K 000-371!-499
38 Ef<D-25PJ473 0.25\o! 4 7K 000-330-397 000-505-343
'>5PS-VH
39 FRD-25PJ33? 0.25\1 ~.3K 000-330-369

40 ERD-25PJ102 0.25>1 1K 000-3.~0-351

41 [Rf:l-25PJ102 0.25W H 000-330-357
T[i<MJ!,AL C!OARD
42 ERD-25PJ102 0.25:0 1K 000-3~0-357
43 El\'l-25PJ102 0. 2 5 ·..J 1K 000-330-357 ML-40Slc.lYF-3P 000-107-413
000-D0-357 To
44 ERD-25PJ102 0.25\o/ 1K
45 ERD-25f'Jl02 0.25W lK 000-330-357
46 ERI1-2SPJ102 0.25W 1K 000-330-357
47 EIW-25PJ102 o.?5w lK 000-330-357
48 ERD-25PJ102 o.z5• 1K 000-330-357
49 EkD-25PJ473 0.25\1 47K 000-3)0-397

50 E!~G-2SJ1?1P 120 000-375-463

51 EkG-2SJ331P 330 000-375-468 E Relay Fixing Plate (Ref. Page S-15)
52 [i\D-2 5 p J4 70 0.25\o! 47 000-330-325
53 ERD-25PJ470 0.25W 47 000-330-525
54 ERI1-25PJ470 0.25>1 47 000-330-325
55 ERD-25PJ470 0.25W 47 000-330-325 CAPACITOR J:::i1"j+J-
56 tliD-2SPJ470 0.25\ol 47 000-330-325
MDD2-2A-22SK 2.2UF,JOO\IV 000-262-400
MDD2-2A-225K 2.21JF,JOO\IV 000-262-400
ECK-F1H103ZF O.OlUF 50 V 000-255-145
INTEGRATFD CIRCUIT ;Jl?Hh1'D ECK-F1Hl03ZF 0.01UF SOV 000-255-145
Mi.lD2-2A-225K 2. 2UF ,JOOwV 000-262-400
u UPC781511 000-161-143
u TD62504P 000-163-097
u TC4584!JP 000-103-27 5
u TC4009RP 000-163-243 rl!ODE 9"1't-r"
u TC4011 lP 1 000-1A3-245
u TA7555P 000-11)3-007 CR GU-3SY 000-132-465
u TC452SRP 000-163-293 CR U06C 000-135-901
u TC4584llP 000-103-273
u TC4009flP 000-163-243
NOTE:

• ,.:
 SYMBOL
le
FU~UNO

-it

FUSL
TYPE
!!~
SPECIFICATIONS

tl-71"
M. *' .CH- 14/1 6

REMARKS
~
El~tctrical

SYMBOL
le -it
Parts List

TYPE
~~.~
SPECIFICATIONS

M. *'
I
.
PL-11

REMARKS
~

IIIIMG*i4i•ii@tle!Mii (Ref. Page S-17)

FG'lO-A SA AC125V OOSOO?~ OQ0-549-064
FG90-A 3A AC125V 0050093 000-549-063

1111 4B2 06P0148 Boards (Ref. Page S-17)

JACK

~LR-09 000-505-776 HOUSING P:< P<T[il Clf<CU!T f\OAR[IJ"'J:J~tl\":;

SLF-OlT-1.3 000-505-3?4 CO~T-CT
I·IL R- 0 3 000-505-773 HOUS I "JG 06P014', TILT '>IG))Al Cl<-14/16 006-532-690
SLF-01 T-1. 3 000-505~3?4 CO"JHCT
MLR- On 000-505-775 HOUSI~G
SL'-1-41 T-1. 3 000-505-502 CONTACT
JACK :J" ~·~?

P.3P-SHF-1AA-K 3P 000-100-572
RELAY 'Jli-

HP4-0C24V A",JS242 4T,OC24V,63~A 000-454-545

fl[S! STO,< 71J?

fr:D-25PJ102 0. 2 'i,.; 1 K 000-330-357

RES! STD'< 71J? fRD-25PJ393 0. 2 'i ·~ .~9K ooo-:no-395
Ef\D-?5f'J15? 0.251< 1. 5K 000-3)0-361
E~X-?A~J?RO zw 2 000-371-156
FRX-2A>jJ2RO 2>J 2 000-371-156
ERF-20HLJ3?0 20~ 39 000-107-4)2
ERF-20HLJ270 2 0<1 27 000-31.3-402 I:<nGfiATED CIRCUIT

(J~;-1102-SF 000-1)4-101

SWITCH H'H

s- 30.1 000-474-215

TER~~ I NAL BOMW ?J=...I\"J IDIJ 06P0061 Board (Ref. Page S-17)

TB G02-4P 000-536-211

pr<[t<T[D CIRCUIT 1:\'lAfWJ"'J:JHI\":J

06P0061, PHOTU Tq CH-l2/12A/14/16 006-577-170

D lODE 51"11-~"
ID'IiJ Parts on Chassis (Ref. Page S-15)
TL'<-104 000-1 )5-782
TL 'l-104 000-1\5-782
TL~<-104 000-135-782
Tlt!-104 000-1 )5-7~2
MOTOR t-?- TLt:-101, 000-1 ~5-782

Dt~60D2n-1 6054007 0 0 0-101-866

JACK

JACK :J"V"J'J ~3P-SHF~1 A/1-K 3P 000-100-572

t~LP-02 000-505-750 HOUSING

LLF-41T-1.3 000-~05-496 CO~;TACT
'T1J?

Efdl-50T J152 0.511 1.5K 000-3~0-061

RELAY 'Jli- Ei<D-50T J152 0 .5'.~ 1. SK 000-330-061

UD-50T J152 0. 5:.1 1. 'iK 000-330-061
!lZ-10GW22-1P, 000-472-U70 Ef<O-SOT J152 0. 5 W l. SK 000-330-061
DZ-10Gw22-H, 000-4 72-070 EIW-SOT J152 0.5W 1.5K 000-330-061

PLUG JO!j?\\

I'LP-09 000-505-756
00 0-5 os- 393
IIOUS I NG
CONTACT
II!IJ 06P0060 Board (Ref. Page S-17)
SLF-01T-1.3
MLP-03 000-5 05-753 HOJS!'IG
SLF-01 T-1. 3 000-5 05-393 CO:.JT~CT
~LP-06 000-505-755 HOUSING P ll H; T t [) C I RC U I T "J A11 Q 7 • 'J:; ~ t 1\":;
SLF-41T-1.3 000-505-503 CONTACT
fiLR-02 000-505-770 !IOUS I '.iG 06P0060, L[Ll (H-12/12A/14/16 006-577-180
LUI-41 T-1. 3 000-505-497 CO.~T t,( T
H3P-SHF-AA,3P NH HOUSING 000-505-596
H6P-SHF-AA, 6P NH HOUSING 000-505-599
IIE:P-SHF-AA,RP NH HOUSING ooo-so5-6n CAPACITOR JJT"J'1-
H8P-SHF-AA,'lP >.JH IIOlJS I I~G 000-505-601
EC'l-1"11i473KV 0.0471JF 50 V 000-21:>0-221
ECQ-~1H4 7 3KV 0.047!JF 50 V 000-260-221
r:crl-nH473KV 0.047UF sov 000-260-221
t C Q- ~H H4 7 3 KV 0.047~JF 50 V 000-260-221
f. C ''- :11 H4 7 3 KV 0.047UF 5 OV 000-260-221

JACK ~''\'"}'}

f\3P-SHF-1AA-K 3P 000-100-572
B7P-SHF-1AA-K 13-3-3809-1 000-100-591

TRANSISTOR ~5:J:J"ll?-

TP5605 000-l\5-~88
TP5605 000-1)5-888
000-135-8R3

.
TPS605
TPS605 000-135-8R8
TPSoOS 000-135-888

NOTE:
,.:
 FUAUNO CH-14/16 Electrical Parts List
I PL-12

• ,. • ,.
SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
le ~ 1!1. .fa M. le ~ I! .fa :::1-l-"•-~t-
*' :::1-1-"·~ M.
*'
RESISTOR HJ?

fl 1 ERD-50TJ152 0.5\J 1. 5K 000-3~0-061

R 2 ERD-2~PJ102 0.25\J 1K 000-330-.357
K 3 ERD-50TJ152 0.5\J 1. 5K 000-.330-061
K 4 ERD-25PJ102 0.25\J 1K 000-330-3~7
f~ 5 ERD-50T J152 0.5\J 1. 5K 000-330-061
6 ERD-25PJ102 0. 2511 1K 000-330-357
"
R
R
7
8
ERD-50T J152
EkD-25PJ102
0. 511 1. 5K
0.25\J 11<
000-330-061
000-330-357
K 9 ERD-50T J152 0. 511 1. 5K 000-330-061

k 10 ERD-25PJ102 0.25\J lK 000-330-357

IIDil Parts on Chassis (Ref. Page S -17)

MOTOR t-?-

~ 1 PXB44H-03A-C35 06S4208 000-107-R17

[l 2 P Xr14 4H-O 3A-C3 5 065420~ 000-107-817

JACK :.."t"J?

J 1 MC-2R'1, 28P 000-500-015

PLUG J• 5?"

p 2 SMR-06 V-1\ 000-505-373 HOUSING

SYM-OOl T-O .6 000-505-.360 CO'H•\CT
p 3 Sl1R-06V-B 000-505-373 HOUSlNG
SYM-OOlT-0.6 000-505-360 CO'nACT
p 4 H3P-SHF-AA,3P NH HOUSING 000-505-596
p 5 H3P-SHF-AA .3P NH HOUSING 000-505-596
p 6 H8P-SHF-.AA,8P NH HOUSING 000-505-1,01
p 7 H3P-SHF-AA.3P NH HOUSING 000-505-596

TRANSFORMER ~';j;l.

T 1 06S0521-0 000-10~-369 60KHl

06S0522-0 000-108-R70 ~' ~ KHZ
0650523-0 000-103-01 15uKHZ

TRANSDIJCER ;..;,~"?01

XD 1 CH-1422,60 CH-14/16 006-5>3-250 oOKHZ

CH-1422-88 CH-14/16 006-533-570 ~RK'iZ
CH-1422-150 CH-14/16 006-533-5RO 150KHZ

NOTE:
• *=

'.
SYMBOL
FUAUNO
li! -IJ
TYPE
~~
SPECIFICATIONS

~ *'
CODE NO.
::J-~··-ij- .CH- 14/16 Electrical Parts List

REMARKS
~
SYMBOL
li! -it
TYPE
~~
SPECIFICATIONS

~ *' .
PL-13

REMARKS
~

CH 143 REMOTE CONTROL (Option) Wltlieil§iiliji·$81 (Option)

rmll REM 06P0137 Board (Ref. Page S-19) mJI VDO 06P0138 Board (Ref. Page S-18)

PRINTED CIRCUIT ROAflD7"'J:JHr\":J PRINTED CIRCUIT BOARD7" 1 J:J~l'I\":J

06P0137 ,RE~ CH-14/lf> 006-532-000 06P0133 VIDEO CH-14/16 006-533-950

PLUG JD7?" CAPAC !TOR :J:J7''J.,_

RPC2-12P-3S 000-107-466 ECQ-M1H152KVW 1500PF sov 000-260-420

fCE-A1EU220F ?ZUF 25V 000-201-813
fCE-AHU?ZOE 22\JF 25V 000-201-813
ECf-A1EU220E 22\JF 25V 000-201-813
RESISTOK 71'J? ECQ-H1H103KVW 0.01UF 50 V 000-260-416
D[) 1 0 4-6 9rl1 01 K50 V 100PF 50 V 000-253-758
EXR-F9N101G 100 000-104-140 ECf>-fH/11 0 2K Vw 1000PF 50 V 000-260-415
EX B-F9fl1 01 G lOO 000-104-140 ECQ-M1H105KVW 0.01UF 50 V 000-260-416
ECE-AlEU220F 2 2UF 25V 000-201-813

10 RPU32F104Z50 0.1UF 50 V 000-104-501

S~JTCH H'H 11 Rf'E132F104Z50 0 .1UF 50 V 000-104-501
12 RPE132F104Z50 0.1UF 50 V 000-104-501
SKHCADA 000-4 74-750 13 fCf-A1EU220E 22UF 25V 000-201-813
SKHCi\DA 000-474-750
SKHCADA 000-4 74-750
SKHCADA 000-4 74-750
SKHCADA 000-474-750 JACK ,:,\\t'IJ?
SKHCADA 000-4 74-750
SKHCADA 000-474-750 '),~P-SHF-1AA-K 13-3-3809-1 000-100-592
SKHCADA 000-4 74-750 S-l0 3096 000-100-924
SKHCADA 000-4 74-750

10 SKHCADA 000-474-750
11 SKHCADA 000-474-750 TRA~iS I STOR ~"i:J'-'"1-?-

2SC1R15-Y 000-125-631

RES! ST')Il 5'1"J?

FRD-25PJ102 0.2511 1K 000-330-357

FfW-25DJ102 0. 2 5. 10:: 000-330-357
['W-2 5PJ1 U2 0.25.1 lK 000-330-357
EIW-25PJ122 0.25\o/ 1. 20:: 000-330-359
FFW-25PJ122 0.25w 1. 20:: 000-330-359
ERD-25PJ122 0.25\ol 1. 2K 000-330-359
ERD-25PJ102 0.25:.1 1K 000-330-357
EIW-25PJ102 0.25W lK 000-330-357
ERD-25PJ392 o.25w 3.9K 000-330-371

10 EIW-25PJ222 0.25w 2. 2 K 000-330-365

11 ERD-25PJ102 0.25>1 1K 000-330-357
12 EI<D-25PJ103 o.25il 10K 000-330-381
13 EV'1-~CGA01'l24 201( (0050119) 000-103-591
14 ERD-25Pn33 0.25\.1 3 3K 000-3>0-393
15 ERD-25TJ750 0.25'ool 75 000-3)0-330
16 f'<D-25PJ471 0.25W 470 000-330-349
17 E'in-25PJ472 0.25\o/ 4. 7K 000-330-373
1>l EiU1-25PJ223 (). 2 5 rl 22K 000-3~0-389

I •HCGf<A ED C ncu IT

~'C1377P 000-100-847

Ill Connector (Ref. Page S-1/S-2)

PLUG

H8P-SHF-AA,RP NH HOUSING 000-505-601

H8f'-SHF-AAdP NH HOUSING 000-505-601

NOTE:

• *=
 Fuau•o PL-14

DATE 6115/87
MAINTENA~CE PARTS LIST NO.M1tvA3D
FOi~ AHJA8DSP11 12 INCH COLOR ~10"liTOR

*1:DEPOT ~AINTENA~CE PARTS FOR 10 SETS IN 2 YEARS

*2 : S H I P fl 0 f~ N[ K IJ ~~ t~ I NG P AR T S F 0 R 1 SET I N 2 YE A R S

(vU ANT I TY
CODE NO. tJAt1E OF PARTS TYPE SPECIFICATIONS *1 *2 REr~<\RKS

000-110-261 CRT ASSE~~BL Y V£3270AER22T-J WITH DEF. COIL 1

000-110-274 TRANSISTOR *25C3179Y~' VS25C3179XX-l 1

000-110-275 TR.ANSISTOR ~<25[)868>:< VS2SD868-XX1F 1

000-110-272 IC RH-IX0137CEZZ 1 !Cl

0 0 0-110-273 I C RH-IX0065CEZZ 1 IC2

000-110-276 THYRISTOf~ ~<S6321F>:< VHSS6321FLC6A 1

000-110-284 fnLAY RHLYJ0029PAZZ 1 RL 701

000-ll0-271 L I~~ E FILTER RC ILF0048CEZZ 1 L701

000-110-280 LHJE FILTEfl RC ILZ0303CEZZ 1

000-110-292 ~1AIN/CRT BOARD ASSY DPW6-0737/0738PAZZ 1 ~

000-110-287 PLUG til P L G N 0 2 0 7 CE l 7 2P 1 FOR L702

000-110-288 PLlJG t~PLGN0505CEZZ 5P 1 FOR DEF. COILS

000-110-289 SOCKET WITii LF.:A~ DSOCN0143PAZZ 2P 1 FOR L702

000-110-290 SOCKET 'WITH LEAD llSOCN0144PAZ7 7P 1 FOR DEF. COILS

000-110-264 CRT GROUNDir\G ._. I i~ F r>SOCN0146PAZZ 1

000-110-285 un HEATER LEAD ASSY QCNW-0033PALZ 1

000-110-268 TRANSFOR~\ER rnRNF5010PAZZ 1 T602

000-110-269 T f\ A N S T 0 R ~·\ E R fnRNZ0073CEZZ 1 T601

000-110-263 DEl.iAUSS ING COIL RCILG0001PAZZ 1 L702

000-110-270 COIL RC ILZ0082PAZZ 1 L601

000-110-279 POLYESTER CAPACITOR R C - ~~ l 0 0 1 5 C Ell 0.1UF 125V 1

000-110-291 WIRFWOUND fiESISTOR RR-I.JZ0014PAZZ 1. 3K 5 '.J 1

000-110-277 POTENTI0:1ETER t<VR-"10010PAZZ 1K 1 R707

000-110-278 P 0 T E N T I 0 t1 E T ER RVR-M0040PAZZ 100 1 R511
000-110-281 POTENTIOMETER RVR-M0042PAZZ 6.::3~ 1 R515, R608
000-110-282 P 0 T E N T I Of1 ET E ~~ RVR-~0140F'AZZ 330 1 R524
000-110-2R3 POTE~JTI O~'tETtF~ RVR-M0141PAZZ 470 1 R520

000-110-266 HEAT SI·~ K PROAR1156CEF 1../ 1 FOf< Q602

000-110-267 HEAT SINK P!~DAR0044PAZZ 1 FOR SCR701

000-110-262 SPkiNG MSPFH0012PAZZ 1

000-110-265 FRT RE I 1\JFO!~ C E ANGLE LA"lGF0096PAZZ 1

000-110-286 DOURLit-.JG QLUGP0109CEFW 1
FUAUNO PL-15

DATE 6/02/87
HAINTENA~CE PARTS LIST NO.MPI110
FOR TM-140FC~> 14 NCH COLOR MONITOR
*1:DEPOT MAINTENANCE PARTS FOR 10 SETS IN 2 YEARS
*2:SHIPJORNE RUNNING PARTS FOR 1 SET IN 2 YEARS

QUANTITY
CODE NO. ~~A >1 f 0 F P Atn S TYPE SPECIFICATIONS *1 *2 REMARKS

000-100-642 CRT ASSEMBLY TXFVf301140F H1-140F 1 TM-140F

000-100-646 CRT ASS[~BLY TXFVf~01140FM H1-140F~1 1 TM-140F(M)

000-100-374 TRANSISTOR ?SD794 1

000-100-375 TRA~SISTOR 2SC1685-(~ 1
000-100-376 TRANSISTOR 2SC2688 1
000-100-377 TRANSISTOR 2SC3063 1
000-100-664 TRANSISTOR ?SD636-RS 1

000-100-370 DIODE TVSRU2 1

000-100-658 UIODE TVSUF-2!3 1
000-100-659 ~liODE: TVSRD3.6ftH ZENEF~ 1
000-133-742 DIOD~ MA26WO 1
000-134-111 DIODE ~AlSO 1
000-134-125 DIODE TVS1S954 1
000-134-126 DIODE TVSRC2 T';J-110F/TM-111F 1
000-134-127 DIODE TVSfW12EH M 1
000-134-128 UIDDE TVSRGPlOJ 1
000-134-129 JTODE TVSRD16EB2 1
000-134-130 DIODE TVSRH-1 1
000-134-131 L>IODE TV S fW 8 • 2 r lH 1
000-134-132 DIODE TVSRfH2FR2 1

000-475-579 SWITCH ESD-702 1

0 0 0-1 0 0-6 4 0 PR I NT UJ C I I~ C U IT f3 0 AY[) HJ P 1 2 3 P, 8 , ~1 A I N T~-140F 1 TM-140F

000-100-641 PRINTED CIRCIUT BOARD TNP12939, NECK TM-l40F 1 TM-140F
000-100-643 PRINTED CIRCUIT BOARD Tr~ P 5 65 6 2 ZA TM-140F 1 TM-140F
000-100-644 PRINTED CI~CUIT ~OARD TNP12688ZE, MAIN n1-140F~ 1 TM-140F<M>
0 0 0 -1 0 0 - 6 4 5 P R I i~ TED CI RCU I T ;3 0 ARD T~P12939ZE, NECK TM-140F'·1 1 TM-140<M>

000-510-109 CRT SOCKET TJS35090 1

000-100-372 TRANSFOR~E~ TU115654P 1

000-100-373 FLYBACK TRANSFORMER TLF14614F3 1
000-427-223 H. DRIVE T~AqSFOi~~·1[f~ Tll!-6436 1
000-427-255 TRANSFOR~ER TLH-R709 1

000-100-676 DE-GAlJSSUJG COIL TLK13900""SN 1

000-427-219 V. LINEA~ITY COIL TLH15710 1

000-100-358 ~ESISTOR ER<Q-12HKR39 1

000-100-359 HESISTO~ Ei~Q-2CJ3H3 1
000-100-360 RESISTOR Ef\Q-12A J3rnP 1
000-100-361 RESISTOR [f~(~-12!!KR68 1
000-100-362 RESISTOR ER~-1ANJ391 1

000-301-976 POTENTIOMETF~ EVH-OTAS05dl4 1QK, R 1

000-307-230 POTENTIOMETER EVT-KOCAOOE\52 500, B 1

DATE 6/02187

QUA NT ITV
CODE NO. r~ M1 E 0 F P AR T S TYPE SPECIFICATIONS *1 *2 REMARKS

000-307-231 POTENTIOMETER EVT-KOCAOOB53 5K, B 1

000-307-232 POTENTIOMETER EVT-KOCAOOB23 2K, B 1
000-307-233 POTENTIOMETER EVT-K4CAOOB53 5 K, f~ 1
000-307-234 POTENTIOMETER EVT-K4CAOOB13 1K, R 1
000-307-766 POTE~TIOMETER [Vr1-PTGS25198 1

000-100-677 COIL BAND TXFES01140F 1

 FUAUNO PL-16

DATE 4/08/87
MAINTENANCE PARTS LIST NO.I-121600
FOH CH-14116
*!:DEPOT MAINTE~ANCE PARTS FOR 10 SETS I~ 2 YEARS
*2:SHIP~ORNE RUNNING PARTS FOR 1 SET IN 2 YEARS

QUANTITY
CODE NO. NAME OF PARTS TYPE SPECIFICATIOt-iS ~~1 *2 REMARKS
000-107-465 COL OR MONITOR DISPLAY AH.lA8DSP 11 1 CH-14 ONLY
000-574-009 COL OR MONITOR DISPLAY TM-140F 02S5019-0 1 CH-16 ONLY
000-547-056 FUSE, GLASS TU~;E TYPE F-7142 lA AC125V 10 5
00 0-549-013 FUSE, GLASS TUt3E TYPE FGRO ?A AC125V 10S0080 10 5
000-549-063 FUSE GLASS TUBE TYPE Fc;r~ 0 -A 3A ACtZSV 0050093 10 5 CH-16 ONLY
000-549-064 FUSE,GLASS TUBE TYPE FGAO-A SA AC125V 0050093 30 15
002-115-610 PRINTED CIRCUIT i30ARD 02P9026 HEG 1 CH-16 ONLY
006-532-650 PRINTED CIRCUIT BOARD 06P0146 DRV CH-1421 1
006-533-050 PRINTED CI~CUIT 30ARD F02P9042 Pi.'R 1 CH-14 ONLY
006-534-100 PRINTED CIRCUIT BOARD 06P0147 POw 1
006-530-460 PRINTED CIRCUIT BOARD 06P0144-88 TRX CH-14/16 1 88KHZ
006-530-470 PRINTED CIRCUIT HOARD 06P0144-150 TRX CH-14/16 1 150KHZ
006-533-010 PRINTED Cif~CUIT BOARD 06P0131 DSP CH140/160 1
006-533-740 PRINTED CIRCUIT BOARD 06P0136 MIF CH-160 1 CH-16 ONLY
006-534-020 CONHWL PANEL ASSY 06P0134/0135 UPN/DPN CH-16 <EXPOFH> 1 CH-16 ONLY
006-534-080 PRINTED CIRCUIT BOARD 06P0144-60 TRX CH-14/ln 1 60KHZ ~
006-534-090 PRINTED CI~CUIT f30ARD 06P0145 PWR CH-141 1
006-532-930 COMPLETE SOUNDOME ASSY CH-1422,60KHZ WP CH-14/16 1 60KHZ, WATERPROOF
006-532-940 COMPLETE SOUNDOME ASSY CH-1422,60KHZ 3.5M CH-14/16 1 60KHZ, 3.5"1 CABLE
006-532-950 COMPLETE SOUNDOME ASSY CH-1422,60KHZ 5.2M CH-14/16 1 60KHZ, 5.2M CABLE
006-533-510 COt~PL ETE SOUNDOME ASSY CH-1422,88KHZ WP CH14/16 1 88KHZ, WATERPROOF
006-533-520 COMPLETE SOU~JDOME ASSY CH-1422,88KHZ 3.5M CH14/16 1 88KHZ, 3.5M CABLE
006-533-530 C0~1PLETESOUNDOME ASSY CH-1422,88KHZ 5.2M CH14/16 1 88KHZ, 5.2M CABLE
!)06-533-540 COMPLETE SOUNDOME ASSY CH-1422,150KHZ WP CH14/16 1 150KHZ, WATERPROOF
006-533-550 COMPLETE SO UN DOME ASSY CH-1422,150KHZ 3.5M CH14/16 1 150KHZ, 3.5M CABLE
006-533-560 COMPLETE SOUNDOME ASSY CH-1422,150KHZ 5.2M CH14/16 1 150KHZ, 5.2M CABLE
006-534-010 CONTROL PANEL ASSY 06P0132/0133 UPN/DPN CH-14 <EXPORT> 1 CH-14 ONLY

-~
 CH-14/16 MECHANICAL PARTS LIST PL-17

SYMBOL PARTS NAME TYPE/DWG. NO. REMARKS

le -~t 86 & ~ l!l ~/[g) • • =f

CH -142 HULL UNIT (Ref. Page M-1)

1 GASKET Sf-IJ-0009-1 01,1-000-091

2 O-F~ I NG J IS t>?. 4 01-1 A- P 3 3 000-~51-137
3 LOCK ~.JUT SHJ-0011-2 661-000-112
4 SOUND0'1E SHAFT.1. 06-003-1021 100-02'1-500 1.1 n-1
SQUr-;::>O~[ SHSFT.2. 06-008-1022 100-022-510 1. 97M
S 0 U ND 0 ·~ E S i I AF T • L • ()()-007-1572 600-715-720 3. 8 ~~,
5 T A ~J K GU IlJ E <2 > S'iJ-0 015 fl61-000-150
6 T A~4 K GU I i) E 06-910-1229 609-012-293
8 TPUN ~J I 0 :-4 P I t J SH~J-0002-1 ()61-400-021
9 FLAT WASHU: ~1? SUS304 000-(?64-132

10 G~LASE COTTON 9. 5 s Q 0. 6 f1 000-859-013

11 GREASE COTTO~ RETAINER SHJ-0003-1 661-000-031
12 CASE :IODY COVFR.Z. 06-007-1556-0 600-715-560
13 :JUST COVER 06-007-1552-0 600-715-520
14 COVER FIXI:JG PLATE 06-007-1553-1) AOIJ-715-530
15 L1 MIT S '..1 ITCH ~1 0 lJ ~n 06-007-154'q-1 600-715-4~1
16 MPH PILLO.../ RSF1518 000-875-~83
17 tHJSH HOF-1215 000-876-991
18 SPACER se-6M3-10-r's 1)00-877-113
19 CASE BODY COVEt<.l. 06-007-1555-1 600-71)-551

20 EL AY ~~ 0 1J ~n
f~ 06-008-100.'\-2 100-02~-492
21 ME PLATE
~·A 06-011-2101 100-057-~90
22 SEALP~G TAPE.2. 06-007-1563-0 f>00-71 S-n30
23 SEALDJG TAPF.1. 06-007-1562-0 !,00-715-620
24 CASE ~ODY 06-008-1004-2 100-ozg-452
25 SPACER 06-911-0017-0 100-016-560
26 S Cf~ E W SHA F T SHJ-1009-1 661-010-091
27 ~iOTOR SPUR GEA'\ 06-007-145'3-2 600-714-582
23 S Cf< E w S HA FT 06-007-1542-0 600-71'>-420
29 SCRE~<.'-SHAFT KEY SHJ-1026-0 661-010-260

30 SCREW SHAFT HOUSING 06-007-1543-0 600-715-430

31 C-TYPE CIRCLIP 3 5 '1 ~1 D I A • N0 MI ~~ AL SK 5 000-?166-416
32 TAPERED ROLLFR REARING 30202 000-873-100
33 SCREW SHAFT SPUR GEAR 06-007-155'i-2 600-715-582
34 BEARING 'tiASHE'~ AW-OZX OOO-RA4-981
35 i~UT FOR BfARIWi AN-02 000-863-601
36 TOP COVER 06-007-1551+-0 / ''0-715-540
37 bEARING COLLAR 06-007-1544-0 600-715-440
38 LOCK NUT 0 6- •.' 0 7-1 54 0-0 600-715-490
39 5ALL F\EAR HJG 3/8 000-87~-309

40 SPJ~IN G SHN-1044 661-410-440

41 SPRING FIXI~G R(~G 06-007-1551-0 600-715-510
42 LOCK GAR 06-007-1550-0 600-715-500
43 C - T YP C C P~ CL I P DIA. 13MM SK 5 ooo-8oo·-oso
45 PLATE
"JAi~E 06-008-1001-0 100-02,9,-420
46 CA3LE GLAND Pt1-20 000-801-023
47 CA3LE GLAND Pt1-15 000-801-024
49 COVER FIXING PLATE 06-007-t5s:s-o f:>00-715-530

so DUST COVER 06-007-1552-0 600-715-520

51 CASE BODX COVER.3. 06-007-1557-0 600-715-570
52 PIPE CAP SrlN-0011 661-400-110 ~JO W. PROOF
53 SOUNDOME PIPE HOLDER 06-007-1561 600-715-610
54 RUBGER CUSHION.!. 06-007-1547-1 600-715-471
55 CUSHION COLLAR 06-007-1546-0 600-715-460
57 WASHER 06-008-1032-0 100-02~-530 I.JATER PROOF
58 GASKET 06-008-1033-0 l00-02R-.540 WA.TE R PROOF
59 FIXING GLAND 06-008-1031-0 100-023-520 \.lATER PfWOF

60 STOPPER SH~-0003-2 661-400-032

NOTE:
• ~=
 FUAUNO CH-14/16 MECHANICAL PARTS LIST PL-18

SYMBOL PARTS NAME TYPE/DWG. NO. CODE NO. REMARKS

le -~t SS .fa ~ ~ ~/[!] • ::J-1-'•-~t • :iJ

CH- 1422 SOUNDOME (Ref. Page M-2)

1 SaUNDaME cover. ASSEMBLY Cd-1422 0 0 /, - 5 5 3 - 2 4 0

2 0-RING WG-35, 1115-70 00fi-P.S1-78g
3 TRANSDUCER CASE 06-0ll-2?51 100-05"-230
4 TRANSD0CER AKM SUI'POfH 06-011-2241) 100-05~..-zto
5 TRANSDUCER Ar< tA, S~IAFT 06-011-22•47 1il0-05;.;-z2n
6 TRANSDUCER Af<t1 06-011-224? 100-050-171
7 TILT ARt~ SHAFT 06-011-2?44 100-05'?-190
8 TRAIN SHAFT L UJE~ 06-007-1356-0 600-71 )-560
9 a-RING J ISl\2401-4~)-P30 OOO-R51-254

10 FLANGE 06-007-1304-0 600-713-040

11 0-F\I NG WCi-37, 1115-7r1 000-851-787
12 a-RING J I SI' 2 4 Cl 1- 4 D- P 1 ? 000-~')1-253
13 Tf~AI(~:,HAFT 06-011-2233 100-053-141
14 TRAIN GEAR 06-011-2234 100-05'\-150
iS SLIP RING ASSEHBLY 06-011-2231-0 100-05~-120
~
16 ISOLATOR B!~ACKt:T 06-007-1321·-0 600-713-240
SPRif\G rnJ 2.SX12 S'JS30'+ OOC-P>66-240
17 SHAFT I~ ET AHJEf? ( 2) 06-011-2222 100-058-070
18 MOTaf< GEAR 06-011-2226 l()J-053-110
19 CHASSIS PLATE (1) 06-011-2221 lOC-05>'-061

20 PH0TO I'JTEf~RUPTOt~ SUPPORT 06-007-1325-2 600-713-252

21 SPACER HSA-0020 000-9eOC-020
22 GEAR BOX F I XI~~ G r~ F. D 06-011-2212 100-()5?,-010
23 GEAf~ BOX COVER 06-011-2?11 100-052-000
24 UPPEf~ DOr1E COVCR 06-007-1301-4 60C-713-014
25 wASHER 06-011-2204 100-057-990
26 PACKP~G 06-011-2203-0 100-057-930
27 CAflLE ASSD-1RL Y CH-1422 ':'3.5M* oo6-s:n-8so ~.SM
CAbLE ASSD1BL Y CH-1422 >:< 5. 2 :-~,:< 006-533->)60 5. 2 ~~
28 0-RING JISI\2401-1A-P38 OOIJ-P,Sl-137
29 ENCODE!~ SHAFT 06-011-2215 100-05<-040
TILT ROTARY ENCODER 06-011-2216-0 100-0Si'-050

30 UNI-COUPLI"JG 06-011-2214 100-059-030

31 GEAR HEAD R340 1/105.2 000-8!.0-455
32 GEAR 30X SPACER 06-007-1315-2 600-713-1')2
33 TILT ~10T OR FIX PJG PLATE 06-011-2213 1oo-o5:-o2o
34 TILT 1-WTOR GEAr< 06-007-131'·-1 600-71~-141
35 TRAIN FUHAPY E:J CODFR 06-007-1323 6')0-71">;-230
36
37
38
.39
TILT SHAFT
SPACE!~
BRUSH FIX I ',J r; PL ATF
BRUSH ARI·~ FIXliiG nr:o
Oo-011-2232
06-0ll-2223
06-011-2225
06-011-2224
100-05~-131
10o-os·•-og1
100-0511-101
100-0SR-090
-
bRUSH ARt~ 06-007-1327 000-431-004
40 SPACER ( 2) 06-007-1336-1 600-713-361
41 IWLLER F~TA-3047 OOO-f.75-~81
BEARitJG R P~G FT'~C-304 7 OOO-R75-882
42 FLAT /lA SHE I\ fH-1-5 000-.'1·64-983
43 AR~1 REI tlFah'CEri,ENT 06-011-2245 1oo-o5q-zoo
44 TILT ARf·1 06-011-2243 100-05'~-1.')0
45 TILT pIt~ 06-007-1353-0 600-713-530
46 TRANSDUCER ASSEtH>L Y CH-1422,f)OK11Z 006-53.3-250 60KHZ
TRANSDUCER AS 5 Ef1'3 LY CH-1422-88 006-533-570 83KHZ
TRAr4SDUCER ASSEMn,LY CH-1422-150 006-53~-580 150KHZ
47 TRANSDUCER FIXING METAL 06-007-136?-1 600-713-621
S PUNGE (3 > 06-007-1366 600-713-660
48 0-RING JISG2401-1<\-G30 000-851-302
49 CAt3LE ASSEMf3L Y CH-1422 >:<WP-3. 5"1':' 006-533-870 3.5M \./.PROOF
50 LINER 06-011-2241-0 100-05~-160

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