PD13

DFX-Design For Excellence: DFM, DFA, DFT and more -

Part 1
Dale Lee
Plexus Corporation

Monday, February 13
9:00 am - 12:00 pm
Room: 1A

www.IPCAPEXEXPO.org
 1/3/2017

Design For Excellence – DFM (Design

For Manufacturing), DFR (Design For
Reliability), DFA (Design For Assembly),
And More – Part 1

Presented By: Dale Lee

E-mail: [email protected]

Today’s Electronics
High Layer Counts
Wide Range Of Component
Package Sizes
Soldering Of Other Soldered
Assemblies
Mixed SMT & PTH Technology
Increased Component /
Interconnection Density
Higher Number Of Component
Placements (10,000 Plus)
Increase PCB Diversity – Size,
Layers & Material

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Today’s Electronic Designs

Smaller And Smaller Component Packages
0603 > 0402 > 0201 > 01005 > 0201M > ?
BGA > CSP > WL-CSP > Flip Chip > ?
DFN/QFN > Multi-Row QFN > LGA > ?
Assembly Design Density Is Increasing
Tighter Component to Component Spacing
(Spacing Smaller Than 0.4mm Common)
Smaller Copper (Pad) Interconnections
Assembly Process Margins Are Tighter
Thermal Balance @ Pad Level Is Critical
(Trace/Via Connection Size to Pads)
Component Placement Accuracy
The Thickness Of A Piece Of Paper Can Be Difference Between
High Yields Or 100% Rework

Where Is The Component?

IPC: Magnification Aids Shall Be Appropriate For Item

Being Inspected.
Is 20X Magnification Strong Enough? What About 40X?

Source: IPC-A-610, Section 1.10

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Why DFX Programs Are Needed

• The Divide Between Engineering And Manufacturing Persists —
And Is Widening With Lack Of OEM Internal Manufacturing
Operations
• Parallel Decision-Making Must Be Orchestrated Across Separate
Individuals, Internal Teams And/Or External Service/Component
Suppliers
• Early Design Decisions Are Crucial But Lack Details For Effective
Analysis
• Disparate Data Sources, Structures, And Views Clutters Information
And Frustrate Workgroups
• Ability To Match Design To Manufacturing Process Are Not Practical
- Today’s Designs Require Matching The Manufacturing Process
To The Design

How Is DFX Project Success Measured

DFRx DFS DFSC

DFR
DFMA DFD
DFT DFC
DFMCL DFP DFE
DFEA
DFM

DFLCC
DFUPC
DFReuse

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How Is DFX Project Success Measured

DFRx – Design for Recycle DFC – Design for Cost

DFR – Design for Repair DFLCC – Design to Life Cycle Cost
DFTTM – Design for Time to Market DFP – Design for Procurement
DFReli – Design for Reliability DFMCL – Design for Material Cost Line
DFV – Design for Verification DFUPC – Design for Unit Production Cost
DFL – Design for Logistics DFMA – Design for Mechanical Assembly
DFSC – Design for Supply Chain DFEA – Design for Electrical Assembly
DFS – Design for Service DFT – Design for Test

DFE – Design for Environment DFM – Design for Manufacturing

Method of Measurement Must Be Defined Prior to Start of DFX Project!

Multi-Functional Teams
Functional Member How Success Is Measured
Purchase Price Procurement
Delivery & Expense Manufacturing
Meet Specification Quality
Through-put Industrial Engineering
Schedule & Margin Program Management
Reliable Reliability
Environmental EH&S
Schedule & Expense EMS Partner
Schedule & Expense Critical Vendor

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DFX Project Measurement Exercise

Product Requires 80 resistors per assembly with a product life of 4500 hours.
Assembly costs to build product is $0.02 per placement.

Component $/Part Reliability Repair Cost

Chip Resistor 0.002 100 Hours 0.10/part
Resistor Array (4 Chips) 0.009 250 Hours 0.50/part
Resistor Network (8 Chips) 0.10 1000 Hours 1.00/part

What components would be selected and cost for this product if DFX project
measurement method was;
A) Design for lowest material procurement cost?
B) Design for lowest manufacturing cost?
C) Design for lowest life cycle cost?

Design Impact On Cost

“DFMA Is Best
Applied At The
Concept Stage
Where At Least 70%
Of The Final Cost For
A Product Is Fixed.”
Drs. Boothroyd And
Dewhurst

Majority Of Total Life Cycle Costs Are

Largely Determined During Development

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Collaboration Across Development Process

Product life cycle

Prototype
Concept Engineering Promote Production Maintenance
and
development design product launch and support
validation

Collaboration spectrum
User-directed, unstructured Automated, structured processes
processes provide velocity, agility, responsiveness, provide efficiency, accuracy, and
and creativity centralized control

Early Product Development Processes Require More Ad Hoc, Unstructured

Collaboration, Whereas Later Stages Require More Rigorous, Structured
Collaboration.

Source: Adobe

Integrated Product Development

Increased Focus On Manufacturing Development As Part Of Product Development In Industry
 Defense (MRL), Avionics (AP/QP & MRL), Automotive (AP/QP)

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New Industry DFX Standard In Progress!

Gate 1 Gate 2 Gate 3 Gate 4 Gate 5 Gate 6

Concept
Design Launch
Development
Market Idea Concept & &
& Project Ramp Up Production
Research Generation Feasibility Development Production
Planning
Start-Up

Update Plan Process

Business Final Check
Project & AR Audit
Plan
Idea Charter
Submission

IPC-2231:Design for Excellence (DFX) Guideline During the Product Lifecycle

Global Product Design Elements

Geographical differences Mars climate orbiter
– Language
– Environmental (local/regional)
– Unit of measure (imperial versus metric)
– Identify controlling dimension
– Identify alternate dimension
– Verify accuracy of units
– Numerical reporting (decimal versus comma)
– Calendar (Gregorian versus Chinese versus Hebrew, etc.)
– Date reporting (dd/mm/yyyy, mm/dd/yyyy, yyyy/mm/dd)
– Work week (Monday-Friday or Sunday-Thursday)

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Global Material Specification

Some materials are controlled by global specifications
– Plastics
– Electronic components
– Printed circuit board laminates

Some materials are controlled by local/regional specifications

– Metals 4. MATERIAL IS AISI 1010- 1020 COLD ROLLED STEEL
– Finishes OR APPROVED SUBSTITUTE
5. BREAK SHARP EDGES TO 0.25 MAXIMUM

4. MATERIAL IS SPCC, SECC, OR SAPH-440 STEEL

5. FINISH: ZINC PLATE PER ASTM 8633, TYPE 3, CLEAR OR YELLOW,
SERVICE CONDITION 1. WIRE HUNG ONLY. DO NOT TUMBLE PLATE.

3. THIS IS A CAD DRAWING. DO NOT MANUALLY UPDATE

4. MATERIAL IS ALUMINUM ADC-10, ADC-12 OR ZINC ZDC2
OR APPROVED SUBSTITUE. FINISH IS AS CAST

Global Material Specification

Component Fabrication Baseline
Processes Can Be Different
Stamped Metal Fabrication
– Sequential/Progressive Die System Versus Multiple
Single Die Machines (Increased Tolerance)

Plastic Injection Molding

– Percentage Of Regrind/Recycle Material Allowed

Machining
– Metric Versus Imperial Cutting Tools (Radius
Tolerance)

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Definition of Product Design Requirements

Physical Design Allocations
Define X,Y-axis Constrained Design
Allocations for PCBA & Components
■ PCB/PCBA Size, Feature and Edge
Tolerances
■ Tight Location Tolerances for Mechanical,
Electro-Mechanical,
Opto-electronic Components
■ Solder/Adhesive Position Requirements
Define Z-axis Constrained Design
Allocations for All Elements
■ Components, PCB & Component Attachment
(Solder)
■ Other (Insulators, Covers, Chassis, Etc)

PCB Tolerances

Artwork Feature Positional Tolerances

Increase
Inner/Outer Layer Shrinkage
(Technology / Material Dependent)
Some Materials Do Not Shrink Uniformly
Potential Increase in Capture Pad Size
Fabrication & Depanelization Material Movement/
PCB Fabrication Tolerances Artwork Registration
■ As Fabricated
■ In Array
■ After Depanelization

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Supplier Data Dimensions

Identify Controlling Dimension

Identify Alternate Dimension
Verify Accuracy Of Units

Equivalent Units

Single Step
Measurement
Multiple Step
Measurement
(Accumulation Of
Tolerance
Differences)
Higher Number Of
Steps – Greater
Impact Of Differences

0.025” *18 = .450” (11.43mm) vs 0.64 * 18 = 11.52mm (0.4535”)

Shift Of 0.0035” or 0.09mm

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Accumulated Round-Off Error

What Is Wrong Here

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Not All Suppliers Packages Are Equal

Pin To Pad Analysis

Incorrect Package Width

Meet Functional & Lifecycle Requirements

High Risk
Component lifecycle analysis reduces the
potential impact of near end-of-life components

RoHS/non-RoHS compatible analysis ensures

compliance with regulatory and product
reliability and assembly requirements

PAST CURRENT

RoHS & Green Information

Part # Supplier RoHS

RoHS Component Terminal C of C/
Lead-Free RoHS Exemption MSL Max Temp
Exemption Engineer Comment Plating Datasheet
Type
C0402C102K3
Kemet Electonrics Compliant Compliant No Matte Sn 1 260°C Link
RACTU

RK73H1ETTP10 KOA Speer Not

02F Electronics
Compliant Yes 7.c‐1 Matte Sn 1 260°C Link
Compliant
Invalid MfgPN; p/n
0402YA331JAT 04042YA331JAT2A
AVX/Kyocera Compliant Matte Sn 1 260°C Link
AT2A was analyzed and
found compliant

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Component Selection
Component Sourcing
– Regional/Global Availability
– Industry Usage (Anti-Component Selection)

Part/Package Selection
– Component Procurement Life Cycle Position
– Manufacturability/Testability Impacts
Smallest Package May Be Most Expensive/Least Reliable
– Lead-Free Terminations
Not All Lead Free Alloys Are Compatible With Other Component
Package Assembly Processes Or Solder Alloys
– Assembly Process
Pin in Paste, Press-Fit, Temperature Sensitive

Supplier Selection
– Mergers & Acquisitions
– Supplier Location

Bill Of Materials Accuracy

Completeness Of Bills Of Material (BOM)
– Correct Procurable Information
■ Manufacturer
■ Manufacturer’s Part Number
– Procurement Quantity Matches Reference
Designator Quantity

Alternate Supplier Packages

– All Suppliers’ Packages Are Equivalent
■ Functional
■ Length, Width, Height
■ Number Of Interconnections/Leads
■ Packages Match Mounting Pattern On
Printed Circuit Boards

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Component Issues – Decreasing Pitch

0.2 mm 0.4 mm
0.8 mm

1.0 mm
1.27 mm

Potential Issues:
– PCB Flatness
■ Surface Plating
■ Internal Split Plane
■ NFP Removal Impacts
– PCB Warpage

Design for Impedance

 Provide Specification of Min./Max. Line Width, Min./Max. Panel Thickness,

Copper Weights, Distance to Reference Planes and the Target Impedance
Value.
 Finished Impedance Value of +/- 10% or Minimum +/- 5 Ohms on <50 Ohms
<10% on Case by Case Basis.
 Line Widths Must Fit Within Design and Specifications, Etch Factor Must Be
Considered In The Design.
 Stackup Must Fit Within Specified Panel Thickness.
 Fine Line Designs May Require Pre-Design Impedance Review.
 New Revisions May Require New Stack-up Design.

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Dk Comparison – Rigid Material

Measured At 2 Ghz

Source: TTM Technologies

Df Comparison – Rigid Material

Measured At 2 Ghz

Source: TTM Technologies

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PCB Laminate Construction

Laminate Made From Mix of Resin & Glass

Most Common Types: 7628HR, 7628,2116,
2113,1080,1080LD,106
Location of Trace to Glass (Dk~6) Bundle or
Resin (Dk~3.5) Pocket Can Impact Electrical
(Impedance) And Mechanical Performance

FR4 Dielectric Constant Variation

Laminate Construction Prepreg Material**

Thickness Construction R% DKs Construction R% DKs
0.002 1 - 106 69 4.2 106 75 4.1
0.003 1 – 1080 62 4.3 1080 65 4.2
0.0039 1 - 2113 50 4.6 2313 57 4.4
0.0039 106/1080 57 4.3 2116 55 4.4
0.0043 1 – 2116 51 4.4 2116 High Resin 61 4.3
0.0053 106/2113 55 4.4 2165 58 4.4
0.006 1080/2113 52 4.4 7628 43 4.7
0.007 1 – 7628 41 4.7 7628 High Resin 56 4.4
0.007 2 – 2113 49 4.6
0.008 1 – 7629 44 4.6
0.0095 2 - 2116 51 4.4
0.010 1 – 7635 48 4.6
0.010 2 - 1652 41 4.7

** Prepreg Resin Content Is Reduced in High Pressure Lamination Due to in the Melt Phase
Predicted at 1MHz Source: Allied Signal & Isola Group

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Pad To Glass Bundle Interaction

Location of Pad Relative to

Glass Has An Impact On:
– Crack Location & Formation
– Functional Performance
Size And Shape Of Pad Also
Important Factor

“Differences in the velocity of differential signaling pairs occur when one side of the
pair travel over the resin while the other side travel over glass in a PCB laminate.”
PCB Laminates Influence High-Speed Data Rates, L.Ritchey, EDN, September 2015

Images Courtesy of Universal Instruments

PCB Laminate Impedance Impacts

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PCB Laminate Impedance Impacts

Today’s Available Glass Styles

Glass Resin Fiber Volume
Style Volume Content Content
1027
1037
0.86
0.86
0.14
0.14
Datasheet properties are based
106
1067
0.84
0.84
0.16
0.16
on laminate with 7628 glass
1035
1078
0.83
0.82
0.17
0.18
style (Dk, CTE, etc.)
1080
1086
0.79
0.78
0.21
0.22
– Most laminate and prepreg
2313 0.74 0.26 materials typically utilized in
complex/high layer count/thin
2113 0.72 0.28
2116 0.71 0.29
3313
3070
0.71
0.68
0.29
0.32
PCBs have a low volume
1647 0.66 0.34 fraction of glass (106, 1080)
1651 0.66 0.34
2165 0.66 0.34
2157 0.66 0.34
7628 0.64 0.36

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PCB Material Relative Costs

FR4 Materials Are Least

Expensive Material
Higher Performance Rigid
Materials Are More
Expensive Than Standard
FR4
Polyimide Flex Material Are
The Most Expensive
Materials

Source: TTM Technologies

General Flex Construction

Three Main Material Types
– Polyimide (Solderable)
■ Copper Etch Technology

– Polyester (Non-Solderable)
■ Printed Conductive Ink Technology

– FR4 (Solderable, Limited Applications)

■ Copper Etch Technology

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Polyimide Flex Types

Polyimide Copper Attachment Types

– Adhesive Based (Copper bonded to polyimide layer using adhesive)
– Adhesiveless (Copper bonded directly to polyimide layer)

Typical 2-Layer + Stiffener Flex Fabrication

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Flex Types 1 & 2

Single or Double Sided Flex Printed Circuit Board Containing

1 or 2 Conductive Layers With or Without Stiffener

Flex Type 3

Multilayer Flex Printed Circuit Containing Three or More

Conductive Layers with PTHs, With or Without Stiffeners

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Rigid-Flex Type 4

Multilayer Rigid And Flex

Material Combinations
Containing Three Or
More Conductive Layers
With PTHs

Flex or Rigid-Flex Type 5

Rigid Or Rigid-flex With Two

Or More Conductive Layers
Without PTHs

Not Commonly Used.

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Relative Cost Impacts By Flex Circuit Type

This Chart Illustrates That Circuit

Costs Increase With Design
Complexity And Layer Counts.

All Options Should Be

Considered To Minimize Cost.
Example: Two Double Layer Flex
Circuits May Be Less Expensive
That One Four-layer Flex Circuit
Design.

Flex Materials
Polyimide Film Thickness:
– ½ mil (12um), 1 mil (25um)*, 2 mil (50um)*, 3 mil (75um), 5 mil (125um)

Copper Thickness:
– 1/8oz (5um), 1/4oz (9um), 1/3oz (12um), 1/2oz (18um)*, 1oz (35um)*,
2oz (70um), 3oz (105um)

Stiffener Materials:
– Epoxy-Glass (FR4)
– Polyimide-Glass
– Polyimide
– Metal: Copper, Aluminum, etc

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Solder Mask Types On Flex

Liquid Photo-imageable (LPI): Not Commonly Used On

Flex Materials
– Standard Copper Clearance = 0.003”
– Typically Used On Rigid-flex Designs

Cover Layer: An Additional Layer Of Polyimide Bonded To

Top Of Flex Material
– Standard Copper Clearance = 0.010”
– Typically Used On Flex Areas Of Flex And Rigid-flex Designs

Construction Requirements

With Type 4 Construction,

The Amount Of Rigid
Board Overlap Onto The
Coverlay Material Should
Be ~0.030 To 0.050” To
Avoid Stress Point
Helping To Reduce The
Chance For Breaking
And/Or Cracking Of
Traces.

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Types Of Flex Installations

Installations Types Are Defined By The End Use Application
• Dynamic – Continuous Flexing
• Ex: Disk Drive Head
• Limited Flex – Frequent Flexing
• Ex: Laptop Screen Hinge
• Flex to Install – Very Limited Number Of Flex/Bending Cycles
• Detectors in MRI System
• Aircraft Electronic Assemblies
• Crease Install – One Time Bend Of Flex
• Disposable Medical Device - Pill Camera, Surgical Device, Etc
• Non-Repairable Electronic Component/Device
• Implantable Medical Device

Minimum Bend Radius

• The Minimum Bend Radius Is

Dependent On The End Use
Application.
• One Time Static/Crease Bend
Designs, Radius Can Be 1 Time Or
Less Than Material Thickness.
Without Knowing This Information,
Typical Recommendations Are 6 To
10+ Times Material Thickness For
Single/Double Layer Designs. Multi-
layer Flex Minimum Radius Will Be
Much Higher. Refer To IPC-2223,
Section 5.2.3.3.1 For Calculation.

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Copper Plating Types On Flex

Rolled Annealed Copper Is Typically Used For Flex Designs. Rolled
Annealed Copper Should Be Used For Dynamic Or Designs With
Severe Folding Or Bending. The Elongated Grain Structure Resists
Cracking. The Bend Line In The Flex Should Be 90 Degrees To Grain
Orientation On Flex .

Normal FR4 Copper Thicknesses Are Almost Always Electrodeposited.

Polyimide Material

Polyimide Is A Hydroscopic Material And Readily

Absorbs And Retains Moisture From The
Atmosphere. Board Constructed With Polyimide
Require Storage In Dry Environment Or Baking To
Drive Out Moisture Prior To Assembly. Exposure
Times Between Soldering Process Should Be Kept
To A Minimum.

Polyimide ~ 2.9% FR4 (370HR) ~0.15%

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Flex Installation Considerations

 Copper Should Be In Compression When Bent For
Maximum Reliability.
 Traces Should Be Staggered From Layer To Layer In
Bend Area And Evenly Spaced On Layer
 Traces Should Be Perpendicular To Bend Axis
 Copper Thickness And Flex Material Should Be
Balanced On Each Side Of Neutral Bend Axis.

Multilayer Flex Circuits

 Book Binder Bend – Space Limited Applications, Expensive,
Minimal Bend Stress On Traces

 Multiple 1 or 2 Sided Flex Layers – Odd Number Of Bend

Directions Can Create Buckles Of Inner Circuits, Even
Number Of Bend Directions Has Similar Results

 Multilayer Flex – Traces On Outer Layers Under Tension

and Inner Layers Under Compression

Source: TTM Technologies

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Bending Area

Bending In Area Near Edge

Of Coverlay Can Concentrate
Stress On Copper Features
And Lead To Premature
Failures (Cracks)
Finishes With Nickel Should
Be Avoided In Stress
Concentration Areas

Land Pattern Design

Very little solder is required for the formation of reliable solder joints with
most of the strength in the lap joint between the lead/termination and
mounting pad.

Not as much solder joint strength is in the visible fillet.

The visible fillet provides an indication of solder wetting and adds little
strength.

Therefore, component land patterns should be designed for

optimize process control, functional yields and PCB space
utilization and not for inspection (visual or machine). Pad design
and the assembly equipment ultimately determine solder fillet
shape and size.
Source: John Maxwell, John Maxwell Inc.

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Land Pattern Design Inspection Impacts

IPC-7351 recognizes the requirements of

higher component density applications and
provides information on land pattern
geometry used for specific product
categories.

Level A: Maximum Land Protrusion — For low-density product

applications
Level B: Median Land Protrusion — Products with a moderate level of
component density
Level C: Minimum Land Protrusion — Products with high component
density

Note: Smaller visible fillets impacts AOI ability to determine if there is a

fillet. Post reflow position also impacts this ability. Increased false call Level A Level B Level C
rate.

High Design Density

Spacing Limitations Are Not A Driven By The
Manufacturing/Assembly Process

SMT Pads
Minimum Or No Visible Solder (Toe) Fillets
Potential AOI/Inspection Issue
Component Spacing
Minimum Component to Component Spacing
Limited/No Rework
Limited AOI/Test Point Access

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Reflow Land Pattern Design

Small Land Patterns -

Improved Component Alignment (Package Specific)
Increased Component Height
Increased Misalignment at Component Placement (Visual)

Large Land Patterns-

Decreased Component Height
Decreased Component Alignment (Component Specific)
Decreased Misalignment at Component Placement (Visual)

Alternate Reflow Land Pattern

Land Patterns Other Than

Standard Rectangle Or Square
Pads Can Be Used (i.e. – Round,
Semi-Circle, Odd Shape)

These May Allow Placement

Between Area Array Via Pads On
PCB Or Decreased Manufacturing
Defects (Opens / Shorts)

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Land Patterns Are Too Small

Land Patterns That Are Too Small For Component

Can Also Create Potential Reliability And / Or
Quality Problems

Solder Mask Via Tent/Plug Options

Atmel Application Note

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Via Fill/Plug Types

Solder Mask Via Cap

Solder Mask Via Plug

Solder Mask Via Fill

Via Fill & Over Plate

Solder Mask Design

Exposed Via In Pad

– Ensure Solder Mask Is Not Applied
On Opposite Side Of PCB.
– If Applied, Ensure Via Hole Is Small
Enough To Restrict Solder Mask Flow
Through To Solder Attach Side Of
PCB
– If Top Side Via Plugging Is Required,
Especially Is Under BTC Components,
A Note Should Be Added To
Fabrication And Assembly Drawing
Referencing This Condition

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Impacts of Via Design on Assembly

Placement And
Types Of Vias In
Pad Can Affect
Assembly Solder
Joint Formation
And Reliability
More Of An Impact
On Smaller
Components
And/Or Lower
I/O Count
Design and Construction Affects on PWB Reliability, Paul Reid, IPC Apex Proceedings 2012.

Micro-Via Design – Reliability Impacts

Different Via Hole Structures

Impact Resistance To
Assembly, Rework or
Handling Damage

Design and Construction Affects on PWB Reliability, Paul Reid, IPC Apex Proceedings 2012.

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Micro-Via in Pad

Micro-Via Locations Should Be Consistent

– Area Array Components - Center of Pad
– Leadless (Chips, Chip Array, LCC, QFN, etc)
and Leaded (QFP, SOIC, SOT, etc.) Components
– Near Toe Fillet

X-ray Image

HDI vs PTH Relative Cost Comparisons

High Density Interconnect (HDI), Michael Creeden, IPC Flexible Circuits-HDI Forum Proceedings 2015

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Impacts of Via Design on Assembly

Placement And
Types Of Vias In
Pad Can Affect
Assembly Solder
Joint Formation
And Reliability
More Of An Impact
On Smaller
Components
And/Or Lower
I/O Count
Design and Construction Affects on PWB Reliability, Paul Reid,
IPC Apex Proceedings 2012.

Impacts of Via Design on Assembly

Placement And
Types Of Vias In
Pad Can Affect
Assembly Solder
Joint Formation
And Reliability
More Of An Impact
On Smaller
Components
And/Or Lower
I/O Count
Design and Construction Affects on PWB Reliability, Paul Reid,
IPC Apex Proceedings 2012.

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Thick Copper Design

A CTE Mismatch Between Copper And FR-4 Exists
• Copper = 18ppm
• FR-4 = 15-16ppm
• As Copper Gets Thicker, It Has Greater And Greater Influence Over Post Lamination
Dimensions Of The Resulting Substrate
Rolled, Annealed Copper Reacts Differently Than Electro-Deposit Copper
• Design Influences On Net Shrinkage Become Far More Significant Standard Scaling
Factors (That Compensate Net Shrinkage Effects) Do Not Apply!
More Resin Is Required To “Fill” Etched Out Areas
• “In-plane” CTE Increases With % Resin Content
• “Another Complication To Net Shrinkage Prediction”
• Resin Rich Package = Higher Z-axis CTE = Greater Sensitivity To Thermal
Excursions, Assembly In Particular.
• Heavy Copper Substrates Generally Require More Heat Input To Assemble
• Reliability!

Thick Copper Design

Heavy Copper, Embedded In Glass Epoxy, Can Result
In Nonplanar Conditions On The Surface Of The
Substrate

The Heavier The Copper, The Worse The Effect

In Multi-layer Applications, Local Areas With “Stacked”
Copper, Beside Areas That Are Etched Out, Can
Result In Extreme Non-planarities

PCB Fabrication Industry Typically Refers To This As

“Image Transfer”

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Thick Copper Design

Lack Of Planarity
Reduces The Effective
Resolution Of The
Fabrication Process,
Limiting Feature Size

Heavy Copper Lamination

Imaging Resist Thickness Is 1.3 - 2mils. At Some Point, Image

Transfer Interferes With The Imaging Resists Ability To “Conform”
To The Lack Of Planarity On The Surface Of The Substrate.

This Lack Of Planarity Also Reduces The Effective Resolution Of

The System, Limiting Feature

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Copper Etch Process

H = Height of Copper Trace

Etch Factor = 2H / (W max - W min)
Etch Factor Should Be Larger Than 1.0

Multilayer PCB Stack-Up

Stack-up Should Have Balance

Construction (Copper & Laminate)
From Centerline Of PCB

Trouble Shooting Printed Circuit Board Defects, Michael Carano, IPC Flexible Circuits-HDI Forum Tutorial 2015

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Multilayer PCB Stack-Up

Balanced
Construction
Minimizes
Warpage
During PCB
Fabrication
And Assembly
Processes

Trouble Shooting Printed Circuit Board Defects, Michael Carano, IPC Flexible Circuits-HDI Forum Tutorial 2015

Etched Trace Considerations

What Happens
 Thinner Copper Produces More Precise Geometries On When Trace
Lines Less Than 0.005” In Width Widths
Continue To
 Actual Conductor Shape Is Close To A Trapezoid Decrease?

 Copper Thickness Is Slightly Reduced After PCB Processing

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Copper Thickness Impacts On Components

As Copper Thickness Copper Minimum Spacing Minimum Pad Size

Increases On Outer Layers Weight (mils) (mils)
1/2 4 (100um) 8 (200um)
Of PCB, The Minimum 1 4 (100um) 10 (200um)
Spacing Between Copper 2 7 (175um) 15 (375um)
Features Also Increases 3 12 (300um) 20 (500um)
An Thus So Does The 4 14 (350um) 20 (500um)
Minimum Component Lead 5 16 (400um) 24 (600um)
Pitch/Pad Size. 6 18 (450um) 24 (600um)

Outer Layer Copper Plating Process

Panel Plating
– Entire Copper Surface On Both Sides And Holes Are Plated To
Final Thickness
Pattern Plating
– Masking Off Of The Copper Surface On Both Sides And Plating
Only The Traces And Pads Of The Circuit Pattern And Holes To
Final Thickness
Button Plating
– Masking Off Of The Copper Surface On Both Sides And Plating
Only Pads And Holes Of The Circuit Pattern To Final Thickness
(Also Called Pads Only Or Spot Plating)

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Etching Differences
Pattern and button plated circuits will result in an etched appearance a
“C” shape on the edge.
Panel plates circuits will results in an etched appearance of a
continuous slope appearance
Pattern/Button Plated Panel Plated

Some Images: www. eurocircuits.com

Pad Size Reduction

Current Procedures For Applying Uniform Etch Compensation Values
Across All Surface Features Are Inadequate.
Below Illustrate A Near Exponential Reduction In Pad Size As The Pad
Gets Smaller, For Both Round And Square Pads In Either Orientation.

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PCB Fabricator Variation

Pad Size Comparison

– Same design data may not yield same PCB pads sizes.

DFM Rules for Smartphones: An Analysis of Yield on Extremely Dense Assemblies, Jimmy Chow et al., IPC Apex Proceedings 2012.

Copper Etching Of Pads

Copper pads when measured at

the top surface may be
significantly smaller than at widest
point.

Potential issue where solder

stencil openings are too large to
rest on top of pad and insufficient
solder paste may be applied for
reliable solder connection
formation.

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Copper Etching Of Pads

Problem:
IPC requirement for measurement of etch size tolerance is taken from the located of
widest point (dimension “B”).

Solution:
Develop fabrication note that will specify tolerance.

Example:
Non-solder mask defined land/pad size tolerance measured at crest shall be +/- 0.001”.

Etched Trace/Pad Considerations

Final PCB Plating Finish

May Have An Effect On
Copper Etching Process
And Assembly Reliability

Electroplated Nickel Used As Etch Resist

During Gold Plating Process

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Solder Mask Opening Design

Pad Geometries
– Non-Solder Mask Defined (NSMD)
■ Size of Pad Defined By Copper Pad and
Interconnections (Variable Size)
■ Solder Encapsulates Pad
■ Limited to Components With Lead Pitch Greater
Than 0.4mm

– Solder Mask Defined (SMD)

■ Size of Pad Defined By Solder Mask Opening
(Uniform Size)
■ Solder Covers Exposed Pad (Fills Opening)
■ Required For Components With Lead Pitch 0.4mm or
Less.
■ Preferred for Leadless Array Devices Like LGA’s,
Multi-row QFN’s, etc.

Solder Mask Defined Pads

PCB fabricator reduced solder mask openings greater than 0.002”

resulting in solder paste being printed on top of solder mask.

Results was a slight excess of solder paste on top of solder mask

resulting in solder balls under component package.

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Solder Mask Defined Pads

Problem:
IPC specifications do not have a size tolerance requirement for
solder mask defined pads. IPC tolerances only address solder
mask clearances around non-solder mask defined pads. For
BGA components only, the tolerances are for registration
(encroachment) only, not for opening size.

Solution:
Develop fabrication note that will specify tolerance of solder
mask openings on solder mask defined pads. This tolerance
may be limited to opening dimensions less than a maximum
dimension

PCB Fabricator Variation

Solder Mask Fabrication

Consistency
Fabrication Note Interpretation
“No Solder Mask Permissible On
Pads Unless Provided This
Way On Supplied Artwork ”
(Selective Solder Mask Opening
Changes Between PCB Suppliers)

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PCB Fabricator Lamination Variation

Tolerances Between Suppliers Can

Impact Assembly And Soldering
Processes.
Industry Tolerances May Not Meet
Requirements For Today’s Assembly

Layer Result (PCB A),mil Result (PCB B),mil Different,%

L2 1.1 1.4 27.2
L3 0.5 0.6 20.0
L4 0.5 0.6 20.0
L5 0.5 0.6 20.0
L6 0.5 0.6 20.0
L7 1.2 1.4 16.7

Signal Layer Design

Traditionally, thieving was added to layers to balance

etching issues. This increased the copper percentage on
the layers but still total copper percentage was below 50%.

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Signal Layer Design

Today, The Copper Coverage Percentage On Signal Layers Is Increasing As
Layers Are Poured With Solid Copper For Functionality Reasons

Signal Layer Design

Today, The Copper Coverage Percentage On Signal Layers Is Increasing As
Layers Are Poured With Solid Copper For Functionality Reasons

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Removal Of Copper Plane And Unused Pads

Removal Of Copper Planes

And Unused Pads
Concentrated In A
Localized Area Can Result
In Changes In PCB
Thickness (Flatness).
These Changes Under
Components With Limited
Coplanarity Compatibility
Can Result In Open Solder
Connections.

Unbalanced Copper Density Under Package

Fine Pitched BGA With Micro-Via-

In-Pad Design.
PCB Design Was A 1-6-1
Construction
Unbalanced Copper Density On
Layer Directly Beneath Package
– Localized PCB Thickness Variation

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Silk Screen Design - Low Standoff Packages

Silk Screen Should Not Be

Placed Under Body Of Low
Standoff Components
– Increased Gap For Solder
To Bridge During Solder
Reflow Process
– Potential Tilting Of
Components (Open
Connection)
– Potential Latent Field
Failure With Partial Solder
Connection

Silk Screen Design - Low Standoff Packages

Low Component Stand-off

Height
Excessive PCB to
Component Standoff Height
– Open Joint
Tilted Component
Open Joints (one edge or
center standoff from PCB)
Misalignment
Component Types
Leadless
• QFN, DFN, LCC

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Silk Screen Design

Low Component Standoff
Height
Tilted Component
Open Joints (standoff from
PCB)
Misalignment
Component Types
Leadless
– QFN, DFN, Passives, etc.
Fine Pitch Area Array
– BGA, WL-CSP, CSP, etc.

Silk Screen Design

Low Component Standoff
Height
Tilted Component
Open Joints (standoff from
PCB)
Misalignment
Component Types
Leadless
– QFN, DFN, Passives, etc.
Fine Pitch Area Array
– BGA, WL-CSP, CSP, etc.

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Thank You!

Questions

51
 Course Evaluations

Thank you for registering for an IPC APEX EXPO Professional

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DFT and more - Part 1, please take a few minutes to let us know
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Content may differ slightly from the material presented in class.

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