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Chap 02

The document discusses logic gates and binary logic. It defines basic logical operations and introduces logic gate symbols. Truth tables are presented as a way to represent the values of a function. Combinational logic circuits are implemented using logic gates and their behavior is shown in timing diagrams.

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0% found this document useful (0 votes)
26 views

Chap 02

The document discusses logic gates and binary logic. It defines basic logical operations and introduces logic gate symbols. Truth tables are presented as a way to represent the values of a function. Combinational logic circuits are implemented using logic gates and their behavior is shown in timing diagrams.

Uploaded by

charbelkhalil05
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Logic and Computer Design Fundamentals

Chapter 2 – Combinational
Logic Circuits
Binary Logic and Gates
▪ Digital circuits are hardware components that
manipulate binary information.
▪ The circuits are implemented using
transistors and interconnections in complex
semiconductor devices called integrated
circuits.
▪ Each basic circuit is referred to as logic gate.

Chapter 2 - Part 1 2
Binary Logic and Gates
▪ Binary variables take on one of two discrete values.
Variables are designated as letters A, B, C, X, Y, and Z.
▪ Logical operators operate on binary values and binary
variables.
▪ Basic logical operators are the logic functions AND, OR
and NOT.
▪ Logic gates implement logic functions.
▪ Boolean Algebra: a useful mathematical system for
specifying and transforming logic functions.
▪ We study Boolean algebra as a foundation for designing
and analyzing digital systems!

Chapter 2 - Part 1 3
Binary Variables
▪ Recall that the two binary values have
different names:
• True/False
• On/Off
• Yes/No
• 1/0
▪ We use 1 and 0 to denote the two values.
▪ Variable identifier examples:
• A, B, y, z, or X1

Chapter 2 - Part 1 4
Logical Operations
▪ The three basic logical operations are:
• AND
• OR
• NOT
▪ AND is denoted by a dot (·).
▪ OR is denoted by a plus (+).
▪ NOT is denoted by an overbar ( ¯ ), a
single quote mark (') after, or (~) before
the variable.
Chapter 2 - Part 1 5
Notation Examples
▪ Examples:
• Y = A  B is read “Y is equal to A AND B.”
• z = x + y is read “z is equal to x OR y.”
• X = A is read “X is equal to NOT A.”
▪ Note: The statement:
1 + 1 = 2 (read “one plus one equals two”)
is not the same as
1 + 1 = 1 (read “1 or 1 equals 1”).

Chapter 2 - Part 1 6
Truth Tables
▪ Truth table - a tabular listing of the values of a
function for all possible combinations of values on its
arguments
▪ Example: Truth tables for the basic logic operations:
AND OR NOT
X Y Z = X·Y X Y Z = X+Y X Z=X
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
Chapter 2 - Part 1 7
Logic Gate Symbols and Behavior
▪ Logic gates have special symbols:
X ▪ Z 5= X · Y
X
Z5
= X+
1 Y X Z 5= X
Y Y
AND gate OR gate NOT gate or
inverter
(a) Graphic symbols
▪ And waveform behavior in time as follows:
X 0 0 1 1

Y 0 1 0 1

(AND) X ·Y 0 0 0 1

(OR) X 1+ Y 0 1 1 1

(NOT) X 1 1 0 0
(b) Timing diagram
Chapter 2 - Part 1 8
Gate Delay
▪ In actual physical gates, if one or more input
changes causes the output to change, the output
change does not occur instantaneously.
▪ The delay between an input change(s) and the
resulting output change is the gate delay
denoted by tG:
1
Input
0
tG tG tG = 0.3 ns
1
Output
0
0 0.5 1 1.5 Time (ns)
Chapter 2 - Part 1 9
Logic Diagrams and Expressions
Truth Table Equation
XYZ F = X + Y Z
000 0 F = X +Y Z
001 1
010 0 Logic Diagram
011 0 X
100 1
Y F
101 1
110 1 Z
111 1
▪ Boolean equations, truth tables and logic diagrams describe
the same function!
▪ Truth tables are unique; expressions and logic diagrams are
not. This gives flexibility in implementing functions.
Chapter 2 - Part 1 10
Boolean Algebra
▪ An algebraic structure defined on a set of at least two elements, A,
B, together with three binary operators (denoted +, · and ) that
satisfies the following basic identities:

1. X+0= X 2. X .1 =X
3. X+1 =1 4. X .0 =0
5. X+X =X 6. X .X = X
7. X+X =1 8. X .X = 0
9. X=X
10. X + Y = Y + X 11. XY = YX Commutative
12. (X + Y) + Z = X + (Y + Z) 13. (XY) Z = X(YZ) Associative
14. X(Y + Z) = XY + XZ 15. X + YZ = (X + Y) (X + Z) Distributive
16. X + Y = X . Y 17. X . Y = X + Y DeMorgan’s

Chapter 2 - Part 1 11
Boolean Operator Precedence
▪ The order of evaluation in a Boolean
expression is:
1. Parentheses
2. NOT
3. AND
4. OR
▪ Consequence: Parentheses appear
around OR expressions
▪ Example: F = A(B + C)(C + D)

Chapter 2 - Part 1 12
Example 1: Boolean Algebraic Proof
▪ A + A·B = A (Absorption Theorem)
Proof Steps Justification (identity or theorem)
A + A·B
= A·1+A·B X=X·1
= A · ( 1 + B) X · Y + X · Z = X ·(Y + Z)(Distributive Law)
=A·1 1+X=1
=A X·1=X

▪ Our primary reason for doing proofs is to learn:


• Careful and efficient use of the identities and theorems of
Boolean algebra, and
• How to choose the appropriate identity or theorem to apply
to make forward progress, irrespective of the application.

Chapter 2 - Part 1 13
Example 2: Boolean Algebraic Proofs
▪ AB + A’C + BC = AB + A’C (Consensus Theorem)

Justification 1: 1 .X = X
▪ Justification 2: X + X’ = 1
▪ = AB + A’C + ABC + A’BC X(Y + Z) = XY + XZ (Distributive Law)
▪ = AB + ABC + A’C + A’BC X + Y = Y + X (Commutative Law)
▪ = AB . 1 + ABC + A’C . 1 + A’C . B X . 1 = X, X.Y = Y.X
(Commutative Law)
▪ = AB (1 + C) + A’C (1 + B) X(Y + Z) = XY +XZ (Dist. Law)
▪ = AB . 1 + A’C . 1 = AB + A’C X .1 = X

Chapter 2 - Part 1 14
Example 3: Boolean Algebraic Proofs
▪ ( X + Y ) Z + X Y = Y( X + Z )
Proof Steps Justification (identity or theorem)
( X + Y )Z + X Y
= X’ Y’ Z + X Y’ (A + B)’ = A’ . B’ (DeMorgan’s Law)

= Y’ X’ Z + Y’ X A . B = B . A (Commutative Law)

= Y’(X’ Z + X) A(B + C) = AB + AC (Distributive Law)

= Y’ (X’ + X)(Z + X) A + BC = (A + B)(A + C) (Distributive Law)

= Y’ . 1 . (Z + X) A + A’ = 1

= Y’ (X + Z) 1 . A = A, A + B = B + A (Commutative Law)

Chapter 2 - Part 1 15
Boolean Function Evaluation
F1 = xy z x y z F1 F2 F3 F4
F2 = x + yz 0 0 0 0 0 1 0
F3 = x y z + x y z + x y 0 0 1 0 1 0 1
F4 = x y + x z 0 1 0 0 0 0 0
0 1 1 0 0 1 1
1 0 0 0 1 1 1
1 0 1 0 1 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 0

Chapter 2 - Part 1 16
Expression Simplification
▪ An application of Boolean algebra
▪ Simplify to contain the smallest number
of literals (complemented and
uncomplemented variables):
A B + ACD + A BD + AC D + A BCD
= AB + ABCD + A C D + A C D + A B D
= AB + AB(CD) + A C (D + D) + A B D
= AB + A C + A B D = B(A + AD) +AC
= B (A + D) + A C 5 literals
Chapter 2 - Part 1 17
Complementing Functions
▪ Use DeMorgan's Theorem to
complement a function:
1. Interchange AND and OR operators
2. Complement each constant value and
literal
▪ Example: Complement F = xy z + x y z
F = (x + y + z)(x + y + z)
▪ Example: Complement G = (a + bc)d + e
G = ((a (b' + c'))+ d ) e'
Chapter 2 - Part 1 18
Canonical Forms
▪ It is useful to specify Boolean functions in
a form that:
• Allows comparison for equality.
• Has a correspondence to the truth tables
▪ Canonical Forms in common usage:
• Sum of Minterms (SOM)
• Product of Maxterms (POM)

Chapter 2 - Part 1 19
Minterms
▪ Minterms are AND terms with every variable
present in either true or complemented form.
▪ Given that each binary variable may appear
normal (e.g., x) or complemented (e.g., x ), there
are 2n minterms for n variables.
▪ Example: Two variables (X and Y)produce
2 x 2 = 4 combinations:
XY (both normal)
X Y (X normal, Y complemented)
XY (X complemented, Y normal)
X Y (both complemented)
▪ Thus there are four minterms of two variables.
Chapter 2 - Part 1 20
Maxterms
▪ Maxterms are OR terms with every variable in
true or complemented form.
▪ Given that each binary variable may appear
normal (e.g., x) or complemented (e.g., x), there
are 2n maxterms for n variables.
▪ Example: Two variables (X and Y) produce
2 x 2 = 4 combinations:
X + Y (both normal)
X + Y (x normal, y complemented)
X + Y (x complemented, y normal)
X + Y (both complemented)
Chapter 2 - Part 1 21
Maxterms and Minterms
▪ Examples: Two variable minterms and
maxterms.
Index Minterm Maxterm
0 xy x+y
1 xy x+y
2 xy x+y
3 xy x+y
▪ The index above is important for describing
which variables in the terms are true and
which are complemented.
Chapter 2 - Part 1 22
Purpose of the Index
▪ The index for the minterm or maxterm,
expressed as a binary number, is used to
determine whether the variable is shown in the
true form or complemented form.
▪ For Minterms:
• “1” means the variable is “Not Complemented” and
• “0” means the variable is “Complemented”.
▪ For Maxterms:
• “0” means the variable is “Not Complemented” and
• “1” means the variable is “Complemented”.

Chapter 2 - Part 1 23
Index Example in Three Variables
▪ Example: (for three variables)
▪ Assume the variables are called X, Y, and Z.
▪ The standard order is X, then Y, then Z.
▪ The Index 0 (base 10) = 000 (base 2) for three
variables). All three variables are complemented
for minterm 0 ( X , Y, Z) and no variables are
complemented for Maxterm 0 (X,Y,Z).
• Minterm 0, called m0 is X Y Z .
• Maxterm 0, called M0 is (X + Y + Z).
• Minterm 6 ? m6 = X Y Z’
• Maxterm 6 ? M6 = (X’ + Y’ + Z)
Chapter 2 - Part 1 24
Index Examples – Four Variables
Index Binary Minterm Maxterm
i Pattern mi Mi
0 0000 abcd a+b+c+d
1 0001 abcd ?
3 0011 ? a+b+c+d
5 0101 abcd a+b+c+d
7 0111 ? a+b+c+d
10 1010 abcd a+b+c+d
13 1101 abcd ?
15 1111 abcd a+b+c+d

Chapter 2 - Part 1 25
Minterm and Maxterm Relationship
▪ Review: DeMorgan's Theorem
x · y = x + y and x + y = x  y
▪ Two-variable example:
M 2 = x + y and m 2 = x·y
Thus M2 is the complement of m2 and vice-versa.
▪ Since DeMorgan's Theorem holds for n variables,
the above holds for terms of n variables
▪ giving:
M i = m i and m i = M i
Thus Mi is the complement of mi.

Chapter 2 - Part 1 26
Function Tables for Both
▪ Minterms of Maxterms of
2 variables 2 variables
xy m0 m1 m2 m3 x y M0 M1 M2 M3
00 1 0 0 0 00 0 1 1 1
01 0 1 0 0 01 1 0 1 1
10 0 0 1 0 10 1 1 0 1
11 0 0 0 1 11 1 1 1 0

▪ Each column in the maxterm function table is the


complement of the column in the minterm function
table since Mi is the complement of mi.
Chapter 2 - Part 1 27
Observations
▪ In the function tables:
• Each minterm has one and only one 1 present in the 2n terms
(a minimum of 1s). All other entries are 0.
• Each maxterm has one and only one 0 present in the 2n terms
All other entries are 1 (a maximum of 1s).
▪ We can implement any function by "ORing" the
minterms corresponding to "1" entries in the function
table. These are called the minterms of the function.
▪ We can implement any function by "ANDing" the
maxterms corresponding to "0" entries in the function
table. These are called the maxterms of the function.
▪ This gives us two canonical forms:
• Sum of Minterms (SOM)
• Product of Maxterms (POM)
for stating any Boolean function.
Chapter 2 - Part 1 28
Minterm Function Example
▪ Example: Find F1 = m1 + m4 + m7
▪ F1 = x y z + x y z + x y z
x y z index m1 + m4 + m7 = F1
000 0 0 + 0 + 0 =0
001 1 1 + 0 + 0 =1
010 2 0 + 0 + 0 =0
011 3 0 + 0 + 0 =0
100 4 0 + 1 + 0 =1
101 5 0 + 0 + 0 =0
110 6 0 + 0 + 0 =0
111 7 0 + 0 + 1 =1
Chapter 2 - Part 1 29
Minterm Function Example
▪ F(A, B, C, D, E) = m2 + m9 + m17 + m23
▪ F(A, B, C, D, E) =A’B’C’DE’ +
A’BC’D’E + AB’C’D’E + AB’CDE

Chapter 2 - Part 1 30
Maxterm Function Example
▪ Example: Implement F1 in maxterms:
F1 = M0 · M2 · M3 · M5 · M6
F1 = (x + y + z) ·(x + y + z)·(x + y + z )
·(x + y + z )·(x + y + z)
xyz i M0  M2  M 3  M5  M6 = F1
000 0 0  1  1  1  1 =0
001 1 1  1  1  1  1 =1
010 2 1  0  1  1  1 =0
011 3 1  1  0  1  1 =0
100 4 1  1  1  1  1 =1
101 5 1  1  1  0  1 =0
110 6 1  1  1  1  0 =0
111 7 1  1  1  1  1 =1
Chapter 2 - Part 1 31
Maxterm Function Example
▪ F( A, B, C, D) = M 3  M8  M11  M14
▪ F(A, B,C,D) = (A + B + C’ + D’) (A’ + B + C + D)
(A’ + B + C’ + D’) (A’ + B’ + C’ + D)

Chapter 2 - Part 1 32
Shorthand SOM Form
▪ From the previous example, we started with:
F=A+BC
▪ We ended up with:
F = m1+m4+m5+m6+m7
▪ This can be denoted in the formal shorthand:
F( A , B, C) = m(1,4,5,6,7 )
▪ Note that we explicitly show the standard
variables in order and drop the “m”
designators.

Chapter 2 - Part 1 33
Function Complements
▪ The complement of a function expressed as a
sum of minterms is constructed by selecting the
minterms missing in the sum-of-minterms
canonical forms.
▪ Alternatively, the complement of a function
expressed by a Sum of Minterms form is simply
the Product of Maxterms with the same indices.
▪ Example:
▪ F (x,y,z) = ∑ m (1,3,5,7) = ∏M(0,2,4,6)
▪ F’(x,y,z) = ∑ m (0,2,4,6) = ∏M(1,3,5,7)
Chapter 2 - Part 1 34
Standard Sum-of-Products (SOP)
▪ A Simplification Example:
▪ F( A , B, C) = m(1,4,5,6,7 )
▪ Writing the minterm expression:
F = A B C + A B C + A B C + ABC + ABC
▪ Simplifying:
▪ F =A’ B’ C + A (B’ C’ + B C’ + B’ C + B C)
= A’ B’ C + A (B’ + B) (C’ + C)
= A’ B’ C + A.1.1
= A’ B’ C + A
= B’C + A
▪ Simplified F contains 3 literals compared to 15 in
minterm F
Chapter 2 - Part 1 35
AND/OR Two-level Implementation
of SOP Expression
▪ The two implementations for F are shown
below – it is quite apparent which is simpler!
A
B
A
C F
A B
B C
C
A
B F
C
A
B
C
A
B
C
Chapter 2 - Part 1 36
Circuit Optimization
▪ Goal: To obtain the simplest
implementation for a given function
▪ Optimization is a more formal approach
to simplification that is performed using
a specific procedure or algorithm
▪ Optimization requires a cost criterion to
measure the simplicity of a circuit
▪ Distinct cost criteria we will use:
• Literal cost (L)
• Gate input cost (G)
• Gate input cost with NOTs (GN)
Chapter 2 - Part 2 37
Literal Cost
▪ Literal – a variable or its complement
▪ Literal cost – the number of literal appearances
in a Boolean expression corresponding to the logic
circuit diagram
▪ Examples:
• F = BD + A B’ C + AC’D’ L=8
• F = BD + A B’ C + AB’D’ + AB C’ L = 11
• F = (A + B)(A + D)(B + C + D’)( B’+C’+ D) L = 10
• Which solution is best?

Chapter 2 - Part 2 38
Gate Input Cost
▪ Gate input costs - the number of inputs to the gates in the implementation
corresponding exactly to the given equation or equations. (G - inverters not
counted, GN - inverters counted)
▪ For SOP and POS equations, it can be found from the equation(s) by
finding the sum of:
• all literal appearances
• the number of terms excluding single literal terms,(G) and
• optionally, the number of distinct complemented single literals (GN).
▪ Example:
• F = BD + A B’C + AC’D’
• F = BD + A B’ C + A B’D+ ABC’
• F = (A +B’)(A + D)(B + C + D’) (B’+C’+ D)
• Which solution is best?

Chapter 2 - Part 2 39
Karnaugh Maps (K-map)
▪ A K-map is a collection of squares
• Each square represents a minterm
• The collection of squares is a graphical representation
of a Boolean function
• Adjacent squares differ in the value of one variable
• Alternative algebraic expressions for the same function
are derived by recognizing patterns of squares
▪ The K-map can be viewed as
• A reorganized version of the truth table
• A topologically-warped Venn diagram as used to
visualize sets in algebra of sets

Chapter 2 - Part 2 40
Two Variable Maps
▪ A 2-variable Karnaugh Map:
• Note that minterm m0 and y=0 y=1

minterm m1 are “adjacent” x = 0 m 0 = m 1 =


and differ in the value of the x y x y

variable y x=1
m 2= m 3=
x y
• Similarly, minterm m0 and x y

minterm m2 differ in the x variable.


• Also, m1 and m3 differ in the x variable as
well.
• Finally, m2 and m3 differ in the value of the
variable y
Chapter 2 - Part 2 41
K-Map and Truth Tables
▪ The K-Map is just a different form of the truth table.
▪ Example – Two variable function:
• We choose a,b,c and d from the set {0,1} to
implement a particular function, F(x,y).
Function Table K-Map

Input Function
Values Value y=0 y=1
(x,y) F(x,y)
x=0 a b
00 a
01 b x=1 c d
10 c
11 d

Chapter 2 - Part 2 42
K-Map Function Representation
▪ Example: F(x,y) = x F=x y=0 y=1

x=0 0 0

x=1 1 1

▪ For function F(x,y), the two adjacent cells


containing 1’s can be combined using the
Minimization Theorem:
F(x, y ) = x y + x y = x

Chapter 2 - Part 2 43
K-Map Function Representation
▪ Example: G(x,y) = x + y G = x+y y=0 y=1

x=0 0 1

x=1 1 1

▪ For G(x,y), two pairs of adjacent cells containing


1’s can be combined using the Minimization
Theorem:
G(x, y ) = (x y + x y)+ ( xy + x y) = x + y

Duplicate x y

Chapter 2 - Part 2 44
Three Variable Maps
▪ A three-variable K-map:
yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2

x=1 m4 m5 m7 m6

▪ Where each minterm corresponds to the product


terms:
yz=00 yz=01 yz=11 yz=10

x y z x y z x y z x y z
x=0

x y z x y z x y z x y z
x=1

▪ Note that if the binary value for an index differs in one


bit position, the minterms are adjacent on the K-Map

Chapter 2 - Part 2 45
Alternative Map Labeling
▪ Map use largely involves:
• Entering values into the map, and
• Reading off product terms from the
map.
▪ Alternate labelings are useful:
y
yz
y
y x 00 01 11 10

0 1 3 2
x 0 0 1 3 2

x 4 5 7 6
x
1 4 5 7 6

z z z
z
Chapter 2 - Part 2 46
Example Functions
▪ By convention, we represent the minterms of F by a "1"
in the map and leave the minterms of F blank
▪ Example: y
F(x, y, z) = m(2,3,4,5) 0 1 31 21

x 41 5 1 7 6

▪ Example: z
G(a, b, c) = m(3,4,6,7) y
0 1 3 1 2

x 4 1 5 7 1 6 1

Chapter 2 - Part 2 47
Example: Combining Squares
▪ Example: Let F = m(2,3,6,7) y
0 1 3 1 21

x 4 5 7 1 6 1

z
▪ Applying the Minimization Theorem three
times:
F(x, y, z) = x y z + x y z + x y z + x y z
= yz + y z
= y
▪ Thus the four terms that form a 2 × 2 square
correspond to the term "y".
Chapter 2 - Part 2 48
Three-Variable Maps
▪ Topological warps of 3-variable K-maps
that show all adjacencies:
▪ Venn Diagram  Cylinder

0 X
4

6 5
7
Y 3 Z
2 1

Chapter 2 - Part 2 49
Three-Variable Maps
▪ Example Shapes of 2-cell Rectangles:
y
0 1 3 2

4 5 7 6

z
▪ Read off the product terms for the
rectangles shown
Chapter 2 - Part 2 50
Three-Variable Maps
▪ Example Shapes of 4-cell Rectangles:
y
0 1 3 2

4 5 7 6

z
▪ Read off the product terms for the
rectangles shown
Chapter 2 - Part 2 51
Three Variable Maps
▪ K-Maps can be used to simplify Boolean functions by
systematic methods. Terms are selected to cover the
“1s”in the map.
▪ Example: Simplify
F(x, y, z) = m(1,2,3,5,7)
x y
z
y

1 1 1

x 1 1

z
F(x, y, z) = z + x y

Chapter 2 - Part 2 52
Three-Variable Map Simplification
▪ Use a K-map to find an optimum SOP
equation for F(X, Y, Z) = m(0,1,2,4,6,7)

F = Z’ + X’ Y’ + X Y

Chapter 2 - Part 2 53
Four Variable Maps
▪ Map and location of minterms:
Y

0 1 3 2

4 5 7 6

X
12 13 15 14

W
11 10
8 9

Chapter 2 - Part 2 54
Four Variable Terms

Four variable maps can have rectangles corresponding to:


A single 1 = 4 variables, (i.e. Minterm)
Two 1s = 3 variables,
Four 1s = 2 variables
Eight 1s = 1 variable,
Sixteen 1s = zero variables (i.e. Constant "1")

Chapter 2 - Part 2 55
Four-Variable Maps
▪ Example Shapes of Rectangles:
Y

0 1 3 2

4 5 7 6

X
12 13 15 14

W
8 9 11 10

Chapter 2 - Part 2 56
Four-Variable Maps
▪ Example Shapes of Rectangles:
Y

0 1 3 2

4 5 7 6

X
12 13 15 14

W
8 9 11 10

Chapter 2 - Part 2 57
Four-Variable Map Simplification

▪ F(W,X,Y,Z) = ∑(3,4,5,7,9,13,14,15)
▪ F = W' X Y' + W' Y Z + WXY + WY'Z

Chapter 2 - Part 1 58
Example of Prime Implicants
▪ Find ALL Prime Implicants
CD ESSENTIAL Prime Implicants
C C
B D B D

1 1 1 1 1 1

BD 1 1 BD 1 1

B B

1 1 1 1
A A
1 1 1 1 1 1 1 1
A B

D D
AD Minterms covered by single prime implicant
B C

Chapter 2 - Part 2 59
Don't Cares in K-Maps
▪ Sometimes a function table or map contains entries for
which it is known:
• the input values for the minterm will never occur, or
• The output value for the minterm is not used
▪ In these cases, the output value need not be defined
▪ Instead, the output value is defined as a “don't care”
▪ By placing “don't cares” ( an “x” entry) in the function table
or map, the cost of the logic circuit may be lowered.
▪ Example 1: A logic function having the binary codes for the
BCD digits as its inputs. Only the codes for 0 through 9 are
used. The six codes, 1010 through 1111 never occur, so the
output values for these codes are “x” to represent “don’t
cares.”

Chapter 2 - Part 2 60
Product of Sums Example
▪ Find the optimum POS solution:
F(A, B, C, D) = m(3,9,11,12,13,14,15) +
d (1,4,6)
• Hint: Use F and complement it to get the
result.

▪ F' = B' D' + A' B


▪ F = (B + D)(A + B')

Chapter 2 - Part 2 61
Buffer
▪ A buffer is a gate with the function F = X:
X F

▪ In terms of Boolean function, a buffer is the


same as a connection!
▪ So why use it?
• A buffer is an electronic amplifier used to
improve circuit voltage levels and increase the
speed of circuit operation.

Chapter 2 - Part 3 62
NAND Gate
▪ The basic NAND gate has the following symbol,
illustrated for three inputs:
• AND-Invert (NAND)
X
Y F( X, Y, Z) = X  Y  Z
Z

▪ NAND represents NOT AND, i. e., the AND


function with a NOT applied. The symbol shown
is an AND-Invert. The small circle (“bubble”)
represents the invert function.

Chapter 2 - Part 3 63
NAND Gates (continued)
▪ Applying DeMorgan's Law gives Invert-OR (NAND)
X
Y F( X, Y, Z) = X + Y + Z
Z

▪ This NAND symbol is called Invert-OR, since inputs are


inverted and then ORed together.
▪ AND-Invert and Invert-OR both represent the NAND
gate. Having both makes visualization of circuit function
easier.
▪ A NAND gate with one input degenerates to an inverter.

Chapter 2 - Part 3 64
NAND Gates (continued)
▪ The NAND gate is the natural implementation for
CMOS technology in terms of chip area and speed.
▪ Universal gate - a gate type that can implement any
Boolean function.
▪ The NAND gate is a universal gate.
▪ NAND usually does not have an operation symbol
defined since
• the NAND operation is not associative, and
• we have difficulty dealing with non-associative mathematics!

Chapter 2 - Part 3 65
NOR Gate
▪ The basic NOR gate has the following symbol,
illustrated for three inputs:
• OR-Invert (NOR)
X
Y F( X, Y, Z) = X + Y + Z
Z

▪ NOR represents NOT - OR, i. e., the OR function


with a NOT applied. The symbol shown is an
OR-Invert. The small circle (“bubble”) represents
the invert function.

Chapter 2 - Part 3 66
NOR Gate (continued)
▪ Applying DeMorgan's Law gives Invert-AND
(NOR)
X
Y

▪ This NOR symbol is called Invert-AND, since


inputs are inverted and then ANDed together.
▪ OR-Invert and Invert-AND both represent the
NOR gate. Having both makes visualization of
circuit function easier.
▪ A NOR gate with one input degenerates to an
inverter.
Chapter 2 - Part 3 67
NOR Gate (continued)
▪ The NOR gate is a natural implementation for some
technologies other than CMOS in terms of chip area
and speed.
▪ The NOR gate is a universal gate
▪ NOR usually does not have a defined operation
symbol since
• the NOR operation is not associative, and
• we have difficulty dealing with non-associative
mathematics!

Chapter 2 - Part 3 68
Exclusive OR/ Exclusive NOR
▪ The eXclusive OR (XOR) function is an important
Boolean function used extensively in logic circuits.
▪ The XOR function may be;
• implemented directly as an electronic circuit (truly a gate) or
• implemented by interconnecting other gate types (used as a
convenient representation)
▪ The eXclusive NOR function is the complement of the
XOR function
▪ By our definition, XOR and XNOR gates are complex
gates.

Chapter 2 - Part 3 69
Exclusive OR/ Exclusive NOR
▪ Uses for the XOR and XNORs gate include:
• Adders/subtractors/multipliers
• Counters/incrementers/decrementers
• Parity generators/checkers
▪ Definitions
• The XOR function is: X  Y = X Y + X Y
• The eXclusive NOR (XNOR) function, otherwise
known as equivalence is: X  Y = X Y + X Y
▪ Strictly speaking, XOR and XNOR gates do no
exist for more that two inputs. Instead, they are
replaced by odd and even functions.
Chapter 2 - Part 3 70
Truth Tables for XOR/XNOR
▪ Operator Rules: XOR XNOR
X Y X Y X Y (X  Y)
or X  Y

0 0 0 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 1
▪ The XOR function means:
X OR Y, but NOT BOTH
▪ Why is the XNOR function also known as the
equivalence function, denoted by the operator ?

Chapter 2 - Part 3 71
XOR/XNOR (Continued)
▪ The XOR function can be extended to 3 or more variables.
For more than 2 variables, it is called an odd function or
modulo 2 sum (Mod 2 sum), not an XOR:
X  Y  Z = X Y Z + X Y Z + X Y Z + X Y Z
▪ The complement of the odd function is the even function.
▪ The XOR identities:

X  0 = X X  1 = X
X  X = 0 X  X = 1
X  Y = Y  X
(X  Y)  Z = X  (Y  Z) = X  Y  Z

Chapter 2 - Part 3 72
Symbols For XOR and XNOR
▪ XOR symbol:

▪ XNOR symbol:

▪ Shaped symbols exist only for two inputs

Chapter 2 - Part 3 73
Odd and Even Functions
▪ The odd and even functions on a K-map form
“checkerboard” patterns.
▪ The 1s of an odd function correspond to minterms
having an index with an odd number of 1s.
▪ The 1s of an even function correspond to minterms
having an index with an even number of 1s.
▪ Implementation of odd and even functions for greater
than four variables as a two-level circuit is difficult, so
we use “trees” made up of :
• 2-input XOR or XNORs
• 3- or 4-input odd or even functions
Example: Odd Function Implementation
▪ Design a 3-input odd function F = X + Y+ Z
with 2-input XOR gates
▪ Factoring, F = (X + Y) + Z
▪ The circuit:
X

Y
F
Z
Example: Even Function Implementation
▪ Design a 4-input odd function F = W + X+ Y + Z
with 2-input XOR and XNOR gates
▪ Factoring, F = (W + X) + (Y + Z)
▪ The circuit:
W

X
F
Y

Z
Hi-Impedance Outputs
▪ Logic gates introduced thus far
• have 1 and 0 output values,
• cannot have their outputs connected together, and
• transmit signals on connections in only one direction.
▪ Three-state logic adds a third logic value, Hi-
Impedance (Hi-Z), giving three states: 0, 1, and Hi-Z
on the outputs.
▪ The presence of a Hi-Z state makes a gate output as
described above behave quite differently:
• “1 and 0” become “1, 0, and Hi-Z”
• “cannot” becomes “can,” and
• “only one” becomes “two”
Hi-Impedance Outputs (continued)
▪ What is a Hi-Z value?
• The Hi-Z value behaves as an open circuit
• This means that, looking back into the circuit, the output
appears to be disconnected.
• It is as if a switch between the internal circuitry and the
output has been opened.
▪ Hi-Z may appear on the output of any gate, but we
restrict gates to:
• a 3-state buffer, or
• Optional: a transmission gate (See Reading Supplement:
More on CMOS Circuit-Level Design),
each of which has one data input and one control
input.
The 3-State Buffer
▪ For the symbol and truth table, IN
Symbol
is the data input, and EN, the
control input.
IN OUT
▪ For EN = 0, regardless of the
value on IN (denoted by X), the
EN
output value is Hi-Z.
▪ For EN = 1, the output value Truth Table
follows the input value.
EN IN OUT
▪ Variations:
0 X Hi-Z
• Data input, IN, can be inverted
• Control input, EN, can be inverted 1 0 0
by addition of “bubbles” to signals. 1 1 1

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