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Lec 3

Floorplanning involves optimally arranging blocks on a chip to minimize area and wirelength. It takes a set of blocks and a netlist as inputs. The objectives are to minimize area, reduce critical wirelength, and maximize routability. Simulated annealing is commonly used to solve floorplanning, where the solution space is represented by normalized Polish expressions and perturbations involve swapping adjacent operands or operators. The cost function evaluates the area and total wirelength to guide the annealing process towards optimal floorplans.

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0% found this document useful (0 votes)
119 views

Lec 3

Floorplanning involves optimally arranging blocks on a chip to minimize area and wirelength. It takes a set of blocks and a netlist as inputs. The objectives are to minimize area, reduce critical wirelength, and maximize routability. Simulated annealing is commonly used to solve floorplanning, where the solution space is represented by normalized Polish expressions and perturbations involve swapping adjacent operands or operators. The cost function evaluates the area and total wirelength to guide the annealing process towards optimal floorplans.

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Floorplanning

• Inputs to the floorplanning problem:


– A set of blocks, fixed or flexible.
– Pin locations of fixed blocks.
– A netlist.
• Objectives: Minimize area, reduce wirelength for (critical) nets, max-
imize routability, determine shapes of flexible blocks

7 5 5
7 3
4

6 6 4
2
1 3 1 2

An optimal floorplan,
in terms of area A non−optimal floorplan

1
Floorplan Design
x
Modules: y

Area: A=xy
g e Aspect ratio: r <= y/x <= s
d
Rotation:
f
Module connectivity
b
c a 2 b
a
3 1 3 6
c 5 d
5
2 f
e

2
Floorplanning: Terminology
• Rectangular dissection: Subdivision of a given rectangle by a finite #
of horizontal and vertical line segments into a finite # of non-overlapping
rectangles.
• Slicing structure: a rectangular dissection that can be obtained by
repetitively subdividing rectangles horizontally or vertically.
• Slicing tree: A binary tree, where each internal node represents a vertical
cut line or horizontal cut line, and each leaf a basic rectangle.
• Skewed slicing tree: One in which no node and its right child are the
same.
V V
3 3 H H H H
1
1 5
4 4 5 2 1 H 3 2 1 V H

2 V V 6 7 V 3
2 6 7 6 7
6 7 4 5 4 5
Non−slicing floorplan Slicing floorplan A slicing tree (skewed) Another slicing tree
(non−skewed)

3
Floorplan Design by Simulated Annealing

• Related work

– Wong & Liu, “A new algorithm for floorplan design,” DAC’86.

∗ Consider slicing floorplans.

– Wong & Liu, “Floorplan design for rectangular and L-shaped mod-
ules,” ICCAD’87.

∗ Also consider L-shaped modules.

– Wong, Leong, Liu, Simulated Annealing for VLSI Design, pp. 31–71,
Kluwer academic Publishers, 1988.
• Ingredients: solution space, neighborhood structure, cost function, an-
nealing schedule?

4
Solution Representation
• An expression E = e1 e2 . . . e2n−1 , where ei ∈ {1, 2, . . . , n, H, V }, 1 ≤ i ≤
2n − 1, is a Polish expression of length 2n − 1 iff
1. every operand j, 1 ≤ j ≤ n, appears exactly once in E;
2. (the balloting property) for every subexpression Ei = e1 . . . ei, 1 ≤
i ≤ 2n − 1, #operands > #operators.
1 6 H 3 5 V 2 H V 7 4 H V

# of operands = 4 ....... = 7
# of operators = 2 ....... = 5
• Polish expression ←→ Postorder traversal.
• ijH: rectangle i on bottom of j; ijV : rectangle i on the left of j.
V

7 5 H H

4 V V
3 4
H
6 2 7 5
2 1 6
1 3 E = 16H2V75VH34HV
E = 16+2*75*+34+*
Postorder traversal of a tree!

5
Solution Representation (cont’d)
V V

1 V V 4
3 H 4 1 H
1 4 2 3 2 3
2 E = 123H4VV E = 123HV4V
non−skewed! skewed!
H V

Non−skewed H V
cases

....... HH ........ ....... VV ........

• Question: How to eliminate ambiguous representation?

6
Normalized Polish Expression

• A Polish expression E = e1 e2 . . . e2n−1 is called normalized iff E has no


consecutive operators of the same type (H or V ).
• Given a normalized Polish expression, we can construct a unique rect-
angular slicing structure.
V

7 5 H H
4 V V 3 4

6 H 2 7 5

2 1 6

1 3 E = 16H2V75VH34HV
A normalized Polish expression

7
Neighborhood Structure

• Chain: HV HV H . . . or V HV HV . . .
1 6 H 3 5 V 2 H V 7 4 H V

chain

• Adjacent: 1 and 6 are adjacent operands; 2 and 7 are adjacent operands;


5 and V are adjacent operand and operator.
• 3 types of moves:
– M 1 (Operand Swap): Swap two adjacent operands.
– M 2 (Chain Invert): Complement some chain (V = H, H = V ).
– M 3 (Operator/Operand Swap): Swap two adjacent operand and
operator.

8
Effects of Perturbation

3
4
2 2
3 3 4
4 4
1 2 1 2 M2 1 1
M1 M3 3
12V4H3V 12V3H4V 12H3H4V 12H34HV

• Question: The balloting property holds during the moves?

– M 1 and M 2 moves are OK.

– Check the M 3 moves! Reject “illegal” M 3 moves.

• Check M 3 moves: Assume that the M3 move swaps the operand ei


with the operator ei+1 , 1 ≤ i ≤ k − 1. Then, the swap will not violate the
balloting property iff 2Ni+1 < i.

– Nk : # of operators in the Polish expression E = e1 e2 . . . ek , 1 ≤ k ≤ 2n − 1.

9
Cost Function
• Φ = A + λW .
– A: area of the smallest rectangle

– W : overall wiring length

– λ: user-specified parameter

3
4
2 2
3 3 4
4 4
1 2 1 2 M2 1 1
M1 M3 3

A: 12H34HV
P
• W = ij cij dij .

– cij : # of connections between blocks i and j.

– dij : center-to-center distance between basic rectangles i and j.

10
Cost Evaluation: Shape Curves

• Shape curves correspond to different kinds of constraints where the


shaded areas are feasible regions.
y
feasible
wi wi region
hi
hi hi corner
wi points
x
y y = six y y = six y y = six y y = six y = ri x y = 1
r x
i

y = ri x
Bounding y = ri x y = s1 x
area
hi hi
i

wi
wi x wi hi
x x x

xi >= a, yi >= b xi >= a, yi >= b, xi yi >= A


xi >= a, yi >= b xi >= a, yi >= b or
or xi yi >= A
xi >= b, yi >= a xi >= b, yi >= a, xi yi >= A

(a) rigid, fixed (b) rigid, free (c) flexible, fixed (d) flexible, free
orientation orientation orientation orientation
11
Area Computation
{ (5,5) (9,4) } 2 1 2
V

{ (2,5) (3,4) } H { (3,5) (6,,4) }


2 2 5 6
H
{ (6,2) (3,3) }

V V { (3,2) }
1 2
{ (2,3) (3,2) } { (2,2) } 5 6
3 1 3 4
3 4 { (1,2) (2,1) } { (2,2) }
{ (1,3) (3,1) } { (2,3) (3,2) }

u2 max{u1, u2} V
u1
v w v+w H H

V V
u2 1 2
u2 u1+u2 5 6
u1 u1 3 4
v w
max{v, w}

• Wiring cost?

12
Incremental Computation of Cost Function

• Each move leads to only a minor modification of the Polish expression.


• At most two paths of the slicing tree need to be updated for each move.
V V

H H H H
V V
M1 V V
1 2 1 2
6
5 4 6
3
4 3 5

E = 12H34V56VHV E = 12H35V46VHV

13
Incremental Computation of Cost Function
(cont’d)
V H

H H H V
V V
M2 V H
1 2 1 2
5 6
5 6
3 4
3 4

E = 12H34V56VHV E = 12H34V56HVH
V V
H H 1 H
V V
M3 V V
1 2
5 6
5 6
3 4
H 4

2
E = 12H34V56VHV 3

E = 123H4V56VHV
14
Annealing Schedule

• Initial solution: 12V 3V . . . nV .


1 2 3 n

• Ti = riT0 , i = 1, 2, 3, . . .; r = 0.85.
• At each temperature, try kn moves (k = 5–10).
• Terminate the annealing process if
– # of accepted moves < 5%,
– temperature is low enough, or
– run out of time.

15
Algorithm: Simulated Annealing Floorplanning(P, , r, k)
1 begin
2 E ← 12V 3V 4V . . . nV ; /* initial solution */
∆avg
3 Best ← E; T0 ← ln(P )
; M ← M T ← uphill ← 0; N = kn;
4 repeat
5 M T ← uphill ← reject ← 0;
6 repeat
7 SelectMove(M );
8 Case M of
9 M1 : Select two adjacent operands ei and ej ; N E ← Swap(E, ei , ej );
10 M2 : Select a nonzero length chain C; N E ← Complement(E, C);
11 M3 : done ← F ALSE;
12 while not (done) do
13 Select two adjacent operand ei and operator ei+1 ;
14 if (ei−1 6= ei+1 ) and (2Ni+1 < i) then done ← T RU E;
15 N E ← Swap(E, ei , ei+1 );
16 M T ← M T + 1; ∆cost ← cost(N E) − cost(E);
−∆cost
17 if (∆cost ≤ 0) or (Random < e T )
18 then
19 if (∆cost > 0) then uphill ← uphill + 1;
20 E ← N E;
21 if cost(E) < cost(best) then best ← E;
22 else reject ← reject + 1;
23 until (uphill > N ) or (M T > 2N );
24 T = rT ; /* reduce temperature */
25 until ( reject
MT
> 0.95) or (T < ) or OutOf T ime;
26 end
16
Floorplanning by Mathematical Programming
• Sutanthavibul, Shragowitz, and Rosen, “An analytical approach to floor-
plan design and optimization,” 27th DAC, 1990.
• Notation:

– wi, hi: width and height of module Mi.

– (xi, yi): coordinate of the lower left corner of module Mi.

– ai ≤ wi/hi ≤ bi: aspect ratio wi/hi of module Mi. (Note: We defined


aspect ratio as hi/wi before.)
• Goal: Find a mixed integer linear programming (ILP) formulation for
the floorplan design.

– Linear constraints? Objective function?

17
wi
Area = hi * wi
hi Mi Aspect ratio = wi / hi

(xi, yi)
Nonoverlap Constraints
• Two modules Mi and Mj are nonoverlap, if at least one of the following linear constraints
is satisfied (cases encoded by pij and qij ):
pij qij
Mi to the left of Mj : xi + w i ≤ xj 0 0
Mi below Mj : yi + h i ≤ y j 0 1
Mi to the right of Mj : xi − wj ≥ xj 1 0
Mi above Mj : yi − h j ≥ yj 1 1
• Let W, H be upper bounds on the floorplan width and height, respectively.
• Introduce two 0, 1 variables pij and qij to denote that one of the above inequalities is
enforced; e.g., pij = 0, qij = 1 ⇒ yi + hi ≤ yj is satisfied.
xi + w i ≤ xj + W (pij + qij )
yi + h i ≤ yj + H(1 + pij − qij )
xi − w j ≥ xj − W (1 − pij + qij )
yi − h j ≥ yj − H(2 − pij − qij )

wi wj wi
hj
hi

(xi, yi) (xj, yj) (xi, yi) (xj, yj)


xi + wi <= xj xi + wi > xj

18
Cost Function & Constraints
• Minimize Area = xy, nonlinear! (x, y: width and height of the resulting
floorplan)
• How to fix?
– Fix the width W and minimize the height y!
• Four types of constraints:
1. no two modules overlap (∀i, j : 1 ≤ i < j ≤ n);
2. each module is enclosed within a rectangle of width W and height H
(xi + wi ≤ W, yi + hi ≤ H, 1 ≤ i ≤ n);
3. xi ≥ 0, yi ≥ 0, 1 ≤ i ≤ n;
4. pij , qij ∈ {0, 1}.
• wi, hi are known.

19
Mixed ILP for Floorplanning
Mixed ILP for the floorplanning problem with rigid, fixed modules.

min y
subject to
xi + wi ≤ W, 1≤i≤n (1)
yi + hi ≤ y, 1≤i≤n (2)
xi + wi ≤ xj + W (pij + qij ), 1≤i<j≤n (3)
yi + hi ≤ yj + H(1 + pij − qij ), 1≤i<j≤n (4)
xi − wj ≥ xj − W (1 − pij + qij ), 1≤i<j≤n (5)
yi − hj ≥ yj − H(2 − pij − qij ), 1≤i<j≤n (6)
xi , yi ≥ 0, 1≤i≤n (7)
pij , qij ∈ {0, 1}, 1≤i<j≤n (8)

• Size of the mixed ILP: for n modules,

– # continuous variables: O(n); # integer variables: O(n2 ); # linear constraints:


O(n2 ).

– Unacceptably huge program for a large n! (How to cope with it?)


• Popular LP software: LINDO, lp solve, etc.
20
Mixed ILP for Floorplanning (cont’d)
Mixed ILP for the floorplanning problem: rigid, freely oriented modules.

min y
subject to
xi + ri hi + (1 − ri )wi ≤ W, 1≤i≤n (9)
yi + ri wi + (1 − ri )hi ≤ y, 1≤i≤n (10)
xi + ri hi + (1 − ri )wi ≤ xj + M (pij + qij ), 1≤i<j≤n (11)
yi + ri wi − (1 − ri )hi ≤ yj + M (1 + pij − qij ), 1≤i<j≤n (12)
xi − rj hj + (1 − rj )wj ≥ xj − M (1 − pij + qij ), 1≤i<j≤n (13)
yi − rj wj − (1 − rj )hj ≥ yj − M (2 − pij − qij ), 1≤i<j≤n (14)
xi , yi ≥ 0, 1≤i≤n (15)
pij , qij ∈ {0, 1}, 1≤i<j≤n (16)

• For each module i with free orientation, associate a 0-1 variable ri :

– ri = 0: 0◦ rotation for module i.

– ri = 1: 90◦ rotation for module i.


• M = max{W, H}.

21
Flexible Modules
• Assumptions: wi , hi are unknown; area lower bound: Ai .
wi
• Module size constraints: wi hi ≥ Ai ; ai ≤ hi
≤ bi .

√ √
q q
Ai Ai
• Hence, wmin = Ai ai , wmax = Ai bi , hmin = bi
, hmax = ai
.

• wi hi ≥ Ai nonlinear! How to fix?


– Can apply a first-order approximation of the equation: a line passing through
(wmin , hmax ) and (wmax , hmin ).
h i = ∆i w i + c i / ∗ y = mx + c ∗ /
hmax − hmin
∆i = / ∗ slope ∗ /
wmin − wmax
ci = hmax − ∆i wmin / ∗ c = y0 − mx0 ∗ /
– Substitute ∆i wi + ci for hi to form linear constraints (xi , yi , wi are unknown; ∆i , ∆j ,
ci , cj can be computed as above).

22
h

Ai = wi * hi
h max
hi = i wi + ci

h min

w
wmin wmax
Reducing the Size of the Mixed ILP
• Time complexity of a mixed ILP: exponential!
• Recall the large size of the mixed ILP: # variables, # constraints: O(n2 ).
– How to fix it?
• Key: Solve a partial problem at each step (successive augmentation)
• Questions:
– How to select next subgroup of modules? ⇒ linear ordering based on connectivity.
– How to minimize the # of required variables?

23
Next group
of modules

Partial
floorplan

W
Reducing the Size of the Mixed ILP (cont’d)
• Size of each successive mixed ILP depends on (1) # of modules in the next group; (2)
“size” of the partially constructed floorplan.
• Keys to deal with (2)
– Minimize the problem size of the partial floorplan.
– Replace the already placed modules by a set of covering rectangles.
– # rectangles is usually much smaller than # placed modules.

Dead space

(a) (b)

C3 C4 R4 R5
C2 R3

Horizontal C1 R2
cut edges
R1

(c) (d)

24

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