: eh ’ MULTIPLEx, & DEMULTIPLExg, multiplexer and demultiplexer tn this chapter, we shall discuss 9.1 MULTIPLEXERS A data selector or more comm witching device that operate like a vet digital data inputs and selects one of t! A multiplexer isa: combinational circuit only called multiplexer, also ‘MUX’ or “MPX’ is acontins ry fast acting multiple position rotary switch. It Accepts. hem at any given time to pass on to the output. that selects one of many input lines (2%) and directs it to one output line. The routing of the |, -— desired data input to the output is controlled by li) aoeeanal SELECT inputs also referred to as ADDRESS —_ Inputs : 2x tea ay inputs. With these selection lines, any one input : MUN 0 combination is selected. If there are (2) input Ine lines, the n number of selection lines with their combinations determine which input is as Such a multiplexer is referred to as Strobe ~10- | multiplexer or 2" x | multiple: : 2"-line to Ili mexeror © a ine multiplexer. | Selection lines Fig. 9.1 - Block diagram of 0708 c nstru oe | cif © multiplexers can ee a individual analog switches encased in sil arbitrary functi 2TO1 LINEMULTIPLEXER ion. A2-t0-1 4 Line mute and requires only ong ¢ pt iPlexer is shown j Ip is selected eae Selection line § t wean OutUt Tne YF g 4 eee 2 Output : » data fro m I, Digital ° package The yea liplexers are cor . 7 Fig. 9.2. This multiplexer takes 1° inp When the select input S~", selected to the output line wy a2 Fundamentals of Di ital Blecy ronics1 v te] er) ‘ Ss [= ) _ 42 by I Multiplexer pig 32 A 2B Fig. 9.3- Logic implemen } . Multiplexer ation of 2 by 1 ec aes multiplexer, consists of two AND gates G, and G. 5, Each of ovo input lines, is applied to one input of AND gate. Wher @ NOT gate G, and sani 1 to gate G, and 0 to gate G,. So, G, is enabled a oe select line input ~ gninput line Ip g0eS tO the output line Y and that from I, is blocked. Similar| 2 : hope The fp, goes to the output line Y and that from Ips blocked. As a mullipeve selecsene a inputs and passes the binary information to the output line, therefore it is called oa an Output (Y) Y=SIp+ SI, As in decoders, multiplexer ICs may have an enable input to control the operation of the =u. The Fig. 9.4 shows a 2 x 1 multiplexer with enable input. When the enable input E (Strobe sgud)is at logic 0, all AND gates are enabled. Accordingly, when S = 0, and S =1, inputs Ip and], elected as before. When strobe = 1, all lines are disabled and circuit does not functions. ES i—_] . 2x1 : ‘ej Mux E. | Stabe, . - it ible " Logic diagram of 2x1 MUX with end 4. -_ 42by 1 Multiplexer with enable Fig. 9.5 input ee1 MULTIPLEXER anes f00" inputs and produces I output dg, r MUX takes er shown ding | 1 LINE mof 4%! MUX is sl in Fj 8 oe perce ee Sata rhe bloc eon Metcot four AND aes, two Nf aN el ’ B. It if ons of 2 8¢ Fig. 9: ‘d to one input of an AND p, combination: in 0 1, is applic Bate, sagram of $< 1 MUX ISSN peg 10 Bs ANIND gate. The function table shoy, me OR gate. Each of the £6 lect a partic ple combination of the selection lines Reh 5, and S, are decod cach poss! (00, O1, 10 and 11, data from the ; Py lines 0 output path f= 0) being © inp, ists he nae Scan eH or has a active Low EN impat symbol shen lng! reat Hines 8) aM ST ten AY) 1, are selected in So AUX always outputs | ES: we le 4x1 b Le} MUX Y le—jeN owt TT ® S, S, (a)A4x1MUX (b) Logic diagram of 4 x 1 MUX EXAMP 0 0 =S1 Solo + S) Sol) + S,SyI, + S,Sy1, 0 0 14 hk Soluti 0 41 0 hk | o 4 1 JB} (c) Function Table 41 x x ‘) | ig. 96-41 For each of the four possible bit soon ost ass the value for its associated data line along a the control lines, only one of the AND # 1 Output. Similarly, one can Construct 8 x | MUX, 16 x1 mud - and so on. Fundamentals of Digital Electronicsult sally connected ta eet ai) Ss nie ie logically connected to the, outa 8 v 10 ofS pantage of USING @ Multiplex becay HURL ton om fn av mani tha might then Plax ce of bea ey St fp oat ise re logic. Used net i ‘on instead of logic gates, mtg plex, a uy -minecugn ig tg seo ee Hae Also be rotted atin lean “d.This Pi . a f 0 sx with n- select inputs cane nt done Ric "it? wx with (n - 1) select inputs, hone of oA isi ysing a MUX with ‘n° select inpuys yp is cases 9 variables need to be connected en inputs, the output is given by, A 10 select inp S. Fora Muy = MDy + MD, + mD, + ., + wg oe ™ Dp, pl -> mD; i=0 sc ene ith mi where m; is the i" minterm of the select inputs The MUX output expression is a SUM of minterms ex; which have their corresponding inputs (D,) equal oI. Pression for ll nines Thus it is possible to implement any function of n variables using a MUX with n-sel inputs by proper assignment of the input variable values. a (D;¢ {0,1}) and Y = E (minterms) fume 9.1: Implement the boolean function F(A, B,C) = 2 (3, 5, 6) using a8 to 1 multiplexer. Sivion : The given boolean function is: F(A,B,©) = 2G, 5.6) Since there are three variables so to implement this boolean function a MUX with 3 select inputs ie. a 8 x | MUX is required. z To include minterms 3, 5 and 6 in the sum cof minterms eo ‘ absent Corresponding to three minterms present inthe ae iat 1 ‘l’ and the remaining five possible minterms namel function are tied to logic ‘0’. Y= ABC + ABC + ABC poolean func The funtion able and multiplexer schema f" DS 9.74 and Fig. 9.7B respectively- ne input lines tied t logic the boolean sion is given” Fig.0 0 0 1 0 1 1 0 8 ae 0 1 1 0 0 1 1 =S+04046 ARG Fig. 9.7B - Multiplexer schematic yy, ne 9.74 - Function table , Fig. " Exampve 9.2 : Use a multiplexer to implement the logic function, F(A,B,C)=11 0,3, 6) Solution: The given boolean function is: F(A, B,C )=I1(0,3,6) =5(1, 4 . Since there are three variables so to implement this boolean function, aM select inputs ie. a 8 x 1 MUX is required. To include minterms 1, 2, 4, 5 and 7 in the sum of minterms expression, the in corresponding to five minterms present in the given boolean function ae tied to) and the remaining three possible minterms namely 0,3, 6 absent in the bole are tied to logic ‘0’. . The function table and multiplexer schematic for this boolean function is give, 9.8A and Fig. 9.8B respectively. as | D D, h D, h ; L > e 8x1 D, lh MUX © D, Is D, Is D, hn D, 1= ABC "8. 9.84 - Function table Fig. 9.8B - Multiplexer schematic ws"., D) decides Which input of muhtip ip eo cr yutput (Y) from the OR gate is only is on IX fq 2 ee a oP 8p. € jin qe inal mplete truth table is show, nin Fj ig. 9.29, Dern ae he Sel re reo ypTHOD Dei 5 x IM MU: x Using vd, we Te quire only use 4 oF ve deren u Muxs his metho Xs. The fig the same 9.39 0 ives the ae 4x1 chematig MUX1 y, : ° i 4 Ao 4x1 MUXE = : Y (Output) (oe) Y, Gc oO MUXs x1 Ml MUK2, 4x LMU sn op Bb XT MUX asin fe 7 he selee of 4x1 MUXI, 4x Fig. 9.30 - Circuit diagra’ ines decides which input (of t The A. uM x] ey B select line decides which MUX out st ia will be selected. The C. D selection LW irected as final output (Y) from MU: en C=0,D =0 pa MU molipleret oe nities wx! The m harltiplexer MUXI gets activate ted and m! oe eee re eg (A B) decides whichLon together t0 | tivated. Now S&® ee WHICH ip, St ef deactivated ie CY PH inp gt MU cont oxet directed 38 Muy jolt? ind c=1.D=0 li] a. Mower case 3: When ets activated and multi Ve Rte We exer MUS Be tivated and mUltleyg ,_ Milo deactivated. Now selection lines (A. B) decides which input gy MU | 2 ese ei directed as output (Y)) - Mahe’ | " or 4 - cased Whenc=1D=! ; AVE ai’ The multiplexer MUX4 gets activated and multiplexer Mux; Bist deactivated. Now selection lines (A, B) decides which input peM * Of mane aM ss so a Mle | 9-2 ‘A dat di 1exer> ee Y. y ine takes a : 0 Ce) t oe ND he value 0 0 0 a ea o o 1 # pe network 0 0 $ eee 0 0 #-4-4 always BSE Q w gemultiplex« wi $ e - {13 a a 3200 ha | | i \s | F aes ' <— DEACTIVATED — | 1 ! | qotline , = Fig. 9.31 - eis Wo ig. 9.31 - Truth table | Tine is ec ee ‘ATIONS OF MULT PL demutti » Ne i N working, USB, ESATA ah oar EXER get | ormation on very few wines Ms different forms of multiplexing eae 2. CD player utilizes multiplex; : fr 3. . ing in ord, ie 0288 in Multiplexers are typically use ie to transfer data/music digitally °°" (gy?) "Mini Fundamentals of Digital Electro,