Eet 224
Eet 224
• The student will be lean how to compute the AC load line parameters for a
class A common emitter amplifier.
• The student will learn how to compute the optimum bias conditions for a
class A common emitter amplifier.
• The student will learn how to use an oscilloscope to measure the signal
voltage drop across the transistor in a class A common emitter amplifier.
• The student will learn how to use an oscilloscope to identify cutoff clipping
distortion in the output signal of a class A common emitter amplifier.
• The student will learn how to use an oscilloscope to identify saturation
clipping distortion in the output signal of a class A common emitter
amplifier.
• The student will learn how to use the Multisim Software to identify clipping
distortion in the output signal of a class A common emitter amplifier.
LIST OF EQUIPMENT
Item # Description Manufacturer* Model #* Serial #*
1.) DC Power Supply
2.) Digital Multimeter
3.) Digital Oscilloscope
4.) Function Generator
5.) Amplifier
6.) Simulation Software
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EET - 224 - LABORATORY EXPERIMENT #4-A
Figure #1
STEP #4 • Measure the magnitude and polarity of VCC, VRC, VC, VE,
VCE, VBE, I1, I2, and IDC.
• Record results in Table #1.
• Do not measure the resistance of R2 at this time.
STEP #5 Use measured results obtained in step above to compute the value of
IB, IC, hFE, IE, VBE, VCE, PDQ, and PDC. Record results in
Table #2 and show calculations on the computations page provided.
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EET - 224 - LABORATORY EXPERIMENT #4-A
STEP #2 Set the oscilloscope to the AC coupled mode:
a. Trigger off Channel #1
b. Connect Channel #1 across the function generator, Es.
c. Connect Channel #2 across RL
d. Adjust the amplitude of the function generator until the
output voltage from the amplifier exhibits clear signs of
clipping distortion.
e. Sketch two cycles of the clipped waveform in Table #3.
f. Label waveform voltage levels appropriately.
g. Identify the type of clipping distortion that exits at voutput.
h. Label the clipped voltage level in Table #3.
STEP #3 Reduce the amplitude of the function generator until the maximum
peak to peak output voltage without clipping distortion is obtained
from the amplifier.
STEP #4 Measure and record in Table #3 the peak-to-peak value of VLoad,
Es, and Vinput for the maximum output voltage without clipping.
a. Sketch and label two cycles of each waveform in Table #3.
b. Show the phase relationship between Es and each waveform.
c. Record readings in both Table #3 and Table #4.
STEP #5 Measurement of Vce p-p with an AC Coupled Oscilloscope:
a. Connect the External Trigger across the applied voltage “Es”
b. Select External Trigger from the Trigger Menu. Note, the
Level adjustment might be needed to stabilize the waveform.
c. Connect the Positive “+” Lead of Channel “1” to the Collector
d. Connect the Positive “+” Lead of Channel “2” to the Emitter
e. Connect both Channel “1” and “2” negative “-“ leads to ground
f. Select the Math Mode, Ch”1” – Ch”2”, to measure VCE p-p
g. Sketch and label two cycles of VCE p-p in Table #3.
h. Record the magnitude of VCE p-p with respect to Es in Table #3
and Table #4.
STEP #6 Turn off and disconnect the DC supply, Function Generator,
Oscilloscope, and jumpers J1, J2, J3, and J4 from the circuit.
STEP #7 Measure and record the value of R2 in Table #1 .
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EET - 224 - LABORATORY EXPERIMENT #4-A
STEP #8 Compute and record experimental values of signal parameters listed
in Table #4 from the data obtained in Parts A and B for VCE = +6 v
DC. Use measured resistance values. Clearly label calculations for
experimental results on computations page provided for Table #4.
STEP #9 Repeat Part A and Part B for VCE = +11 volts DC. Record
results in Tables #3 and #4, respectively.
PART C Multisim Simulations: Heading: Use the following heading:
EET-224-Laboratory – Dr. Fiorillo : Experiment #4
AC Load Line Characteristics of a C.E. Amplifier
Multisim DC Operating Point and Transient Analysis
Date: --/--/---- , Board #______
Your First and Last Name on this line.
Multisim Simulation of the DC BIAS Circuit
STEP #1 Construct the DC Bias Circuit described for the amplifier in Figure
#1 with the Multisim Editor. Use the value of hFE and measured
resistance values obtained in Part A.
STEP #2 Run a DC Operating Point analysis of the bias circuit.
a. Display the results for the following DC parameters: IB, IC,
hFE, IE, IR1, IR2, VB, VE, VBE, VC,VCE, PDQ, and PDC.
b. User defined functions are to be used for Multisim to
compute the value of VCE, VBE, hFE, PDQ, and PDC.
c. Record results obtained from the simulation in Table #2.
STEP #3 • Save the file for future reference.
• Save both the bias circuit and DC Operating Point results in a
Word file for future reference.
PART D Multisim Simulation of the Common Emitter Amplifier
STEP #1 Construct the common emitter amplifier described in Figure #1 with
the Multisim Editor.
• SAVE the amplifier in a separate file.
• Use measured resistance values recorded in Table #1.
• Use the Measured value of hFE recorded in Table #2 when VCE
= +6 v DC.
• Let C1 = 1ufd, C2=1ufd, CE=50ufd
• Es = 1v peak @ f = 1k hz,
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EET - 224 - LABORATORY EXPERIMENT #4-A
STEP #2 Run a Transient analysis of the amplifier and display two cycles of
the waveforms for Es and voutput on the same set of axes.
• Label both waveforms and the portion of the output signal
that exhibits clipping distortion and the type of clipping
distortion that is observed.
• Use the following axis limits:
o Figure #1:
• Left axis:
• Range: Min: -8, Max: 8
• Total ticks:16, Minor ticks:1, Precision: 2
• Bottom axis:
• Range Min:0, Max: .002
• Total ticks:8, Minor ticks:1, Precision: 2
STEP #3 Display the Cursors and Cursor Measurement Table with
readings at t = .25ms and t = .75 ms.
STEP #4 • Save the amplifier circuit in a Multisim file.
• Save amplifier circuit, transient analysis output, and transient
output with cursor readings output in a Word file.
STEP #5 Repeat Steps #1 through #4 for the amplifier described in Figure #1
when VCE = +11v DC.
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EET - 224 - LABORATORY EXPERIMENT #4-A
STEP #3 Optimum Bias Conditions: Determine Optimum Bias conditions
described in Table #7 for the amplifier in Figure #1.
• Record the results in the Optimum Bias column in Table #4
and Table #7.
• Use nominal resistance values, measured hFE, and VBE=.7v
for this set of computations.
• Show all work in an organized format in Table #7.
STEP #4 What conclusions can be drawn about circuit conditions at optimum
bias and the results obtained at VCE = +6v and +11v DC,
respectively.
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EET - 224 - LABORATORY EXPERIMENT #4-A
Table #1
Rx VCC
R1 VRC
RC VC
RE1 VE
RE2 VCE
RL VBE
R2 @ 6v
DC
I1
R2 @ 11
DC
I2
R2
Optimum
IDC
Table #2****
VCE = + 6 v DC VCE = + 11 v DC
Parameter Measured* Multisim** %E*** Measured* Multisim** %E***
IB
IC
hFE
IE
VBE
VCE
PDQ
PDC
* Determine and record the value of each parameter listed from measured values recorded in Table #1.
** Record the value of each parameter from the Multisim DC Operating Point Simulation.
*** Determine and record the %Error between the Measured and Multisim values.
**** Show all computations on a separate page, label all computations.
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EET - 224 - LABORATORY EXPERIMENT #4-A
Computations Page for Table #2
VCEQ = + 6v DC VCEQ = + 11v DC
Place each answer in a box! Place each answer in a box!
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EET - 224 - LABORATORY Table #3 EXPERIMENT #4-A
Parameter VCE = +6 v DC VCE = +11 v DC
VLoad p-p
Clear signs of
when
Clipping
Distortion
first appears
in the output Vload peak clip = Vload peak clip =
signal
Clipping Type = Clipping Type =
VLoad p-p
No Clipping
Distortion
ES p-p
No Clipping
Distortion
Es p-p = Es p-p =
Vinput p-p
No Clipping
Distortion
VCE p-p
No Clipping
Distortion
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EET - 224 - LABORATORY Table #4 EXPERIMENT #4-A
VCE = + 6 v DC Optimum5 VCE = +11 v DC
Parameter Meas1 Theo4 %E Meas1 Theo4 %E
VLoad p-p max
Es p-p max
PLoad
PL dBm
PDQ3
FOM
PDC3
N Stage
Notes: 1.) Measured results obtained in Table #3
2.) Experimental Results below are based upon computations with the maximum peak to peak signals obtained
above without clipping distortion for the specified value of VCEQ DC listed for each column.
3.) PDQ and PDC Experimental Values obtained from Table #2. Theoretical from Part E.
4.) Theoretical results obtained from Part E.
5.) Optimum bias results obtained from Part E.
***Computations: PLoad, PLdBm, FOM, N Stage, @ ***Computations: PLoad, PLdBm, FOM, N Stage, @
VCEQ = +6v DC VCEQ = +11v DC
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EET – 224 LABORATORY LABORATORY #4-A
Table #5: Figure #1 – VCEQ = +6v DC
DC Analysis Conditions
Parameter Theoretical Parameter Theoretical
Alpha DC 1
RDC
RAC
vce cut AC
ic sat AC
Vce p-p-max
vLoad p-p-max
PLoad max
PLoad dBm max
FOM
N Stage
AC Output Model
Theoretical Type of Clipping Distortion that will exist first in vce p-p when
the amplifier is overdriven. Place answer in cell to the right--------------------->
Does your Multisim simulation of the amplifier confirm the type of Clipping
Distortion that will exist first in vce p-p when the amplifier is overdriven. --->
Do Optimum Bias Conditions Exist for this Amplifier? (Yes or No) ----------->
Justification:
Board # Date: Student’s Name:
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EET – 224 LABORATORY LABORATORY #4-A
Computations Page for Table #5
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EET – 224 LABORATORY LABORATORY #4-A
Table #6 – Figure #1 – VCEQ = +11v DC
DC Analysis Conditions
Parameter Theoretical Parameter Theoretical
Alpha DC 1
RDC
RAC
vce cut AC
ic sat AC
Vce p-p-max
vLoad p-p-max
PLoad max
PLoad dBm max
FOM
N Stage
AC Output Model
Theoretical Type of Clipping Distortion that will exist first in vce p-p when
the amplifier is overdriven. Place answer in cell to the right--------------------->
Does your Multisim simulation of the amplifier confirm the type of Clipping
Distortion that will exist first in vce p-p when the amplifier is overdriven. --->
Do Optimum Bias Conditions Exist for this Amplifier? (Yes or No) ----------->
Justification:
Board # Date: Student’s Name:
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EET – 224 LABORATORY LABORATORY #4-A
Computations Page for Table #6
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EET - 224 - LABORATORY EXPERIMENT #4-A
Table #7: Optimum Bias Conditions
Show Optimum Bias Computation for all parameters below. Label all computations and include all models
used! Use nominal resistance values for this set of computations.
Parameter Magnitude
VBE +.7 v DC
Alpha DC 1
hFE Geometric
RDC
RAC
ic saturation AC
vce cutoff AC
ICQ optimum
VCEQ optimum
PLoad dBm
IR1
IR2
IB
R2 Optimum
PDQ
PDC
FOM
N Stage
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EET - 224 - LABORATORY Sample Output Display EXPERIMENT #4-A
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