HDL & FPGA

Lecture 2. Technology Options

and FPGA
Huỳnh Việt Thắng
Faculty of Electronics & Telecommunication Engineering
Danang University of Science and Technology
[email protected]

Jan 2024
 VLSI Design Flow (1/9)
VLSI = Very Large Scale Integration

System Specification Circuit Design

Architectural Design Physical Design

Functional Design Fabrication

Logic Design Packaging

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 VLSI Design Flow (2/9)
System Specification – Define the size, speed,
capacity, and functions of the system
Architectural Design – Define the architecture of
the system: for example: RISC / CISC, number of
ALUs, cache size. Determining the architecture
helps to estimate the system's processing speed,
chip size, power consumption …

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 VLSI Design Flow (3/9)
Functional Design – Define the main functional
blocks and the connections between blocks. It is
not necessary to define in detail how to implement
these blocks.

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 VLSI Design Flow (4/9)
Logic Design – Logical design, for example:
design of combination logic circuit, sequence
logic, ALU, control unit…. The result of this
design step is the RTL ( Register Transfer Level )
description. RTL is represented by Hardware
Description Language (HDL ), eg, VHDL and
Verilog.

X = (AB+CD)(E+F)
Y= (A(B+C) + Z + D)
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 VLSI Design Flow (5/9)
Circuit Design – Circuit design includes the
design of logic gates, transistors and connections.
The result obtained from this design step is a
netlist.

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 VLSI Design Flow (6/9)
• Net list: • Component list:
net1: top.in1 i1.in top: in1=net1 n1=topin1 n2=topin2
net2: i1.out xxx.B n3=botin1 out=outnet
topin1: top.n1 xxx.xin1 i1: in=net1 out=net2
topin2: top.n2 xxx.xin2 xxx: xin1=topin1 xin2=topin2
botin1: top.n3 xxx.xin3 xin3=botin1 B=net2 out=net3
net3: xxx.out i2.in i2: in=net3 out=outnet
outnet: i2.out top.out

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 VLSI Design Flow (7/9)

Component hierarchy

top

i1 xxx i2

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 VLSI Design Flow (8/9)
Physical Design – Convert from netlist to
geometric representation. This geometric
representation is called a layout.

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 VLSI Design Flow (9/9)
Fabrication – Includes processes such as
photolithography, polishing, diffusion ... to make
chip (IC).
Packaging – Arrange the ICs on a PCB (Printed
Circuit Board) or on a MCM (Multi-Chip Module)

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 VLSI Design Flow
System Specification Netlist
Architectural Physical
Design Design

Architectural Layout
Specification Circuit Design
or Fabrication
Functional
Logic Synthesis
Design
Chips
Timing & relationship
between functional units Packaging

Logic Packaged and

Design tested chips
RTL in HDL
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 Overview of
Physical Design
 Physical Design Steps (1/6)
Circuit Partitioning

Floorplanning & Placement

Routing

Layout Compaction

Extraction and Verification

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 Physical Design Steps (2/6)
Circuit Partitioning – Divide a large circuit into
smaller circuits

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 Physical Design Steps (3/6)
Floorplanning – Set up a plan for the layout of
modules on the layout properly when the shapes,
sizes, and foot positions of the modules have not
been fixed.

Deadspace

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 Physical Design Steps (4/6)
Placement – Fixed arrangement of modules
(modules can be logic gates, standard cells...)
when knowing the detailed parameters of the
modules so that the signal delay, area and the
number of connections should be minimized

Feedthrough
Standard cell type 1
Standard cell type 2
v

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 Physical Design Steps (5/6)
Routing – Connect between modules, ensuring
delay, distance between lines...

Feedthrough
Type 1 standard cel1
v
Type 2 standard cell

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 Physical Design Steps (6/6)
Compaction – This step minimizes the area
of ​the layout area to reduce the chip size
Verification – Layout check includes
– Design Rule Checking (DRC),
– reverse circuit extraction (circuit extraction) to
compare with the original netlist,
– performance verification by getting information.
geometrical information for calculating resistance,
capacitance, delay ...

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 VLSI design flow

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Technologies Options
 Technologies used in design
• Full-Custom ASICs (Application specific ICs)
– Logic cells and masking layers are not pre-designed, but designed
by the designer
• Semicustom ASICs
– Pre-designed logic cells (defined in the cell library) and layer
masks designed by designer
– 2 types: Standard-cell based and Gate-array-based ASICs
• Programmable Logic Devices (Thiết bị logic khả trình)
– All logic blocks are pre-designed and there is no need to design
any masking layer
– 2 types:
• PLD (Programmable Logic Device)
• FPGA (Field Programmable Gate Array)

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 Technologies used in design
Full-Custom ASIC
• Full-Custom ASICs (ASIC tùy biến hoàn toàn)
– For each ASIC chip, the designer must design all logic blocks,
circuits, and layouts
– Full-custom ICs are the most expensive ones to design and fabricate
– Time to fabricate 1 IC (not including design time) is 8 weeks
– Use when:
• There are no logic blocks available in the library
• The existing logic blocks are not fast enough
• Existing logic blocks come in large size
• Existing logic blocks consume a great deal of power
• The ASIC chip is designed to be too special, and many
circuits have to be custom designed

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 Technologies used in design
Full-Custom ASIC

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 Technologies used in design
Cell-based ASIC
• Cell-Based ASIC (CBIC) uses pre-designed logic
blocks (AND gates, OR gates, multiplexers, flip-
flops, ...)
– The standard logical block area consists of the normal logical
block rows
– The standard logic block area can be combined with other larger,
well-designed blocks such as microcontrollers, microprocessors,
these blocks are called megacells.

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 Technologies used in design
Cell-based ASIC
• Characteristics:
– Custom blocks can be embedded into the ASIC chip.
The ASIC designer only has to define where the
standard logic blocks are located and the connections
between blocks
– The reference blocks can be placed anywhere on the
silicon slab so all CBIC mask layers can be freely
designed.
– Fabrication time is 8 weeks

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 Technologies used in design
Gate-Array-Based ASICs
• Consists of a 2-dimensional array of identical logic
gates (e.g. NAND gates) pre-defined on the silicon slab.
• The logic gates are connected by layers of connection.
The connection between the ports is done by a mask
created by the designer.
• Fabrication time from a few days to 2 weeks
• The price is cheaper than other ASIC

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 Contents

1. Overview of VLSI & Programmable IC technology

– VLSI design flow
– Physical design
– Technologies used in design
– Programmable Logic Devices (PLD) & FPGA
– Applications of FPGA
2. Design using Xilinx PLD & FPGA
3. Review: Basic design of digital circuits and systems
4. VHDL hardware description language
5. Practical exercises on Xilinx FPGA kit
6. Other problems
7. 27 Summary
 Programmable Logic Devices
• Realisation as AND-OR: • Realisation as OR-AND:
F1=xy+xy’z+x’yz F1=((x’+y’) (x’+y+z’)
(x+y’+z’))’

x y z x y z

F1 F1

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 Programmable logic array (PLA)
• PLA

Programmabl
And
Input
plane

Or Output
plane

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 Programmable logic array (PLA)
• PLA

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 Programmable Array Logic (PAL)
• PAL

Programmable
And
Input
plane

Fixed

Or Output
plane

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 Programmable Array Logic (PAL)

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 Complex Programmable Logic Devices
(CPLD)
• CPLD

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 Complex Programmable Logic Devices
(CPLD)
• Programming Technologies
– PROM: one-time programming
– EPROM, flash, EEPROM: reprogrammable (many times)

Non-volatile

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 Example: PROM
Vcc Vcc Vcc Vcc Fuse
After manufacturing
Address

2-to-4 Decoder

2
MSB

2
LSB

4-1 Mux
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Data
 Example: PROM
Vcc Vcc Vcc Vcc
After programming
Address

2-to-4 Decoder

2
MSB

2
LSB

2-to-4 Mux
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Data
 Field-programmable Gate Array: FPGA
Routing viaLong
switching
lines matrices
• FPGA: XC40xx
I/O I/O I/O I/O

SM SM SM SM
I/O

CLB CLB CLB

SM SM SM SM
I/O

CLB CLB CLB

SM SM SM SM
I/O

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 Look Up Table (LUT)

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 FPGA structure
• CLB (Configurable Logic Block)

16x1 G
LUT: GQ
FF
Bool-function
of 4
G
variables

16x1
F
LUT: FQ
FF
Bool-function
of 4
variables F

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 FPGA structure
• FPGA: Switching Matrix SM
Pass
TOR

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 FPGA structure
• Programming technologies:
– SRAM-based:
• Volatile
• Reprogrammble
– Antifuse
• Non-volatile
• Programmed only-one
• IP security

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 FPGA producers
• The world's leading FPGA providers
– Xilinx: http://www.xilinx.com/ (AMD)
– Altera: http://www.altera.com/ (Intel)

– Lattice Semiconductor: http://www.latticesemi.com/

– Actel: http://www.actel.com/
– Crypress: http://www.cypress.com/
– Atmel: http://www.atmel.com/
– QuickLogic: http://www.quicklogic.com/
– ...
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 Discussion 1
• Distinguish different ASIC technologies?
• Distinguish: PLA, CPLD, FPGA?
• Structure of CLB in Xilinx FPGA?
• Structure of LUT (Look-Up Table)
• Compare among hardware platforms:
– Digital circuits or digital systems implemented using digital ICs
– FPGA (field programmable gate array)
– Microprocessor (Vi xử lý) / Microcontroller (Vi điều khiển)

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 Review: Types of ASICs

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 Reconfigurable Computing:
Advantages

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 Reconfigurable Computing:
Advantages

• FPGA vs Custom ASIC

– FPGAs are more flexible
– FPGAs are more cost effective for small quantities
– ASICs have higher densities
• FPGA vs Parallel Computer
– FPGAs are more cost effective
– FPGAs are smaller
– Parallel Computers are easier to program

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 FPGA vs. ASIC

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Nguồn: http://www.xilinx.com/fpga/asic.htm
 FPGA vs. ASIC Cost
ASIC: High volumes needed to recover design cost

Total cost FPGA .09µ

FPGA .13µ
ASIC .09µ ASIC cost/part
is lower
ASIC Design
Cost is much ASIC .13µ
higher
(and increasing)!!

For each technology advance,

Volume
48 crossover volume moves higher Courtesy: Richard Sevcik, Xilinx
 FPGA vs. ASIC (1)

Source: http://www.xilinx.com/fpga/asic.htm
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 When should we use FPGA?

• Custom IC, custom IP core (IC tùy biến theo yêu cầu)
– thiết kế IC với những chức năng chuyên biệt cần thiết

• Prototyping (Thử nghiệm ý tưởng, phát triển sản phẩm mẫu)

– giảm chi phí thiết kế và chế tạo trước khi thực hiện trên ASIC

• High Performance Computing (Tính toán hiệu năng cao)

– Hardware Accelerator (tăng tốc phần cứng) with high parallelism

• High-speed DSP algorithms

• Embedded System Development with special features
• Runtime reconfigurable applications
• etc.

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 Applications of FPGA
• Aerospace & Defense
• Automotive
• Consumer
• Digital Video Technologies
• Industrial/Scientific & Medical
• Test & Measurement
• Wired Communications
• Wireless Communications

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 Applications of FPGA

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 Applications of FPGA

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 Applications of FPGA

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 Applications of FPGA

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 Applications of FPGA

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 Applications of FPGA

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 Applications of FPGA

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 Applications of FPGA

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 Applications of FPGA

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