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Session 5 and 6

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24 views

Session 5 and 6

Uploaded by

Aditya Agarwal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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1

Course Code : CSE 2151


Credits : 04
▪ Add +5 and -2 = +3 (4-bit representation)
0 101 +
1 010
111 (7) wrong answer!!

▪ Subtract -6 and 1 = -7 (4-bit representation)


1 110 -
0 001
101 (5) wrong answer!!

▪ Hence, not suitable for arithmetic operations

2
▪ Add +1 and -1 = 0 (4-bit representation)
0 001 +
1 110
111 (wrong answer!!)
+ 1
000 (correct answer)

▪ Additional step (hardware) required to arrive at the correct answer.


▪ Hence, not suitable for arithmetic operations

3
▪ Add +7 and -3
▪ +7 is 0111 and -3 is 1101,
▪ Locate 0111 in the diagram and move 1101 (13) steps in clockwise
▪ Solution: 0100
▪ 2’s-complement representation of −3 is interpreted as an unsigned
value for the number of steps to move.
▪ Adding bit pair wise:
▪ ignore the carry-out

4
▪ +2 + (+3) ▪ -5 + (-2)

+2→ 0010 + -5→ 1011 +


+3→ 0011 -2→ 1110
+5→ 0101 -7→ 1001
Carry is ignored

▪ +4 + (-6) ▪ +7 + (-3)

+4→ 0100 + +7→ 0111 +


-6→ 1010 -3→ 1101
-2→ 1110 +4→ 0100
Carry is ignored

5
▪ To add two numbers (X+Y),
▪ Represent X and Y in binary format (2’s complement representation)

▪ add their n-bit representations,

▪ ignore the carry-out bit from the most significant bit (MSB) position.

▪ The sum will be the algebraically correct value in 2’s-complement representation if the actual result is in the
range −2n−1 through +2n−1 − 1.

▪ To subtract two numbers X and Y (X − Y),


▪ Represent X and Y in binary format (2’s complement representation)

▪ form the 2’s-complement of Y,

▪ add it to X using the add rule.

▪ The result will be the algebraically correct value in 2’s-complement representation if the actual result is in
the range −2n−1 through +2n−1 − 1.
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▪ -7- (-5)
-7→ 1001 - -7→ 1001 +
-5→ 1011 Becomes: 5→ 0101
-2→ 1110
▪ -7- (+1)
-7→ 1001 - -7→ 1001 +
+1→ 0001 Becomes: -1→ 1111
-8→ 1000

▪ +2- (-3)
+2→ 0010 - +2→ 0010 +
-3→ 1101 Becomes: +3→ 0011
+5→ 0101
7
▪ -3- (-7)
-3→ 1101 - -3→ 1101 +
-7→ 1001 Becomes: 7→ 0111
+4→ 0100
▪ +2- (+4)
+2→ 0010 - +2→ 0010 +
+4→ 0100 Becomes: -4→ 1100
-2→ 1110

▪ +6- (+3)
+6→ 0110 - +6→ 0110 +
+3→ 0011 Becomes: -3→ 1101
+3→ 0011
8
▪ Sign and Magnitude:
▪ Undesired results

▪ 1’s Complement:
▪ The results are not always correct

▪ 2’s Complement:
▪ simplicity of adding and subtracting signed numbers
▪ used in modern computers

9
▪ Represent a value given in a certain number of bits by
using a larger number of bits
▪ Positive numbers: zeroes are added to the left
▪ Negative numbers: ones are added to the left

▪ To convert a given (w)-bit, signed integer x to (w+k)-bit


integer with same value
▪ Make k copies of sign bit:
▪ X' = xw–1 ,…, xw–1 , xw–1 , xw–2 ,…, x0

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11
▪ Arithmetic overflow:
▪ The actual result of an arithmetic operation is outside the representable range

▪ Overflow occurs when


▪ two positive numbers are added which results in a negative number or
▪ two negative numbers are added which results in a positive number

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▪ +7 + (+4)
carry: 0100
+7→ 0111 +
+4→ 0100
-5→ 1011
▪ -4 + (-6)
carry: 1000
-4→ 1100 +
-6→ 1010
+6→ 0110

▪ The value of the carry-out bit from the sign-bit position is not an
indicator of overflow
▪ Overflow occurs when carry-in to the high-order bit does not
equal carry out 13
▪ +5 + (+3) ▪ +5 + (+2)
carry: 0111 carry: 0000
+5→ 0101 + +5→ 0101 +
+3→ 0011 +2→ 0010
-8→ 1000 +7→ 0111
Overflow No overflow

▪ -7 + (-2) ▪ -3 + (-5)
carry: 1000 carry: 1111
-7→ 1001 + -3→ 1101 +
-2→ 1110 -5→ 1011
+7→ 0111 -8→ 1000
Overflow No overflow

14
▪ The most common encoding scheme for characters is ASCII
▪ Alphanumeric characters, operators, punctuation symbols, and control characters represented
using 7-bit codes
▪ 8-bit byte is used to represent and store a character
▪ The code occupies the low-order seven bits
▪ The high-order bit is usually set to 0

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▪ The basic IEEE format is a 32-bit representation that comprises of
▪ a sign bit,
▪ 23 significant bits, and
▪ 8 bits for a signed exponent of the scale factor

▪ IEEE standard also defines a 64-bit representation to accommodate


▪ more significant bits, and
▪ more bits for the signed exponent, resulting in much higher precision and a much larger range of
values
▪ In general, a binary floating-point number can be represented by (2008 version of IEEE
Standard 754):
▪ a sign for the number
▪ some significant bits
▪ a signed scale factor exponent for an implied base of 2

16
▪ Textbook 1:
▪ Chapter 1: 1.4.1, 1.4.2, 1.5

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