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The Counter Counts From BOTTOM To TOP, or Defined by Either ICR1 or OCR1A

The document discusses different modes of operation for timers and PWM in microcontrollers. It describes fast PWM mode, phase correct PWM mode, and clear timer on compare match mode. It provides equations for calculating PWM frequency for different modes and prescaler settings.

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Liza Linda Dakar
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7 views

The Counter Counts From BOTTOM To TOP, or Defined by Either ICR1 or OCR1A

The document discusses different modes of operation for timers and PWM in microcontrollers. It describes fast PWM mode, phase correct PWM mode, and clear timer on compare match mode. It provides equations for calculating PWM frequency for different modes and prescaler settings.

Uploaded by

Liza Linda Dakar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Fast PWM Mode

WGM13:0 = 5, 6, 7, 14, or 15
The counter counts from BOTTOM to TOP
The PWM resolution for fast PWM can be fixed to 8-, 9-, or 10-bit, or defined
by either ICR1 or OCR1A.

The PWM resolution in bits

the counter is incremented until the counter value matches either


- one of the fixed values 0x00FF, 0x01FF, or 0x03FF (WGM13:0 = 5, 6, or 7),
- the value in ICR1 (WGM13:0 = 14),
- or the value in OCR1A (WGM13:0 = 15).
When using OCR1A as TOP value in a PWM mode, the OCR1A Register can not be used for
generating a PWM output. However, the TOP value will in this case be double buffered allowing
the TOP value to be changed in run time. If a fixed TOP value is required, the ICR1 Register can
be used as an alternative, freeing the OCR1A to be used as PWM output.
The figure shows fast PWM mode when OCR1A or ICR1 is used to define TOP.

In fast PWM mode, the compare units allow generation of PWM waveforms on
the OC1x pins.
The PWM frequency for the output can be calculated by
fmax=fCPU/(N.256)

N represents the prescaler divider (1, 8, 64, 256, or 1024).


Phase Correct PWM Mode
WGM13:0 = 1, 2, 3, 10, or 11
The counter counts repeatedly from BOTTOM (0x0000) to TOP
and then from TOP to BOTTOM. (dual-slope operation)

However, due to the symmetric feature of the dual-slope PWM modes, these
modes are preferred for motor control applications.
The PWM frequency for the output when using phase correct PWM can be
calculated by fmax=fCPU/(N.510)
Fast PWM Mode

Prédiviseur du timer 0 (registre TCCR1B)


1 8 64 256 1024
Mode Fast PWM, 8-bit 62.5 kHz 7.8125 kHz 976.6 Hz 244.1 Hz 61 Hz
Fast PWM, 9-bit 31.25 kHz 3.9063 kHz 488.3 Hz 122.1 Hz 30.5 Hz
Fast PWM, 10-bit 15.625 kHz 1.9531 kHz 244.1 Hz 61 Hz 15.3 Hz
Phase Correct 31.3725 kHz 3.9216 kHz 490.2 Hz 122.5 Hz 30.6 Hz
PWM, 8-bit
Phase Correct 15.6556 kHz 1.9569 kHz 244.6 Hz 61.2 Hz 15.3 Hz
PWM, 9-bit
Phase Correct 7.8201 kHz 977.5 Hz 122.2 Hz 30.5 Hz 7.6 Hz
PWM, 10-bit

Phase Correct PWM Mode


Phase and Frequency Correct PWM Mode
WGM13:0 = 8 or 9
Registres :
AnalogWrite(pin, value);
~9 et ~10 : OC1A et OC1B : fréquence = 490.2 Hz
8-bit Timer/Counter2 with PWM and Asynchronous Operation

Clear Timer on Compare Match (CTC) Mode : (WGM22:0 = 2),


Le registre OCR2A est utilisé pour changer la résolution du compteur, c-à-d la
valeur maximale jusqu’à laquelle il peut compter : TOP=OCRnx

The waveform frequency is :


AnalogWrite(pin, value);
~11 et ~3 : OC2A et OC2B : fréquence = 490.2 Hz

Fast PWM Mode

Prédiviseur du timer 0 (registre TCCR2B)


1 8 32 64 128 256 1024
Mode Fast PWM 62.5 kHz 7.8125 1.9531 976.6 Hz 488.3 244.1 61
kHz kHz Hz Hz Hz
Phase Correct 31.3725 3.9216 980.4 490.2 Hz 245.1 122.5 30.6
PWM kHz kHz Hz Hz Hz Hz

Phase Correct PWM Mode


Modes of operation
Normal Mode (0)
(WGM01:0, WGM00:0)
WGM01:0=0

Clear Timer on Compare Match (CTC) Mode (1)


(WGM01:0, WGM00:1)
WGM01:0=1
Modes of operation
Fast PWM Mode (2)
(WGM01:1, WGM00:0)
WGM01:0=2

Phase Correct PWM Mode (3)


(WGM01:1, WGM00:1)
WGM01:0=3

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