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AP4152 Advanced Digital System Design

The document is an internal assessment test for a course on advanced digital system design. It contains multiple choice and descriptive questions to test knowledge of synchronous sequential logic circuits, ASM charts, fault detection and diagnosis, race conditions, and designing sequence detectors, parity checkers, and counters using finite state machines.

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0% found this document useful (0 votes)
775 views

AP4152 Advanced Digital System Design

The document is an internal assessment test for a course on advanced digital system design. It contains multiple choice and descriptive questions to test knowledge of synchronous sequential logic circuits, ASM charts, fault detection and diagnosis, race conditions, and designing sequence detectors, parity checkers, and counters using finite state machines.

Uploaded by

rno68792
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Om sakthi

Adhiparasakthi Engineering College, Melmaruvathur

Department of Electronics & Communication Engineering

Internal Assessment - I

AP4152 Advanced Digital System Design

Year & Sem : 1 m.e vlsi design & 1 Date: . . 2023


Time: 2 Hrs Max. Marks: 50

PART-A 5X2-10 Marks

Answer all Questions

1. Draw the block diagram for synchronous Sequential logic cirucuits.

2. Draw the ASM chart for two-bit sequence detector.

3. Mention the difference between static and dynamic hazards.

4. Define: Race conditions in the context of digital Circuits.

5. Differentiate between fault detection and fault diagnosis.

PART-B 2X13-26 Marks

Answer any Two Questions

6. Design a sequence detector to detect the Sequence 1001 using Jk Flip flops.

7. Design an odd / even parity checker Moore type FSM with required Steps.

8. Design an modulo 4 up counter which counts the number of pulses on an input time w.

PART-C 1X14-14 Marks

9. Design a FSM for a single input and single Output mealy type FSM that produces an output of 1 if an input sequence it
detects either 100 or 111 pattern. Overlapping sequences should be detected.

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