I.

INTRODUCTION

Among the currently-existing transformer-coupled

Dynamic Modeling and switching-mode DC-to-DC converters, the flyback
converter is the simplest topology, since no choke
Controller Design of Flyback is required, only one power switch is used and the
high-frequency power transformer with unifilar
Converter windings is employed. In addition to these structural
advantages, it also possesses the merits of easy to
obtain wide-range output voltage and multiple output
voltage with good transient response [1—5]. As a
result, it has been extensively designed for many
T. H. CHEN applications [1, 5], and some physical dynamic
W. L. LIN
modeling and controller design techniques have been
devised for improving its dynamic behavior [2—5].
C. M. LIAW, Member, IEEE
National Tsing Hua University
It is known that an isolated feedback path is
Taiwan indispensable to achieve the complete galvanic
isolation from input to output for an isolated
closed-loop controlled converter. The possible
arrangements of isolating feedback loops and their
The accurate dynamic modeling and quantitative controller features have been thoroughly reviewed in [6]. It
design for an isolated converter with optocoupler isolation in is shown that the technique of isolating the analog
its feedback loop are considered to be difficult issues, since the
error signal using optocoupler is perhaps the most
popular and widely used one for providing the
transfer characteristics of some blocks are highly nonlinear
necessary isolation between the error amplifier and
and difficult to be modeled analytically. First a current-mode
the pulsewidth modulation (PWM) modulator. Since
controlled flyback converter with an optically isolated feedback the transfer characteristic of the optocoupler-based
path is designed. Then the equivalent control system block isolation circuit is highly nonlinear, the control
diagram is constructed, and its block transfer functions are found. system block diagram with accurate block transfer
To increase the accuracy, the dynamic models of some critical functions of an isolated flyback converter is difficult
blocks are estimated from measurements. In order to facilitate to construct. During the past years, although some
the controller design, the model simplification is further made. approaches [2—5, 7—11] have been applied to find
Finally, based on the reduced dynamic model, a quantitative the dynamic model of the power stage of flyback
design procedure is derived to find the parameters of the voltage
converter, it still lacks of studies for obtaining the
accurate dynamic model of a whole isolated converter
controller to meet the prescribed regulating specifications. Validity
system with optocoupler feedback path. In addition,
of the estimated dynamic model and the proposed controller
most of the existing controller design methods [1—5]
design approach is demonstrated by some simulation and
emphasize treating the closed-loop stability using
experimental results. the concept of gain and phase margins, and no
quantitative design approaches are provided to find
the controller parameters according to the prescribed
voltage regulation control specifications.
Here the circuit design of a current-mode
controlled flyback converter with optically isolated
feedback path is first described. Then a suitable
equivalent block diagram for the control system
diagram is constructed. An estimation approach is
proposed to find the transfer functions of some critical
Manuscript received December 1, 1997; revised September 3, 1998, blocks. The dynamic behavior of power stage is much
April 7 and May 30, 1999. simplified by applying the current-mode control. The
compensation and model reduction techniques are
IEEE Log No. T-AES/35/4/09321.
employed to establish the reduced plant model for
This work was supported by the National Science Council, ROC, the voltage controller design. Based on the reduced
under Grant NSC 86-2622-E-007-011.
dynamic model, a quantitative design procedure is
Authors’ address: Dept. of Electrical Engineering, National derived to find the parameters of the voltage controller
Tsing Hua University, Hisnchu, Taiwan 30043, ROC, E-mail: according to prescribed regulating specifications
([email protected]). [10]. Some simulation and experimental results are
provided to demonstrate the validity of the proposed
0018-9251/99/$10.00 °
c 1999 IEEE dynamic modeling and controller design methods.

1230 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 35, NO. 4 OCTOBER 1999
 operation, : : : , etc. There are many current-mode
control techniques and current sensing approaches
been developed [1, 6]. To simplify the circuit
configuration, the commercially available IC UC3842
is employed here to implement the current-mode
switching control of the flyback converter. The
fixed-frequency with turn-on at clock time current
control is adopted for regulating the peak switch
current to closely follow its command, which is
generated from the outer voltage control loop. The
voltage across the current shunt Rs = 0:56 − is
low-pass filtered (Rsf = 1 k−, Csf = 0:82 nF) to
suppress the high voltage spike and fed back for
making current control. With the circuit arrangement
set in UC3842 and its excellent current regulating
Fig. 1. Schematic diagram of the current-mode controlled flyback
ability, the peak switching current ˆ{p is related to its
converter with optically isolated feedback loop. command vc by the relationship of vc = 3ks ˆ{p + 1:4,
where the conversion factor ks is determined by
the filtered current sensing circuit and its accurate
II. DESIGN OF AN ISOLATED FLYBACK CONVERTER value will be found using the estimation approach
introduced later. It is worthy of mentioning that owing
The detailed system configuration of a to the maximum duty ratio of 0.4 being set, the slope
current-mode controlled flyback converter with compensation for eliminating the inherent unstable
optically isolated feedback loop is drawn in Fig. 1. phenomenon of peak current-mode control at duty
The circuit structure, analysis and design of this ratio exceeding 0.5 is not required.
converter system are described as follows [12]. 2) Flyback Converter: According to the switching
Specifications: nature of flyback converter [1], the peak voltage of
Input voltage: vs = 85 » 262 Vac rms or 100 » the switch, which occurs at turn-off, must be chosen
370 Vdc, as
Nominal output voltage: V0 = 16 Vdc, VDSm = Vd,max + n(v0 + Vrf ) (1)
Output current range: 0:5 A · I0 · 2:5 A,
Maximum duty ratio: Dmax = 0:4, where Vd,max denotes the maximum value of Vd ,
System efficiency at full load ´ ¸ 80%, Vrf is the on-state voltage of diode Dr and n is the
Switching frequency fs = 100 kHz. primary-to-secondary turn ratios. The peak switch
current rating determined at turn-on is IDm = ˆ{s =n,
A. Input Rectifier and Starting Circuits with Îs being the transformer secondary peak current.
The estimate of IDm can be further approximately
A full-bridge rectifier (600 V/1 A) with inrush expressed in terms of the maximum output power Pom
current suppressing thermistor and common-mode and the maximum duty ratio Dmax to be
electromagnetic interference (EMI) filter in its input Pom V D
side is employed. For the hold-up time Thold = 8:3 ms IDm = + d,min max (2)
´T Vd,min Dmax 2Lm fs
at vs = 110 Vac rms, its filtering capacitor is found
using known system parameters to be Ci = 68 ¹F where ´T denotes the overall efficiency including the
(400 V). According to the minimum starting current transformer, the rectifier, and the output filters. It is
p
requirement (1 mA) and the maximum allowable reasonably assumed ´T = ´ here for making the
power dissipation at maximum input voltage given estimation of IDm . Lm (= 710 ¹H, the transformer
by the UC3842 IC, the start-up resistance is set as is designed below) is the primary magnetizing
Rc = 100 k− (1 W), and the start-up capacitance is inductance of the isolation transformer. Applying
determined to be Cc = 47 ¹F (25 V) for the chosen the known system parameters, it is found the
start-up time 8.3 ms. VDSm = 450 V (occurred at vs = 370 Vdc) and IDm =
1:3 A (occurred at vs = 100 Vdc). Accordingly the
B. Current-Mode Controlled Flyback Converter metal-oxide semiconductor field-effect transistor
(MOSFET) IRF 830 (500 V, 4.5 A) is adopted.
1) Current-Mode Controller: It is known that the The transformer in a flyback converter plays many
current-mode controlled converter possesses many roles: a) as an energy storage choke; b) Galvanic
advantages, such as dynamic model simplification, isolation in power stage; and c) current limiting
with input voltage feedforward characteristic, ease inductor. Since it is driven in unidirectional core
of making current limiting and ease of parallel excitation, it possesses a considerable dc current

CHEN ET AL.: DYNAMIC MODELING AND CONTROLLER DESIGN OF FLYBACK CONVERTER 1231
component. Thus, it is more difficult to design than
other types of isolated converters. Generally, this
will result in a core with larger volume and air gap.
According to the given system data, a systematic
transformer design procedure is derived in [12]; the
results are summarized as follows.
Core: TDK EI-28
N1 = 77 turns, AWG #32, 339 cm Fig. 2. Transfer function block diagram of proposed flyback
N2 = 16 turns, AWG #21 £ 2, 83 cm converter.
N3 = 12 turns, AWG #29, 62 cm.
The magnetizing inductance referred to primary side Since the values of L and RL,e are comparatively
is measured to be Lm = 710 ¹H. small, the dynamic modeling of the output filters can
be simplified within the main dynamic frequency
range. The related dynamic modeling process is
C. PWM Modulator and Isolated Feedback Loop treated in detail in the next section.
For the chosen switching frequency of fs =
100 kHz, the components of timing network are III. CONTROL SYSTEM BLOCK DIAGRAM
determined following the formula in data sheet of ESTABLISHMENT
UC3842 to be Rt = 5:2 k− and Ct = 3:3 nF.
In the feedback loop of a completely isolated A. Exact Configuration
current-mode controlled converter, the necessary Carefully observing, it is found that the dynamic
components include the voltage sensing divider, behavior of the converter system shown in Fig. 1 can
precision voltage reference, the voltage error be reasonably expressed by the control system block
calculation circuit, the current regulator, and the diagram drawn in Fig. 2. The correspondence between
optocoupler. The TL431-based optically isolated the circuit components and their transfer functions is
feedback loop configuration is shown in Fig. 1. briefly described as follows.
The TL431, which consists of voltage reference, 1) Voltage Sensing and Feedback Controller:
amplifier and driver, is designed as a shunt regulator
for modulating the LED current in response to the Rv2
kv = (5)
feedback voltage error. Then an error voltage is Rv1 + Rv2
yielded from the optocoupler output, and the current where the voltage reference, amplifier and driver
command is further generated from the compensator included in the TL431 are employed to realize the
Gif , which is implemented using the compensation output voltage feedback controller. The controller
network (Zii = Rii and Zif = Rif ==(1=Cif s) = Rif = type is determined by the branches Zvi and Zvf
(Rif Cif s + 1)) connected externally. Through properly connected externally. Here the following PI-type
choosing the low-pass filter capacitor CE and resistor (proportional-integral) controller for Gvc is adopted:
RE and the current compensation network according
to the power stage dynamic behavior, the excellent Zvf K
Gvc = = KP + I (6)
current mode control is yielded. The designed circuit Zvi s
elements of this part are listed as follows: with
Rvf 1
RF = 320 −, Rv1 = 1:1 k−, Rv2 = 203 −, KP = , KI = : (7)
(3) Rvi Rvi Cvf
RE = 470 −, CE = 10 nF:
The branches Zvi and Zvf are quantitatively designed
The design of the elements Zii , Zif , Zvi and Zvf of in the next section.
the current controller and voltage controller will be 2) Isolated Transmission Path: The
introduced later after the dynamic converter model optocoupler-based feedback signal path from ¢ve
having been found. ¢ ¢
(= ¢v0 ¡ ¢vk ) to the current command ¢vc (= ¢ˆ{¤p )
consists of the following blocks.
D. Output Filters
a) Error voltage to input LED current transfer block
A LC ¡ ¼ output filter is adopted here to yield Hvi :
¢ ¢i 1
low-ripple dc output voltage. The values of inductance Hvi = F = : (8)
and capacitances accompanying with their equivalent ¢ve RF
series resistances are listed as follows: b) Current transfer ratio of LED Hct :
L = 2 uH, RL,e = 5 m−,
(4) ¢ ¢iE
Hct = : (9)
C1 = C2 = 1000 ¹F, Rc1,e = Rc2,e = 0:05 −: ¢iF

1232 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 35, NO. 4 OCTOBER 1999
 c) Optocoupler output current to voltage transfer
impedance ZE :
¢ ¢vE 1 ¢ RE
ZE = = RE == = , ¹E = RE CE :
¢iE CE s ¹E s + 1
(10)

The low-pass filter formed by RE and CE is employed

here to reduce the high-frequency noise. Generally,
the time constant ¹E = RE CE is so small compared
with the main dynamic response speed of the whole
converter system that it can be regarded as purely
resistive in the dynamic modeling process.
d) Current command compensator Gif :

¢ ¢vc ¢ˆ{¤p ¡Zif ¢ ¡ki

Gif = = = = (11)
¢vE ¢vE Zii ¹i s + 1
with
Rif
ki = , ¹i = Rif Cif (12)
Rii
where the pole (¡1=¹i ) of Gif is chosen to cancel
the zero of the output filter network, and its gain ki
is properly set to obtain suitable dc loop gain.
3) Current-Mode Controlled Flyback Converter:
a) Current-mode control scheme: From the
relationship vc = 3ks ˆ{p + 1:4 of the current control Fig. 3. Some key waveforms of flyback converter.
scheme designed previously, the small-signal (a) Discontinuous mode. (b) Continuous mode.
relationship is found to be
where Vd and V0 are the input and output dc voltages,
¢ˆ{p 1 and the steady-state duty D is found from [12]
= : (13) s
¢vc 3ks
V0 2Lm
Hence the flyback converter dynamic model has been D= : (17)
VD RL T
much simplified by eliminating the dynamic effect of
the transformer magnetizing inductance. ii) Continuous mode: The waveforms in Fig. 3(b)
b) Flyback converter: Assuming that Z0 denotes show that the input and output energies are related by
the output impedance of the output filter network and 1 ˆ2 ¡ i2p ) = v0 {s T:
2 Lm ({p (18)
{s is the average secondary current of the isolating
transformer, the output voltage variation ¢v0 is related Similarly, one can find the same small-signal model as
to ¢{s by that listed in (16) but with
¢v0 = ¢{s Z0 : (14) nV0
D= : (19)
Vd + nV0
And the transfer characteristic between ¢{s and ¢ˆ{p is
derived as follows. The boundary of these two mode occurs at the
i) Discontinuous mode: According to the key following load resistance:
waveforms sketched in Fig. 3(a), the relationship µ ¶2
2L V0
between the peak primary current and the average RL,CL = m : (20)
T DVd
secondary current is obtained from energy transfer
conservation: 4) Output Filter Network: The impedance
1 ˆ2 functions of the LC ¡ ¼ filter can be directly written
2 Lm {p = v0 {s T (15)
from the circuit shown in Fig. 1 as
where Lm is the magnetizing inductance of
Rc1,e C1 s + 1
transformer and T denotes the switching period. Z01 = (21)
Applying the well-known perturbation and C1 s
linearization techniques, one can find Z02 = Ls + RL,e (22)
¢ ¢{s DVd RL (Rc2,e C2 s + 1)
kfly = = (16) Z03 = : (23)
¢ˆ{p 2V0 (RL + Rc2,e )C2 s + 1

CHEN ET AL.: DYNAMIC MODELING AND CONTROLLER DESIGN OF FLYBACK CONVERTER 1233
 expressed as:
¢ ¢vc ¡kic ¡kic
Hic (s) = ¼ = ,
¢ve ¹i s + 1 ¹z s + 1 (27)
kic = Hct RE ki =RF
Fig. 4. Simplified control system block diagram of proposed
flyback converter. where ¹i = ¹z is set for pole-zero cancellation.

C. Transfer Function Parameter Determination

B. Simplified Configuration
1) Physical Approach: Within the specifications
Through properly selecting the block components defined in Section III, a typical operating point having
and considering the time-scale properties of the block the following quantities is chosen:
transfer functions, a much simplified block diagram
can be built up. This will significantly facilitate Vd = 156 Vdc, V0 = 16 Vdc,
RL = 10:7 −,
the design of the voltage controller. In making the (28)
simplification, the following assumptions are made. D = 0:33 (continuous mode):
1) The two filter capacitances are chosen to be Using the parameters listed in (28) and those already
¢ ¢
identical, i.e., C1 = C2 = C and RC1,e = RC2,e = RC,e . given previously, one can derive the following
2) Generally, the time constant ¹E is very small parameters of various blocks from the related
compared with the voltage dynamic response time, equations:
so it is negligible. 3) The series inductance L and thus
its series equivalent resistance RL,e are very small. The n = 70=16, Hvi = 1=RF = 1=320 −, kv = 1=6:4
governed equation of the output section of Fig. 2 can (29)
be written as ¢{s DVd
kfly = = = 1:6 (continuous mode) (30)
Z01 Z03 (Z + Z02 )Z03 ¢ˆ{p 2V0
¢v00 = ¢{ ¡ 01 ¢i
Z01 + Z02 + Z03 s Z01 + Z02 + Z03 0 and from (10) and (24)—(28),
¢ Z01 Z03 ZE = 470=(4:7 £ 10¡6 s + 1) (31)
= ¢{ ¡ Z0 ¢i0 (24)
Z01 + Z02 + Z03 s
5 £ 10¡5 s + 1
where Z0 denotes the output impedance of the Z01 = ,
10¡3 s
current-mode controlled flyback converter and ¢i0
Z02 = 2 £ 10¡6 s + 5 £ 10¡3 , (32)
is the load current change. Based on the above
assumptions, the expression of (24) can be simplified ¡5
10:7(5 £ 10 s + 1)
to be Z03 =
1:05 £ 10¡3 s + 1
Z01 Z03 ¢ 10:7(5 £ 10¡5 s + 1)
¢v00 ¼ (¢{s ¡ ¢i0 ) = Z̃0 (¢{s ¡ ¢i0 ) (25) Z̃0 = : (33)
Z01 + Z03 2:14 £ 10¡2 s + 1
with It follows from (11), (12), and (33) that Gif is set to
R (¹ s + 1) be
Z̃0 ¼ L z (26) ¡3:3
(¹p s + 1) Gif = (34)
5 £ 10¡5 s + 1
where ¹z = RC,e C, ¹p = 2RL C under the assumption with
that RL À (RC,e =2). Accordingly, the block diagram of Rii = 3:3 k−, Rif = 10 k−, Cif = 5 nF:
Fig. 2 can then be approximately represented by that
(35)
shown in Fig. 4.
1) Observation: Owing to the very small values Until now, the only block transfer functions yet to
of L and its series equivalent resistance RL,e , the be determined are Hct and ks . Although the former can
frequency response of Z0 is approximated very well be found from the data sheet offered by the vender
by Z̃0 within the main dynamic frequency range. The (Hct = 1 » 3), its accurate value is difficult to obtain,
effect of modeling steady-state error between Z0 and since it is quite nonlinear and variant due to the
Z̃0 will be automatically compensated by the voltage operating condition and temperature changes. As to
feedback controller. the conversion factor ks of the filtered current sensing
As that mentioned previously, the dynamic circuit, its accurate value is not easy to be identified
behavior of ZE generally can be neglected owing to directly from the circuit configuration. In addition,
its very small value of time constant. As a result, the accurate transfer factor kfly of the power stage is
the blocks from ¢ve to ¢vc can be combined and also usually rather difficult to obtain by the derivation

1234 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 35, NO. 4 OCTOBER 1999
 Fig. 5. Test circuit configuration for performing frequency
response measurement.

described above. As a result, the estimation approach

is used as an alternative to find these parameters.
2) Estimation Approach: For making the
parameter estimation on-line, a test circuit is arranged
as shown in Fig. 5. The voltage feedback controller
Gvc is set to be integral type with Rvf = 0, Cvf =
100 nF and Rvi = 10 k− to let the whole converter Fig. 6. Frequency responses of transfer functions.
system be normally operated at the chosen operating (a) (¢v00 ¡ ¢vk ) to ¢vE . (b) ¢vc to ¢v0 .
point. A swept-sine test signal with frequency from
30 Hz to 30 kHz generated from the control system responses of the transfer function from ¢vc to ¢v0 .
analyzer is injected into the system with transformer The frequency response of Z̃0 at nominal load case
isolation. The sensed two circuit variables are inputted can be accurately calculated off-line. The estimates of
to the analyzer and the generated frequency responses (37) over the frequency range 30 Hz < f < 1000 Hz
can be employed to perform the parameter estimation. are slightly varied. An average of the estimates at
The key parameters estimated in this stage are briefly six frequencies (30 Hz, 60 Hz, 120 Hz, : : : , 960 Hz)
described as follows: is found to be kfly = 2:1.
i) The factor ks is estimated directly from the
current waveform of ˆ{p and its command to be ks =
0:45. IV. QUANTITATIVE DESIGN OF VOLTAGE
ii) The voltages across RF (= ¢v00 ¡ ¢vk ) and CONTROLLER
RE (= ¢vE ) are sensed and inputted to the channels Having estimated the transfer functions of all
1 and 2 (Ch1 and Ch2) of analyzer. The frequency blocks in Fig. 2 and made the model simplification for
responses of the transfer function from (¢v00 ¡ ¢vk ) to Z0 , all the blocks in the simplified block diagram of
¢vE are plotted in Fig. 6(a). The magnitude response Fig. 4 have been known at the chosen operating point.
is rather constant within the main dynamic frequency The transfer function from ¢i0 to ¢v00 can be derived
range (· 1 kHz). Since the loading effect over this from Fig. 4 as
frequency range is very small, the current transfer ¯
¢ ¢v0 ¯
0
ratio of optocoupler can be accurately estimated by ¯ ¡Z̃0
Hd (s) = ¯ =
¢i0 ¢vr =0 1 ¡ (1 + k G )k Z̃ H (s)=3k
¢vE =RE v vc fly 0 ic s
Hct = 0 = 2:0: (36)
(¢v0 ¡ ¢vk )=RF ¡sRL (¹z s + 1)
=
¹p s2 + [1 + (1 + kv KP )RL kfly kic =3ks ]s + KI kv RL kfly kic =3ks
iii) From the block diagram of Fig. 4, one can
observe that the transfer factor kfly of the flyback s(cs + d) h s h s
= = 1 + 2 (38)
converter can be estimated to be s2 + as + b s + ¹1 s + ¹2
j¢v0 =¢vc j where
kfly = 3ks : (37)
jZ̃0 j a = [1 + (1 + kv KP )kic kfly RL =3ks ]=¹p (39)
Similarly, the voltages of ¢vc (see Fig. 1) and ¢v0 b = kv KI kic kfly RL =3ks ¹p (40)
are sensed and inputted to the channels 1 and 2 of
analyzer. Fig. 6(b) shows the measured frequency c = ¡RL ¹z =¹p (41)

CHEN ET AL.: DYNAMIC MODELING AND CONTROLLER DESIGN OF FLYBACK CONVERTER 1235
 TABLE I

d = ¡RL =¹p (42) the steady-state error is also zero for the PI-controlled
system. It follows that by specifying the desired ¢vdm
¡d + c¹1 and tre , the negative real poles ¡¹1 and ¡¹2 can be
h1 = (43)
¹1 ¡ ¹2 solved from (48) and (50). And the parameters of the
d ¡ c¹2 PI controller can be found from (39)—(46).
h2 = (44) 1) Design Example: Suppose that the desired
¹1 ¡ ¹2
output voltage regulation response characteristics due
¹1 + ¹2 = a (45) to step load current change of ¢i0 = 1 A at nominal
¹1 ¹2 = b: (46) load RL = 10:7 − are

The voltage response due to unit-step load current tre = 4 ms, ¢vdm = ¡50 mV: (51)
change can be derived from (38) to (46): Following the procedure described above, the
1 parameters of the controller are found to be
¢v00 (t) = [(¡d + c¹1 )e¡¹1 t + (d ¡ c¹2 )e¡¹2 t ]:
¹1 ¡ ¹2
(47) Kp = 0:7, KI = 5300: (52)
The general requirements of unit-step load And the realized circuit components can be found
regulation response can be specified as: 1) maximum from (7):
dip = ¢vdm ; 2) restore time = tre , which is defined
as the time at which the response ¢v00 (t) restores to Rvi = 3:3 k−, Rvf = 2:3 k−, Cvf = 57 nF:
5% of ¢vdm ; 3) overshoot = 0; and 4) steady-state (53)
error = 0. Some governed equations related to these
The unit-step response of ¢v00 simulated using the
key specifications are derived as followed. The
simplified model of Fig. 4 by Matlab is shown in
maximum voltage dip ¢vdm and the time tdm at which
Fig. 7(a); it indicates that the prescribed specifications
it occurred can be derived from (47) to be
" listed in (51) are completely satisfied. The simulated
µ ¶¡¹1 =¹1 ¡¹2
1 ¹1 (¡d + c¹1 ) ¢v00 using the accurate model of Fig. 2 and the same
¢vdm = (¡d + c¹1 ) designed controller is also plotted in Fig. 7(b). The
¹1 ¡ ¹2 ¹2 (¡d + c¹2 )
comparison between the results of Figs. 7(a) and 7(b)
µ ¶¡¹2 =¹1 ¡¹2 # shows that they are very close. This confirms the
¹1 (¡d + c¹1 )
+ (d ¡ c¹2 ) validity of the proposed simplified model.
¹2 (¡d + c¹2 )
2) Summary of Design Procedure: For wholly
(48) understanding the design of the proposed converter,
and µ ¶ the design procedure described in Sections II to IV is
1 ¹1 (¡d + c¹1 )
tdm = ln : (49) briefly summarized in Table I.
¹1 ¡ ¹2 ¹2 (¡d + c¹2 )
According to the above definition, the relationship
V. SIMULATION AND EXPERIMENTAL RESULTS
between the restore time tre and the maximum dip
¢vdm can be found from (47) and (48) as For confirming the effectiveness of the developed
¢vdm dynamic model, the dynamic response by Pspice
¢v00 (tre ) = simulation is further made. Fig. 8(a) plotted the
20
1 simulated waveform of ¢v00 due to the step load
= [(¡d + c¹1 )e¡¹1 tre + (d ¡ c¹2 )e¡¹2 tre ]: change i0 = 1:5 A $ 2:5 A (RL = 10:7 − $ 6:4 −)
¹1 ¡ ¹2
at nominal load (RL = 10:7 −). The result shows
(50) that it is very close to the simulated result shown
Obviously, if the controller can be properly in Fig. 7(b). As a result, the dynamic behavior of
designed to let the closed-loop poles be all negative the converter can be accurately represented by the
real, then the overshoot will not exist. In addition, proposed control system block diagram with the

1236 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 35, NO. 4 OCTOBER 1999
 Fig. 7. Matlab simulated ¢v00 due to unit-step load current
change. (a) Using simplified model. (b) Using accurate model.

Fig. 8. Pspice simulated ¢v00 due to step load change.

(a) i0 = 1: A $ 2:5 A (RL = 10:7 − $ 6:4 −). Fig. 9. Measured waveforms. (a) vs , vRs , vDS , vGS at RL = 6:4 −.
(b) i0 = 0:5 A $ 1:5 A (RL = 32 − $ 10:7 −). (b) vs , vRs , vDS , vGS at RL = 10:7 −. (c) vRs and ṽc at RL = 6:4 −.
(d) vRs and ṽc at RL = 10:7 −.

proposed estimated parameters. If the load is reduced

to light load with RL = 32 −, the Pspice simulated in Figs. 10(a) and 10(b). The results clearly show that
unit-step load regulation response of ¢v00 is shown in they are very close to the simulation results shown in
Fig. 8(b), the result indicates that very good response Fig. 7 and Fig. 8. So, the validity of the developed
is also obtained by the designed controller. dynamic model and the designed controller is further
Having confirmed the effectiveness of the confirmed.
proposed controller by simulations, hardware
implementation of the designed PI controller is carried
VI. CONCLUSIONS
out. Some waveforms of key circuit variables are
first observed. Figs. 9(a) and 9(b) plot the measured The dynamic modeling and quantitative controller
waveforms of vs , vRs , vDS and vGS at two loads. For design of an optocoupler isolated current-mode
further observing the current-mode control behavior controlled flyback converter have been presented
of the flyback converter, the measured waveforms of in this paper. First, the circuit elements of the
¢
vRs and ṽc (ṽc =(vc ¡ 1:4)=3) at two loads are shown converter are designed according to the given
in Figs. 9(c) and 9(d). The correct operation of the system specifications. The current-mode control
designed converter can be seen from the results shown has simplified the inner-loop dynamic behavior.
in Figs. 9(a)—9(d). Then the development of the detailed control system
As to the voltage regulation responses, the block diagram for correctly representing the dynamic
measured output voltage ¢v00 due to step load current behavior of the converter system is described. The
change ¢i0 = 1 A at RL = 10:7 − and 32 − are shown estimation approach is applied to find the parameters

CHEN ET AL.: DYNAMIC MODELING AND CONTROLLER DESIGN OF FLYBACK CONVERTER 1237
 [3] Kazimierczuk, M. K., and Nquyen, S. T. (1995)
Small-signal analysis of open-loop PWM flyback DC—DC
converter for CCM.
In Proceedings of the IEEE 1995 National Aerospace and
Electronics Conference, 1995, 69—76.
[4] Kazimierczuk, M. K., and Nquyen, S. T. (1995)
Closed-loop voltage-mode-controlled PWM flyback
DC-DC converter for CCM with integral-lead controller.
In Proceedings of the IEEE 1995 National Aerospace and
Electronics Conference, 1995, 61—68.
[5] Ma, K. W., and Lee, Y. S. (1996)
Integrated flyback converter for DC uninterruptible power
supply.
IEEE Transaction on Power Electronics, 11, 2 (Mar. 1996),
318—327.
[6] Mammano, B. (1990)
Isolating the control loop.
Unitrode Power Supply Design Seminar SEM-700, 1990,
2-1 to 2-15.
[7] Middlebrook, R. D., and Cuk, S. (1976)
A general unified approach to modelling
Fig. 10. Measured ¢v00 due to step load change. switching-converter power stages.
(a) i0 = 1:5 A $ 2:5 A (RL = 10:7 − $ 6:4 −). In IEEE Power Electronics Specialists Conference Record,
(b) i0 = 0:5 A $ 1:5 A (RL = 32 − $ 10:7 −). 1976, 18—34.
[8] Chetty, P. R. K. (1981)
Current injected equivalent circuit approach (CIECA)
of some critical blocks, which is either nonlinear to modeling of switching dc-dc converter in continuous
or difficult to be modeled accurately by derivation. inductor conduction mode.
IEEE Transactions on Aerospace and Electronic System,
Furthermore, in order to facilitate the quantitative AES-17, (Nov. 1981), 802—808.
design of the voltage controller, the compensation [9] Lee, Y. S. (1985)
and model simplification are made. According to the A systematic and unified approach to modeling switches
simplified structure of control system block diagram, in switch-mode power supplies.
the governed equations corresponding to the key IEEE Transactions on Industrial Electronics, IE-32, 4
(Nov. 1985), 445—448.
regulation control specifications are formulated, [10] Liaw, C. M., Chiang, S. J., Lai, C. Y., Pan, K. H., Leu,
and the parameters of the PI voltage controller G. C., and Hsu, G. S. (1994)
are found quantitatively and systematically. Some Modeling and controller design of a current-mode
simulation results by Matlab and Pspice are provided controlled converter.
to confirm the effectiveness of the proposed dynamic IEEE Transactions on Industrial Electronics, 41, 2 (Apr.
1994), 231—240.
modeling and controller design techniques. Finally, [11] Chryssis, G. C. (1989)
the performance of the designed flyback converter is High-Frequency Switching Power Supplies.
further demonstrated experimentally. New York: McGraw-Hill, 1989.
[12] Liaw, C. M. (1996)
REFERENCES Research on integration of switch mode power supplies.
Project Report of National Science Council, NSC
[1] Mohan, N., Undeland, T. M., and Robbins, W. P. (1995) 85-2622-E-007-011, Taiwan, ROC.
Power Electronics: Converters, Applications and Design.
New York: Wiley, 1995.
[2] Czarkowski, D., and Kazimierczuk, M. K. (1992)
Linear circuit models of PWM flyback and buck/boost
converters.
IEEE Transactions on Circuits and System–I: Fundamental
Theory and Applications, 39, 8 (Aug. 1992), 688—693.

1238 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 35, NO. 4 OCTOBER 1999
 Thin-Huo Chen was born in Taiwan, ROC, on October 20, 1962. He received the
B.S.E.E. and M.S.E.E. degrees from the National Taiwan Institute of Technology
and National Tsing Hua University, Taiwan, in 1989 and 1991, respectively. He is
currently a Ph.D. candidate at National Tsing Hua University.
From 1991 to 1995 he was employed at the Power Electronics Section,
Chung-shan Institute of Science and Technology as a design engineer of
power electronics. His fields of research interests are power electronics and
mechatronics.

Wei-Liang Lin was born in Taiwan, ROC, on March 13, 1973. He received
the B.S. degree in electrical engineering from Feng Chia University, Taichung,
Taiwan, in 1995, and the M.S. degree in electrical engineering from the National
Tsing Hua University, Hsinchu, Taiwan, in 1997.
His field of research interest is power electronics.

Chang-Ming Liaw (S’88–M’89) was born in Taiwan, ROC, on June 19,

1951. He received the B.S. degree in electronic engineering from the Evening
Department of Tamkang College of Arts and Sciences, Taipei, Taiwan, in 1979,
and the M.S. and Ph.D. degrees in electrical engineering from the National Tsing
Hua University, Taiwan, in 1981 and 1988, respectively.
He is currently a Professor at National Tsing Hua University, ROC His areas
of research interests are power electronics and motor drives.

CHEN ET AL.: DYNAMIC MODELING AND CONTROLLER DESIGN OF FLYBACK CONVERTER 1239