9.

0 FAULT DIAGNOSIS
9.1 TROUBLE SHOOTING TREE

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9.2 TYPICAL FAULTS IN MICROCOMPUTER BASED SYSTEMS

i) Chip failure
Problem? NO
Leave it alone
ii) Open circuit interconnection

iii) Short Circuit interconnection

iv) Externally Included interface

YES
v) Software Bugs.

1. Chip Failure
Indicator NO
Check Power supply
Common failures include; line ON?

a) Input(s) open circuit

b) Input(s) shorted to ground

c) YESinputs shorted together

Two or more

d) Output stuck high

e) Incorrect or partial operation due to internal open or short circuit

Indicator NO
Check reset, Hold and ready lines
f) line ON?
Sequential logic faults (wrong count, wrong reset etc)

2. Open Circuit interconnection

These faults cause a break in any signal or power. Typically sources of such faults include the
YES

following;

Free Run System

a) Unsoldered or faulty soldered joints

b) Fracture of a printed circuit board

c) YES n a connector e.g. edge connector

Faulty contact

d) Breaks in cables particularly at their point of attachment to the circuit and cable

Connector.
Address NO Check faulty bus line
pattern
NOTE correct?

Connectors are often a weak link in the chain particularly if of poor quality, subject to abuse or if equipment is dismantled.

YES

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3. Bridging or short circuit Interconnection

Printed circuit tracks and assorted connections are much closer proximity to one with the result that it becomes very easy to form bridging contacts. A major source of

such unwanted contacts is surplus solder.

4. Extremely induced interference

Since the signals in a microprocessor consists of sequence of pulses, it follows that any externally induced pulses affect its operation, causing programs to “crash” since

these pulse will be interpreted by the system as valid signals. A practical solution to this problem is to remove such spikes before they can enter the system by fitting

filters in series with power supply to a microprocessor

5. Software Bugs

Bugs are logic errors. These errors may go undetected for months or even year only to become apparent when a particular set of inputs or operating conditions are

established which hitherto have not been used. In fact when writing very complex programs it may not be feasible to test for every possible combination of operating

conditions and feedback from the software user become essential.

9.3 FAULT FIINDING TECHNIQUES

1. Visual Inspection

2. D.C Test

3. Oscilloscope

Visual Inspection

It may reveal the source of a fault and is certainly worth carrying out before attempting further investigations. Simple faults such as loose connectors, ICs loose in their

sockets or cracked PCB’s etc can easily be identified or noticed by visual inspection. Sometimes the temperature of a component helps to isolate a fault e.g. voltage

regulator which runs too hot or cool may indicate a fault.

D.C Test

A multimeter is used to measure dc voltages or resistances. It is of limited use in microprocessor based systems but may be satisfactory for checking power supplies to

each device, short or open inference circuit etc.

Oscilloscope

It is limited to those applications in which signals can be obtained e.g. Clock signals. Most of the signals from the microprocessor are not and depend upon program

being executed at that time. It’s applicable only when a microprocessor is made to generate repetitive signals e.g. by free running it or running very short looping

programs.

Examples of fault finding equipments in this technique are:

i) Logic Probe

ii) Logic Pulser

iii) Logic Analyzer

iv) Logic comparator

v) Signature Analyzer

vi) Emulator

vii) Current tracer

LOGIC PROBE

This is a hand-held instrument which is used and detects ‘high’ and ‘low’ logic levels in types of circuits including TTL and CMOS logic probes should be capable of

detecting indicating ‘bad’ logic levels, open circuits and inputs. The method of indicating the detected levels varies. Some probes e.g. HP 545A use a near the logic tip

to give the following indications:

OFF - Below logic ‘o’ threshold

DIM - A bad logic level or open – circuit

BRIGHT - above logic 1 threshold

FLASHING - pulsating input

Other types of logic probes use three different

types of colored LEDs typically RED,

lamp
YELLOW &

GREEN which gives the following indications;

GREEN - below logic ‘0 ’threshold

RED only - above logic ‘1’ threshold

RED & YELLOW - pulsing 1 to 0

GREEN & YELLOW - pulsing 0 to 1

RED, GREEN & YELLOW - square waves.

Logic pulser

It is used to stimulate digital circuits by injection of controlled pulses. A logic probe is often used to determine the effect of stimulating a circuit as shown below:

H
CURRENT TRACER

It is used to locate the

source of a low impedance

path without the necessity of removing components from the circuit. The tip is magnetically sensitive and is used to detect the magnetic field which surrounds a

conductor when carrying a current tracer must first be aligned with the printed circuit track where tracing is to begin and its sensitivity control is adjusted so that the

indicator lamp glows.

The current tracer tip is then moved along the tracks and along all branches including off the track until the source of abnormal current flow is detected.

LOGIC COMPARATOR

Needed for checking faulty nodes in digital circuits, often associated with faulty ICs .It compares a known good or reference with the one suspected of being faulty.

The reference IC is connected in parallel with the faulty IC input pins. Each output of the reference IC is Ex-ORed with the corresponding output of the IC under test.

A difference between only two corresponding outputs generates a logical 1level on the Ex-OR gate output and this is used to activate an error indicator LED.

The main advantage is that testing is carried out at normal operating speeds without need to remove the suspected IC from the circuit.

LOGIC ANALYZER

One problem associated with checking the operation of a microprocessor based system is that data on the bus and control lines changes rapidly as the program is

executed. Since the bus signals are repetitive, a signal event may occur within one or two micro processor cycle and go undetected.

A logic analyzer allows the logic states of a bus and control signals to be captured at specified times and stored in a first –in first –out (FIFO) format/memory.

a)
Trigger word

The point in a program where data capture starts or finishes must be selected by the user. This is achieved by setting up a “trigger word” in the logic analyzer which is

compared with the incoming data. The trigger word may contain ‘don’t cares’(x) which enable data with unknown elements to be specified. Once a match is found

between the incoming the trigger word, data capture continues for a predetermined number of clock pulses and is then terminated. This arrangement allows the user to

study events leading up to the trigger point as well as those immediately following it.

b)
FIFO Memory

The data storage provided by logic analyzers organized as a first-in-first-out (FIFO) memory which has typically 1024 to 2048 storage locations each 32 bits wide.

Some logic analyzer allows this memory to store be re-figured by the user to obtain a larger number of storage but of reduced width. Each of the 32 bits of a word used

to store the instantaneous logic state of a bus FIFO simultaneously using either internally generated or externally derived clock signals.

As each data word is clocked into the FIFO, all previously captured data is shifted one place to make room new data. The data word shifted out from the opposite end

of the FIFO is lost. Therefore at any instant, the FIFO contains a record of the logic states on the bus and control lines during the last 1024 or 2048 clock periods.

c) Clock signals

A logic analyzer may be told at which instants to capture data from the bus and control lines. Therefore a clock signals is used data into the FIFO memory. A high

speed asynchronous clock signal with user selectable frequencies may be generated by the logic analyzer itself. This type of clock can operate at much higher

frequencies than are used in the system under test, thus enabling a logic analyzer to perform high speed sampling of signals for solving hardware, logic and timing

problems.
A low speed synchronous clock is obtained from the system under test using such signals such as RD, WR, MREQ, IORQ etc as the source. This type of clock signal is

useful for debugging software and the user may select which edge of the clock is used to transfer data into the memory.

d) Display Format

The output from the FIFO memory may be formatted by a logic analyzer to provide one of the following user selectable displays

i) List or state

ii) Timing

iii) Disassembly

i)
State Display

A list or state display shows the contents of a logic analyzer memory as a sequence of binary, octal, decimal or hexadecimal codes. Often display of ASCII equivalent

is provided for easier identification of certain words.

ii)
Timing Display

A timing display allows data captured from a limited number of channels to be displayed in correct time as sequence as digital waveforms. Since the waveforms are

constructed from the data stored in memory, they do not represent the true shape of the original waveforms and are used for timing comparisons only.

iii)
Disassembly

Many logic analyzers allow captured data to be displayed as disassembled assembly language mnemonics. For each different type of microprocessor supported, a logic

analyzer requires addition of a personality module or and through installation of associated software. The pod simply clips into the microprocessor making all the

necessary connections.

SIGNATURE ANALYZER

Signature analysis is a technique designed to simplify fault location on complex microprocessor based systems. With the location on complexities of modern

equipments, a manufacturer may often adapt a modular form of construction in order to simplify testing and subsequent fault location. The major advantage of this

approach is that it requires a large number of connectors which add to the cost of equipment and provide additional source of possible faults.

A circuit provided is marked up with appropriate waveforms and voltages obtained from the equipment under test may b compared with those on the circuit diagram

until discrepancy is found, thus enabling the faulty component to be located.

Deriving Signatures

Signatures are digital information t any point in the circuit. They are taken at different points of the act and are compared with the correct signature which is printed on

the circuit diagram. Any discrepancies should lea the technician to the sources of the trouble.

The bit sequences being measured are added into the feedback before being clocked into the shift register. The effect of this is that some bits are inverted before being

clocked into the shift register depending on what has happened previously. The bit stream may be any length but only the residue in the shift register at the end of the

measurement is used. These 16 bits displayed in hexadecimal are the signature of the measured data stream.
For the 1st eight periods (0-7), the circuit performs as an ordinary shift register but at period 7, the 1st ‘1’ of the sequence has reached the ist tap of the shift register.

The result of this is that the next input bit which s a logical ‘0’ is inverted before being clocked into the shift register. This process continues until the end of the

measurement when the 16- bit residue remaining is 1101100101010011

Taking Signature

In order to take signatures, a signature analyzer requires START and STOP signals. A Clock signals is also required, and those signals are obtained from the circuit

under test. At points defined in the service manual. Typical points for obtaining these START and STOP signals are the high order address lines while the clock may be

obtained from the ‘RED’ or ‘WRITE’ lines or from chip selects.