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Instructions

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9 views

Instructions

Uploaded by

hassan ullah khan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

3 Memory, Control, Logic, and Arithmetic

For this next part, the cohort will update the circuit from part 2. Now that sequential logic is involved,
several key changes must be made to the control of the circuit.

3.1 Sequential Logic Update


The following additions need to be added to the project part 2.

3.1.1 Memory
• Add a 32-bit memory register to the circuit between the output of the circuit and the output of the
multiplexer. A memory register will be identified by a flip-flop with a multi-bit input and multi-
bit output bus. This register is called the ACCUMULATOR or ACC.
• A clock signal will be added as a new input into the memory register. The clock signal is a single-
bit square wave that drives the flip-flops of the memory register.
• The output from the memory register will be a feedback loop to replace one of the inputs of the
operations. For example, instead of “Input A” and “Input B” there will be “Input A” and the
feedback from the accumulator.

3.1.2 Control
• The memory register output will feed into one of the multiplexer channels. This feedback
channel, typically channel 0, will represent the “no-operation” or no-op.
• One channel of the multiplexer will be nothing but 0, representing the reset of the circuit.
• The lower 16 bits of the memory register output will feed back to replace the second input into
the system.

3.1.3 Logic
The multiplexor will need the following channels for handling the logic, a NO-Op, a NOT, an AND, a
NAND, an OR, a NOR, an XOR, and an XNOR.

3.1.4 Arithmetic
Currently, the cohort should have addition, subtraction, multiplication, division, and modulus working on
their multiplexor.
3.2 Update System Design Description
The System Design description has six tasks to be completed: the list of inputs, the list of outputs, the list
of interfaces, the list of parts. Save this as a file called <cohort>.SystemDesign.3.pdf.

3.2.1 The List of Inputs


The inputs for this circuit should include the opcodes, the clock, and a single integer input. In part 2, there
would have been an Input A and an Input B. Now, the modules will have an Input and a feedback that
comes from the accumulation register. That means the feedback is an interface.

3.2.2 The List of Outputs


The output for the circuit includes the error codes from part 2. The output for the circuit will change since
the source of the output is now the memory register instead of the multiplexer.

3.2.3 The List of Interfaces


The interfaces will change from part 2 of the project. The feedback from the lower 16 bits of the output will
become the second input to all the modules. New interface lines will connect each of the logic modules to
the multiplexer. The output of the multiplexor will connect to the input of the register. Do not forget the
output of the register is now the Feedback to the rest of the circuit.

3.2.4 The List of Parts


New parts are added into the system. For the combinational logic, the logical operation modules will be
added. A new section will include sequential logic, which will have the description of the 32-bit memory
register.

3.2.5 What to turn in.


Save the system design as a file called <cohort>.SystemDesign.3..pdf
3.3 Update Top-Level Circuit Diagram
• Only the top-level circuit diagram is needed for this portion of the project. The interior workings
of the arithmetic modules, logic modules, memory registers, the decoder, and the multiplexor are
not required.
• The overall layout of the circuit begins with the inputs far left, next the arithmetic modules and
logic modules near left, then the multiplexor and decoder near right.
• Next will be the memory register, and finally the output on the far right.
• Each line should be connected to the correct component, labeled with their identifiers, and marked
with a bus-size shown as a slash on the line, with the size beneath.

Save this as a file called <cohort>.CircuitDiagram.3.pdf

3.4 Op-Code Table Update


Update table that contains the name of the operation, and the binary number that is the opcode of that
operation, that matches your system.

Example:
Operation Operation Type Op-Code
No-Op System 0000
And Logic 0001
Or Logic 0010
XOR Logic 0011
NOT Logic 0100
Nand Logic 0101
Nor Logic 0110
XNOR Logic 0111
Addition Arithmetic 1000
Division Arithmetic 1001
Modulus Arithmetic 1010
Multiplication Arithmetic 1011
Subtraction Arithmetic 1100
Reset System 1111

Save this table as a file called <cohort>.OpCodes.3.pdf

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