Infromation From Part2
Infromation From Part2
section 3.1 to answer section 3.3 You can use any software just mention what software you used).
3.1 System Design From Part 2 (You need to modify this with the sequential logic updates from section
3.1 to answer section (3.2))
The Inputs
• A: A 4-bit input representing the first operand for arithmetic operations.
• B: A 4-bit input representing the second operand for arithmetic operations.
• opcode: A 4-bit input used to select the specific arithmetic operation to
perform.
The Outputs
• C: An 8-bit output that displays the result of the arithmetic operation.
• error: A 2-bit output that indicates errors from the operations, with the first bit representing
arithmetic overflow (addition/subtraction) and the second bit indicating division or
modulus errors.
The Interfaces
• channels: A 16-element array of 8-bit buses used to route the results of operations to
the output based on the opcode.
• select: A 16-bit signal generated by the decoder to select the appropriate channel.
• b: An 8-bit internal bus used to hold the result from the selected channel.
The Parts
• Dec4x16 (dec1): A 4-to-16 line decoder that takes the 4-bit opcode and generates the 16-
bit select signal.
• StructMux (mux1): A multiplexer that selects one of the 16 channels based on the
select signal to output on bus b.
• FourBitAddSub (add1): A component that performs both 4-bit addition and subtraction.
• FourBitMultiplier (mul1): A component that performs 4-bit multiplication.
• FourBitDivision (div1): A component that performs 4-bit division.
• FourBitModulus (mod1): A component that performs the 4-bit modulus operation.
The Opcodes (Need to modify this in order to account for sequential logic added in section 3.1 to answer
section 3.4)