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FPGA Based Voting Machine

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 FPGA Based Voting Machine

Mritunjay Kumar1,a), Gurpreet Singh Dhami2, Ch Ravi Sankar3,and Harpreet Singh

Bedi4

1
Department Of Electronics &communication Eng., Lovely professional University,Phagwara Punjab(144411)
2
Department Of Electronics &communication Eng., Lovely professional University,Phagwara Punjab(144411)
3
Department Of Electronics &communication Eng., Lovely professional University,Phagwara Punjab(144411)
4
Department Of Electronics &communication Eng., Lovely professional University, Phagwara Punjab(144411)
a)
Corresponding author: [email protected]; [email protected]; [email protected]

Abstract. The capacity of electronic voting machines to produce quick, precise, and effective voting results has
led to a major growth in their use in recent years. Yet, there have been reports of tampering, hacking, and
malfunctions during elections, raising questions about the security of these devices. This work suggests a
revolutionary FPGA-based voting system that offers high security, dependability, and openness in the voting
process to allay these worries. Electronic Voting Machine (EVM) is used in our country for Elections. It consists
of two units (1) a control unit (2) the balloting unit. Balloting unit has the names of candidates via labeled buttons
and the control unit is used for counting the votes. This method is very complex in its own and it is being used
in the country from the last 8-9 years. In this research paper, we have implemented the Electronic Voting
Machine by using FPGA. This is a new method that can be used in Elections that happen in the country. This
Voting Machine is designed as a application of VLSI and understanding the future scope of VLSI in real-time
applications. It is designed to overcome the disadvantages of Electronic Voting Machine. These types of Voting
Machines are safer and easy to use, this will overcome the booth capturing process in rural areas. Comparing
the FPGA-based architecture to conventional software-based voting machines, thereare various benefits.
Secondly, because to FPGA's parallel processing capabilities, it provides greater reliability and quicker
processing times.

Keywords. FPGA, Xilinx tool, Verilog, Electronic Voting Machines, Vivado tool

INTRODUCTION
In numerous nations, electronic voting machines (EVMs) have been widely employed in a variety of elections.
Voting machines that use FPGA (Field Programmable Gate Array) technology are among the most promising ones to
be adopted in the near future. These voting devices are trustworthy, cost-effective, and offer an efficient and precise
method of casting a ballot. This study intends to examine the many features of FPGA-based voting machines and to
evaluate both their benefits and drawbacks Electronic Voting Machine (EVM) is being used in the Indian elections for
the very long time. This method of Electronic Voting Machine is still used in the country for the elections. This method
is efficient and good to go but it doesn’t provides the safety because in many of the cases booth-capturing is there and
it leads to unfair results [13]. To defeat the opposition party the ruling party take wrong planning and this may cause a
bad election and bad impression of the country. To overcome this problem, we have come up with a different idea which
leads to fair voting system in the country [5]. If We see take the India as a reference then we see there are total 900
million people are eligible to vote [6], and for fair election we need safe and portable voting machine which is more
compact and safe. This paper dispenses the design of the Electronic Voting Machine EVM by using a digital technique
which is secure, safe and error-free. This paper mainly aims at the designing of a Voting Machine by using FPGA which
is basically known as Field Programmable Gate Array. This design is totally based on the concepts of VLSI and the
paper shows that how the concepts of VERILOG can be used to implement a real-time application [8]. This paper
proposes an Electronic Voting Machine in Verilog by using Viv ado 2019.1. Since we

Electronic copy available at: https://ssrn.com/abstract=4485309

 Proposed to understand that it is hard to manage the whole voting process with ballet paper and so on. Hence we have
designed the ballet machine using VERILOG HDL with Vivado tool which can done on FPGA (Field Programmable
Gate Array).

LITERATURE SURVEY
In [1] paper, we can see that Soomro, Z. A mentioned that the Electromechanically Devices are better as compared to
paper ballet boxes for recording votes .In Manual voting the chances of corruption is high like booth capturing ,fake casting
of votes and so on .The Electronic Voting system has high accuracy , safe and reliable .
Ziad, M. T. I., Al-Anwar [4] intimated in their review papers that previous years the voting is done on ballet paper and this
is not safe but after some years when EVM’s came into the market with the fact that it is safe and reliable and after some
time it also got hacked, so the fact is that we need change in Electronic Voting Machines also. As we see the for any
country the voting is important part of any country overall development so in large democratic country a fair election
should be introduced. So, there are lot of voting machines and voting techniques available in the market and we have
reviewed so many research papers and then we came up with this FPGA voting system solution. In fact this system is very
much safe and easy to use and we can make an election more fair and free from all disruptions.
In research paper [8], we can see that the voting machine can be authorized by the fingerprint also, as we all are aware of
the aadhar authentication, in voting process aadhar i.e the identity of a person is definitely checked by the booth member,
and once they get verified then only they are allow to vote .But in FPGA based voting machine we can authorize once
identity with the voting machine itself so when they automatically get verified and eligible to vote. There is no need of
third member between the voter and voting machine. This may definitely leads a fair election and a fair environment. In
every election one major problem with the election is cyber-attack which includes the online fraud of electronic voting
machine.
In the [8], research paper we can read that Reddy G.S has raised the security concern of voting machine. He and his team
also includes that the as the machine is electronic and we are authorizing with online verification so it’s very risky to save
someone’s data. In this proposed system i.e. FPGA based voting machine we can fetch someone data very safely.
Hossain, T [10], illustrated in their paper that to overcome of these difficulties and build the electoral method a good one,
implementation of electronic mechanical device in digital domain is given during this paper, it's difficult to interfere votes
in digital domain and provides a secure and safe technique for conducting elections described in their paper that the
traditional choice procedure was terribly long and long method and extremely tend to errors. Polling by Electronic
Voting Machine (EVM) may be a straightforward, safe and secure technique that takes minimum of your time. Current
Electronic mechanical device (EVMs) utilized in LOK SABHA, VIDHAN SABHA and an ASSEMBLY election accepts
only 1 vote from every citizen. However in elections like GRAMA PANCHAYATH and COOPERATIVE SOCIETIES,
wherever every citizen casts their votes to one candidate, offered choice machines won't work. So, as we see that the major
elections that are happening in any country and the solution we are providing is totally safe more reliable than any other
voting machine available in market. We are creating a FPGA voting machine which will solve the most problem related to
the voting machine in the market.
Anokye, F. B. (2008). [11], illustrates that a voting machine can be portable also like nano vote box which is portable and
useful to carry everywhere safely, this machine will create a huge impact on the society for smaller SOCIETIES elections.
Basically we can create and use the voting machine as per our need, there are lot of FPGA available in the market which
are nano, medium and large. We can create the voting machines with the help of these technologies. As long as world is
growing, population increases rapidly throughout the world especially India which includes the population approx. 140
million. By the increasing population there voters will also increase. And for fairand secure election we need some fair
electronic voting machines which leads secure and good election environment andthis Xilinx FPGA based voting machine
definitely solve these problems for sure

Electronic copy available at: https://ssrn.com/abstract=4485309

 PROPOSED SYSTEM

Figure 1. Schematic Diagram of FPGA EVM

This Voting Machine is implemented on the FPGA NEXYS-4 board .The overall design looks like votes given to 4
different candidates. The first 4 switches in FPGA board represents the votes given to each of the 4 individual’s. Then
there is a reset button which will reset the whole system. Then there is a mode button which will ensure the safety of the
Voting Machine. People can cast votes to the specific candidates only if the mode button is set to 0. If the mode button is
changed from 0 to 1, then the votes cannot be casted, only the counting of the votes will be done. Here, we have introduced
a new concept which is known as Valid Vote. Valid Vote is the vote received by the candidate when the switch is pressed
for a time duration of 1 second. When the valid vote is casted then the LED’s of FPGA will glow which ensures that a
fair vote has been casted. If the switch is pressed for less than 1 second, then it will not be counted as a vote.

The Voting machine is implemented on NEXYS-4 FPGA board. The FPGA has following properties: It has 16 user
switches and 16 user LED’s where we can give our own set off inputs. Nexys-4 has two 4-digit 7-segment displays and
two tri-color LEDs.12-bit VGA output and PWM audio output .Micro SD card connector, PDM microphone, 3-axis
accelerometer ,Temperature sensor, 10/100 Ethernet PHY,128MiB DDR2, Serial Flash, Four Pmod ports. Diligent USB-
JTAG port for FPGA programming and communication. On-chip analog-to-digital converter (XADC).

Figure 2. FPGA Board

Electronic copy available at: https://ssrn.com/abstract=4485309

Above the input pins are button1, mode, button2, clock, reset, button3, button4 respectively. The output pin is declared
as led which is of 8 bits .
Here the wires are declared as: (valid_vote_1, valid_vote_2, valid_vote_3, valid_vote_4), and, (cand1_vote_recieved,
cand2_vote_recieved, cand3_vote_recieved, cand4_vote_recieved).The votes to each candidate is given through the
switches that are there in the FPGA Board. There are 6 analog pins for various readings.

Figure 3 .Schematic view

The Above figure 3 depicts the schematic of the proposed electronic voting machine with input and output signals.
Elements that are used to connect input and output ports of a module instantiation together with some other element are
called wires.
The default values of wire is ‘Z’.

A . Concept of Clock divider

Figure 4. Clock divider

A clock divider is a circuit which is used to divide the frequency of the input clock. A clock divider circuit creates
lower frequency clock signals from an input clock signal. The divider circuit counts input clock cycles, and drives the
output clock low and then high for some number of input clock cycles. Clock divider is very much essential while
working on FPGA because we need to see the small changes and if the clock will be kept high, then the small changes
will not be seen. So in our Electronic Voting Machine, we have used Clock divider by 2 as shown in figure4.

Electronic copy available at: https://ssrn.com/abstract=4485309

 In this case, we have divided the incoming clock frequency by 2 as shown below in figure 5.

Figure 5.Clock frequency

A. Procedure to use the EVM

Set the reset switch to high so that all the information that is stored by default is erased. Now for casting the votes,
the mode button should be kept low i.e. logic 0 . While casting the votes to each individual the reset button should be
kept low i.e. logic 0. When a valid vote is given to the candidate, then LED’s will be on for 1 s second which shows
that the vote has been given. Once the voting is done, then we have to count the number of votes received by a particular
candidate. So we have to change the mode from 0 to 1. If we want to see the number of votes received by a particular
candidate, then we have to make the respective button on.

Figure 5.Block Diagram of our system

Electronic copy available at: https://ssrn.com/abstract=4485309

 RESULTS

Whenever a valid vote is casted, the LED is on for a duration of 1sec.The counting of total votes can only
be done when the mode button is kept to 1.The concept of valid vote restrict people to cast multiple votes.
To reset the system, after the counting of the votes is done the reset button is set to 1.The counting of the
votes can be done through the FPGA Board

CONCLUSION

The research paper's FPGA-based voting system offers a safe and dependable option for electronic voting. Testing
revealed that the system was precise, dependable, and safe. It was created to overcome security issues with electronic
voting systems. There are many uses for the FPGA-based voting machine, including elections, referendums, and
surveys. The system can be installed in a variety of venues, including polling places, schools, and universities, and is
easily customizable to fit individual requirements. The FPGA implementation of the electronic voting machine is
successful. All of the VLSI ideas were utilized during implementation. This prototype has now undergone extensive
testing and is operating in accordance with the requirements. In the implementation, a NEXYS-4 FPGA board and Viv
ado 2019.1 are utilized. The actual Indian elections can now employ this voting machine. The benefits of a voting
machine using an FPGA include: Its small size makes it simple to move from one voting location to another. It operates
flawlessly and with great efficiency. It is a very time-efficient solution that is also incredibly safe and secure. This
electronic voting machine introduces a novel concept of a valid vote.

REFERENCES
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for Electronic Voting System. In 2020 3rd International Conference on Computing, Mathematics and Engineering
Technologies (iCoMET) (pp. 1-6). IEEE

2: Jacobi, R. P., Trindade, F., de Carvalho, J. P. A., & Cantanhede, R. (2000, September). JPEG decoding in an electronic
voting machine. In Proceedings 13th Symposium on Integrated Circuits and Systems Design (Cat. No. PR00843) (pp.
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Electronic copy available at: https://ssrn.com/abstract=4485309

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