Scribd
Upload
7 views

Syllabus

This document outlines a course on digital logic design. It discusses five units covering number systems and codes, Boolean algebra and logic gates, combinational circuits, sequential circuits, and finite state machines. Learning outcomes are provided for each unit.

Uploaded by

322103312181 SAI ANAND MEDAPATI
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
7 views

Syllabus

This document outlines a course on digital logic design. It discusses five units covering number systems and codes, Boolean algebra and logic gates, combinational circuits, sequential circuits, and finite state machines. Learning outcomes are provided for each unit.

Uploaded by

322103312181 SAI ANAND MEDAPATI
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

DIGITAL‌‌LOGIC‌‌DESIGN‌‌ ‌

Course‌‌Code:‌ ‌ ‌L‌ ‌T‌ ‌P‌ ‌C‌ ‌


‌ ‌3‌ ‌0‌ ‌0‌ ‌3‌ ‌
‌
Course‌‌Outcomes:‌‌At‌‌the‌‌end‌‌of‌‌the‌‌course‌‌the‌‌student‌‌will‌‌be‌‌able‌‌to‌ ‌
CO1:‌D ‌ iscuss‌‌the‌‌significance‌‌of‌‌number‌‌systems,‌‌conversions,‌‌binary‌‌codes.‌‌ ‌
CO2:‌‌‌Apply‌‌different‌‌simplification‌‌methods‌‌for‌‌minimizing‌‌Boolean‌‌functions.‌‌ ‌
CO3:‌‌‌Analyze‌‌the‌‌design‌‌concepts‌‌of‌‌various‌‌combinational‌‌circuits.‌ ‌
CO4:‌A ‌ nalyze‌‌the‌‌concepts‌‌of‌‌sequential‌‌logic‌‌design.‌
CO5:‌C ‌ ategorize‌‌Mealy‌‌&‌‌Moore‌‌models‌‌and‌‌Design‌‌Synchronous‌‌Sequential‌‌machines.‌
‌
UNIT-I‌ ‌ ‌10‌‌Lectures‌ ‌
Number‌‌Systems‌‌and‌‌Codes‌ ‌
Decimal,‌ ‌Binary,‌ ‌Octal,‌‌and‌‌Hexa-decimal‌‌number‌‌systems‌‌and‌‌their‌‌conversions,‌‌BCD‌‌Code,‌‌Excess-3‌‌
code,‌ ‌Gray‌ ‌code,‌ ‌Error‌ ‌detection‌ ‌and‌ ‌correction-‌ ‌Parity,‌‌Hamming‌‌code,‌‌Complement‌‌representation‌‌of‌‌
negative‌‌numbers.‌ ‌
Verilog‌ ‌codes‌ ‌of‌ ‌1’s‌ ‌complement‌ ‌and‌‌2’s‌‌complement‌‌arithmetic,‌‌BCD‌‌addition‌‌and‌‌Parity‌‌generator‌‌in‌‌
Dataflow‌‌level‌‌modelling.‌ ‌
‌
Learning‌‌outcomes:‌‌‌At‌‌the‌‌end‌‌of‌‌this‌‌unit,‌‌the‌‌student‌‌will‌‌be‌‌able‌‌to‌ ‌
1. understand‌‌the‌‌advantages‌‌of‌‌using‌‌different‌‌number‌‌systems‌‌(L2)‌ ‌
2. describe‌‌different‌‌binary‌‌codes‌‌(L2)‌ ‌
3. summarize‌‌error‌‌detection‌‌and‌‌correction‌‌concepts‌‌(L2)‌ ‌
‌
UNIT-II‌ ‌8‌‌Lectures‌ ‌
Boolean‌‌Algebra‌‌&‌‌Logic‌‌Gates‌ ‌
Boolean‌ ‌operations,‌ ‌Boolean‌ ‌functions,‌ ‌algebraic‌ ‌manipulations,‌ ‌min-terms‌ ‌and‌ ‌max-terms,‌ ‌sum-‌‌
of-products‌‌and‌‌product-of-sum‌‌representations,‌‌logic‌‌gates,‌‌NAND/NOR‌‌implementations,‌‌Minimization‌‌
of‌‌Boolean‌‌functions‌‌using‌‌K‌‌-‌‌map,‌‌don't-care‌‌conditions,‌‌prime‌‌implicants.‌ ‌
Gate‌‌level‌‌Verilog‌‌codes‌‌of‌‌SOP‌‌and‌‌POS‌‌expressions‌‌using‌‌basic‌‌gates‌‌and‌‌universal‌‌gate‌‌primitives.‌ ‌
‌
Learning‌‌outcomes:‌‌‌At‌‌the‌‌end‌‌of‌‌this‌‌unit,‌‌the‌‌student‌‌will‌‌be‌‌able‌‌to‌ ‌
1. apply‌‌basic‌‌laws‌‌&‌‌De‌‌Morgan’s‌‌theorems‌‌to‌‌simplify‌‌Boolean‌‌expressions(L3)‌‌ ‌
2. understand‌‌the‌‌concepts‌‌of‌‌sum-of-products‌‌and‌‌product-of-sums‌‌representations‌‌(L2)‌ ‌
3. describe‌‌K-‌‌Map‌‌&‌‌Q-M‌‌methods‌‌of‌‌minimizing‌‌logic‌‌functions‌‌(L2)‌ ‌
‌
UNIT-III‌ ‌12‌‌Lectures‌ ‌
Combinational‌‌Circuits‌ ‌
Analysis‌ ‌of‌ ‌combinational‌ ‌circuits,‌ ‌Design‌ ‌Procedure‌ ‌Binary‌ ‌Adder,‌ ‌subtractor,‌ ‌comparator,‌ ‌decoders,‌‌
encoders,‌ ‌multiplexers,‌ ‌demultiplexers,‌ ‌Code‌ ‌Converters.‌ ‌Parity‌ ‌generator‌ ‌and‌ ‌checker,‌ ‌Basic‌ ‌PLD’s‌ ‌-‌‌
ROM,‌‌PROM,‌‌PLA,‌‌PAL‌‌Realizations.‌ ‌
Verilog‌‌codes‌‌of‌‌half‌‌adder,‌‌full‌‌adder,‌‌2‌‌to‌‌4‌‌decoder,‌‌code‌‌converters‌‌in‌‌Gate‌‌level‌‌modelling.‌ ‌
Verilog‌‌codes‌‌of‌‌2:1‌‌multiplexer,‌‌1:4‌‌demultiplexer‌‌in‌‌Behavioral‌‌level‌‌modelling.‌‌ ‌
‌
Learning‌‌outcomes:‌‌‌At‌‌the‌‌end‌‌of‌‌this‌‌unit,‌‌the‌‌student‌‌will‌‌be‌‌able‌‌to‌ ‌
1. outline‌‌the‌‌concepts‌‌of‌‌combinational‌‌digital‌‌circuits‌‌(L4)‌ ‌
2. describe‌‌combinational‌‌circuits‌‌such‌‌as‌‌adders,‌‌subtractors,‌‌multipliers,‌‌comparators‌‌(L2)‌ ‌

‌
3. analyze‌‌the‌‌digital‌‌circuit‌‌design‌‌using‌‌PLDs‌‌(L4)‌ ‌
‌
UNIT-IV‌ ‌10‌‌Lectures‌ ‌
Sequential‌‌Circuits‌ ‌
Latches:‌ ‌RS‌ ‌latch‌ ‌and‌ ‌JK‌ ‌latch,‌ ‌Flip-flops:‌ ‌RS,‌ ‌JK,‌ ‌D,‌ ‌T‌ ‌flip‌ ‌flops,‌ ‌Master-slave‌ ‌flip‌ ‌flops,‌ ‌Edge-‌‌
triggered‌‌flip-flops.‌‌Shift‌‌registers,‌‌ripple‌‌counters,‌‌synchronous‌‌counters,‌‌Ring‌‌counter,‌‌Johnson‌‌counter,‌‌
Up-Down‌‌counter.‌ ‌
Verilog‌‌codes‌‌of‌‌Flip-Flops,‌‌4-bit‌‌shift‌‌register‌‌in‌‌Behavioral‌‌level‌‌modelling.‌‌ ‌
‌
Learning‌‌outcomes:‌‌‌At‌‌the‌‌end‌‌of‌‌this‌‌unit,‌‌the‌‌student‌‌will‌‌be‌‌able‌‌to‌ ‌
1. understand‌‌behaviour‌‌of‌‌Flip-Flops‌‌and‌‌Latches‌‌(L2)‌ ‌
2. summarize‌‌the‌‌concepts‌‌of‌‌Shift‌‌Registers‌‌(L2)‌ ‌
3. analyze‌‌the‌‌design‌‌of‌‌Counters‌‌(L4)‌ ‌
‌
UNIT-V‌ ‌10‌‌Lectures‌ ‌
Finite‌‌State‌‌Machines‌ ‌
Analysis‌ ‌and‌ ‌Design‌ ‌of‌ ‌Synchronous‌ ‌Sequential‌ ‌Circuits:‌ ‌Moore‌ ‌and‌ ‌Mealy‌ ‌machine‌ ‌models,‌ ‌State‌‌
Equations,‌‌State‌‌Table,‌‌State‌‌diagram,‌‌State‌‌reduction‌‌&‌‌assignment,‌‌Synthesis‌‌of‌‌synchronous‌‌sequential‌‌
circuits-‌ ‌serial‌ ‌binary‌ ‌adder,‌ ‌sequence‌ ‌detector,‌ ‌and‌ ‌binary‌ ‌counter,‌ ‌Partition‌ ‌technique‌ ‌for‌ ‌completely‌‌
specified‌‌sequential‌‌machines.‌ ‌
‌
Learning‌‌outcomes:‌‌‌At‌‌the‌‌end‌‌of‌‌this‌‌unit,‌‌the‌‌student‌‌will‌‌be‌‌able‌‌to‌ ‌
1. understand‌‌Moore‌‌and‌‌Mealy‌‌machine‌‌models‌‌(L2)‌ ‌
2. discuss‌‌the‌‌concepts‌‌of‌‌state‌‌assignment‌‌and‌‌state‌‌reduction‌‌(L2)‌ ‌
3. analyze‌‌the‌‌design‌‌and‌‌synthesis‌‌of‌‌synchronous‌‌sequential‌‌circuits‌‌(L4)‌ ‌
‌
Text‌‌Books:‌ ‌
1. M.‌‌Morris‌‌Mano‌‌and‌‌Michael‌‌D.‌‌Ciletti,‌D ‌ igital‌‌Design‌,‌‌4th‌‌Edition,‌‌Pearson‌‌Education,‌‌2013.‌ ‌
2. T.R.‌‌Padmanabhan‌‌and‌‌B.‌‌Bala‌‌Tripura‌‌Sundari,‌‌‌Design‌‌through‌‌Verilog‌‌HDL‌,‌‌WSE,‌‌IEEE‌‌Press.‌‌
2004.‌ ‌
‌
References:‌ ‌
1. A.‌‌Anand‌‌Kumar,‌S‌ witching‌‌Theory‌‌and‌‌Logic‌‌Design‌,‌‌PHI,‌‌2014.‌ ‌
2. Z.‌‌Kohavi,‌S‌ witching‌‌and‌‌Finite‌‌Automata‌‌Theory‌,‌‌2nd‌‌Edition,‌‌Tata‌‌McGraw‌‌Hill,‌‌2008.‌ ‌
3. Charles‌‌H‌‌Roth‌‌(Jr),‌‌Larry‌‌L.‌‌Kinney,‌‌‌Fundamentals‌‌of‌‌Logic‌‌Design‌,‌‌5th‌‌Edition,‌‌Cengage‌‌
Learning‌‌India‌‌Edition,‌‌2010.‌ ‌
4. John.M‌‌Yarbrough,‌D ‌ igital‌‌Logic‌‌Applications‌‌and‌‌Design‌,‌‌Thomson‌‌Learning,‌‌2006.‌ ‌
***‌ ‌

You might also like