Unit 3: Floorplanning

․Course contents
⎯ Floorplanning basics
⎯ Normalized Polish expression for slicing flooprlans
⎯ B*-trees for non-slicing floorplans
․Readings
⎯ Chapters 8 and 5.6

Pentium 4
PowerPC 604
Unit 3 1
Y.-W. Chang

Floorplanning
․Partitioning leads to
⎯ Blocks with well-defined areas and shapes (rigid/hard blocks).
⎯ Blocks with approximate areas and no particular shapes
(flexible/soft blocks).
⎯ A netlist specifying connections between the blocks.
․Objectives
⎯ Find locations for all blocks.
⎯ Consider shapes of soft block and pin locations of all the blocks.

Unit 3 2
Y.-W. Chang

1
 Early Layout Decision Example

PowerPC 604 Pentium 4

Unit 3 3
Y.-W. Chang

Early Layout Decision Methodology

․An IC is a 2-D medium; considering the dimensions of

blocks in early stages of the design helps to improve
the quality.
․Floorplanning gives early feedback
⎯ Suggests valuable architectural modifications

⎯ Estimates the whole chip area

⎯ Estimates delay and congestion due to wiring

․Floorplanning fits very well in a top-down design

strategy; the step-wise refinement strategy also
propagated in software design.
․Floorplanning considers the flexibility in the shapes and
terminal locations of blocks.

Unit 3 4
Y.-W. Chang

2
 Floorplanning Problem
․Inputs to the floorplanning problem:
⎯ A set of blocks, hard or soft.
⎯ Pin locations of hard blocks.
⎯ A netlist.
․Objectives: minimize area, reduce wirelength for
(critical) nets, maximize routability (minimize
congestion), determine shapes of soft blocks, etc.

Unit 3 5
Y.-W. Chang

Floorplan Design

Unit 3 6
Y.-W. Chang

3
 Floorplan Elements

․Leaf block
(cell/module): a block
at the lowest level of composite
the hierarchy; it does block
not contain any other
block.
․Composite block
(cell/module): a block
that is composed of
either leaf blocks or
composite blocks. The
entire IC is the highest-
level composite block. leaf block

Unit 3 7
Y.-W. Chang

Slicing Floorplan + Slicing Tree

․ A composite block’s
subblocks are obtained by a H
horizontal or vertical
bisection of the composite
V
block.
․ Slicing floorplans can be
represented by a slicing H
tree.
․ In a slicing tree, all blocks
(except for the top-level
block) have a parent, and
all composite blocks have H: horizontal cut
children. V: vertical cut
․ A slicing floorplan is also different from the
called a floorplan of order 2. definitions in the text!!
Unit 3 8
Y.-W. Chang

4
 Skewed Slicing Tree
․ Rectangular dissection: Subdivision of a given rectangle by a finite
# of horizontal and vertical line segments into a finite # of non-
overlapping rectangles.
․ Slicing structure: a rectangular dissection that can be obtained by
repetitively subdividing rectangles horizontally or vertically.
․ Slicing tree: A binary tree, where each internal node represents a
vertical cut line or horizontal cut line, and each leaf a basic rectangle.
․ Skewed slicing tree: One in which no node and its right child are
the same.

Unit 3 9
Y.-W. Chang

Slicing Floorplan Design by Simulated Annealing

․Related work
⎯ Wong & Liu, “A new algorithm for floorplan design,” DAC-86.
⎯ Wong & Liu, “Floorplan design for rectangular and L-shaped
modules,” ICCAD'87.
„ Also considers L-shaped modules.
⎯ Wong, Leong, Liu, Simulated Annealing for VLSI Design, pp.
31--71, Kluwer Academic Publishers, 1988.
․Ingredients to simulated annealing
⎯ solution space
⎯ neighborhood structure
⎯ cost function
⎯ annealing schedule

Unit 3 10
Y.-W. Chang

5
 Simulated Annealing
․Kirkpatrick, Gelatt, and Vecchi, “Optimization by
simulated annealing,” Science, May 1983.
․Greene and Supowit, “Simulated annealing without
rejected moves,” ICCD-84.

Unit 3 11
Y.-W. Chang

Simulated Annealing Basics

․ Non-zero probability for “up-hill” moves.
․ Probability depends on
1. magnitude of the “up-hill” movement
2. total search time

․ ∆C = cost(S') - Cost(S)
․ T: Control parameter (temperature)
․ Annealing schedule: T=T0, T1, T2, …, where Ti = ri T0,
r < 1.

Unit 3 12
Y.-W. Chang

6
 Generic Simulated Annealing Algorithm
1 begin
2 Get an initial solution S;
3 Get an initial temperature T > 0;
4 while not yet “frozen” do
5 for 1 ≤ i ≤ P do
6 Pick a random neighbor S' of S;
7 ∆ ← cost(S') - cost(S);
/* downhill move */
8 if ∆ ≤ 0 then S ← S'
/* uphill move */
9 if ∆ > 0 then S ← S' with probability ;
10 T ← rT; /* reduce temperature */
11 return S
12 end
Unit 3 13
Y.-W. Chang

Basic Ingredients for Simulated Annealing

․Analogy:

․Basic Ingredients for Simulated Annealing:

⎯ Solution space
⎯ Neighborhood structure
⎯ Cost function
⎯ Annealing schedule

Unit 3 14
Y.-W. Chang

7
 Solution Representation
․ An expression E = e1 e2… e2n-1, where ei ∈ {1, 2, …, n, H, V},
1 ≤ i ≤ 2n-1, is a Polish expression of length 2n-1 iff
1. every operand j, 1 ≤ j ≤ n, appears exactly once in E;
2. (the balloting property) for every subexpression Ei = e1 … ei,
1 ≤ i ≤ 2n-1, # operands > # operators.

․ Polish expression ↔ Postorder traversal.

․ ijH: rectangle i on bottom of j; ijV: rectangle i on the left of j.

Unit 3 15
Y.-W. Chang

Redundant Representations

․Question: How to eliminate ambiguous representation?

Unit 3 16
Y.-W. Chang

8
 Normalized Polish Expression
․A Polish expression E = e1 e2 … e2n-1 is called
normalized iff E has no consecutive operators of the
same type (H or V).
․Given a normalized Polish expression, we can
construct a unique rectangular slicing structure.

Unit 3 17
Y.-W. Chang

Neighborhood Structure

․ Chain: HVHVH … or VHVHV …

․Adjacent: 1 and 6 are adjacent operands; 2 and 7 are

adjacent operands; 5 and V are adjacent operand and
operator.
․3 types of moves:
⎯ M1 (Operand Swap): Swap two adjacent operands.
⎯ M2 (Chain Invert): Complement some chain (V = H, H = V).
⎯ M3 (Operator/Operand Swap): Swap two adjacent operand
and operator.

Unit 3 18
Y.-W. Chang

9
 Effects of Perturbation

1 2
3

․Question: The balloting property holds during the

moves?
⎯ M1 and M2 moves are OK.
⎯ Check the M3 moves! Reject “illegal” M3 moves.
․Check M3 moves: Assume that M3 swaps the
operand ei with the operator ei+1, 1 ≤ i ≤ k-1. Then, the
swap will not violate the balloting property iff 2Ni+1 < i.
⎯ Nk: # of operators in the Polish expression E = e1 e2 … ek, 1 ≤
k ≤ 2n-1

Unit 3 19
Y.-W. Chang

Cost Function
․ φ = A + λ W.
⎯ A: area of the smallest rectangle
⎯ W: overall wiring length
⎯ λ : user-specified parameter

1 2
3

․ W= ∑ijcij dij.
⎯ cij: # of connections between blocks i and j.
⎯ dij: center-to-center distance between basic rectangles i and j.

Unit 3 20
Y.-W. Chang

10
 Area Computation for Hard Blocks
• Allow rotation

․Wiring cost?
⎯ Center-to-center interconnection length
Unit 3 21
Y.-W. Chang

Incremental Computation of Cost Function

․Each move leads to only a minor modification of the
Polish expression.
․At most two paths of the slicing tree need to be
updated for each move.

Unit 3 22
Y.-W. Chang

11
 Incremental Computation of Cost Function (cont'd)

Unit 3 23
Y.-W. Chang

Annealing Schedule
․Initial solution: 12V3V … nV.

․Ti = ri T0, i = 1, 2, 3, …; r =0.85.

․At each temperature, try kn moves (k = 5-10).
․Terminate the annealing process if
⎯ # of accepted moves < 5%,
⎯ temperature is low enough, or
⎯ run out of time.

Unit 3 24
Y.-W. Chang

12
 Algorithm: Wong-Liu (P, ε, r, k)
1 begin
2 E ← 12V3V4V … nV; /* initial solution */
3 Best ← E; T0 ← ; M ← MT ← uphill ← 0; N = kn;
4 repeat
5 MT ← uphill ← reject ← 0;
6 repeat
7 SelectMove(M);
8 Case M of
9 M1: Select two adjacent operands ei and ej; NE ← Swap(E, ei, ej);
10 M2: Select a nonzero length chain C; NE ← Complement(E, C);
11 M3: done ← FALSE;
12 while not (done) do
13 Select two adjacent operand ei and operator ei+1;
14 if (ei-1 ≠ ei+1) and (2 Ni+1 < i) then done ← TRUE;
13’ Select two adjacent operator ei and operand ei+1;
14’ if (ei≠ ei+2) then done ← TRUE;
15 NE ← Swap(E, ei, ei+1);
16 MT ← MT+1; ∆cost ← cost(NE) - cost(E);
17 if (∆cost ≤ 0) or (Random < )
18 then
19 if (∆cost > 0) then uphill ← uphill + 1;
20 E ← NE;
21 if cost(E) < cost(best) then best ← E;
22 else reject ← reject + 1;
23 until (uphill > N) or (MT > 2N);
24 T ← rT; /* reduce temperature */
25 until (reject/MT > 0.95) or (T < ε) or OutOfTime;
26 end
Unit 3 25
Y.-W. Chang

Shape Curve for Floorplan Sizing

․ A soft (flexible) blocks b can have different aspect ratios, but
is with a fixed area A.
․ The shape function of b is a hyperbola: xy = A, or y =A/x, for
width x and height y.
․ Very thin blocks are often not interesting and feasible to
design; add two straight lines for the constraints on aspect
ratios.
⎯ Aspect ratio: r ≤ y/x ≤ s.
y = sx

y legal
y shapes
y = rx

x x
Unit 3 26
Y.-W. Chang

13
 Shape Curve
․Since a basic block is built from discrete transistors, it is
not realistic to assume that the shape function follows
the hyperbola continuously.
․In an extreme case, a block is rigid/hard: it can only be
rotated and mirrored during floorplanning or placement.

y
feasible
region

x
The shape curve of a 2 × 4 hard block.
Unit 3 27
Y.-W. Chang

Shape Curve (cont’d)

․In general, a piecewise linear function can be used to
approximate any shape function.
․The points where the function changes its direction, are
called the corner (break) points of the piecewise linear
function.

Unit 3 28
Y.-W. Chang

14
 Feasible Implementations
․Shape curves correspond to different kinds of
constraints where the shaded areas are feasible
regions.

Unit 3 29
Y.-W. Chang

Vertical Abutment
․Composition by vertical abutment (horizontal cut) ⇒ the
addition of shape functions.

Unit 3 30
Y.-W. Chang

15
 Deriving Shapes of Children
․A choice for the minimal shape of a composite block
fixes the shapes of the shapes of its children blocks.

Unit 3 31
Y.-W. Chang

Slicing Floorplan Sizing

․The shape functions of all leaf blocks are given as
piecewise linear functions.
․Traverse the slicing tree to compute the shape
functions of all composite blocks (bottom-up
composition).
․Choose the desired shape of the top-level block; as the
shape function is piecewise linear only the corner points
of the function need to be evaluated, when looking for
the minimal area.
․Propagate the consequences of the choice down to the
leaf blocks (top-down propagation).
․The sizing algorithm runs in polynomial time for slicing
floorplans
⎯ NP-complete for non-slicing floorplans

Unit 3 32
Y.-W. Chang

16
 Wheel or Spiral Floorplan

․Limiting floorplans to those

that have the slicing
property can facilitate
floorplanning algorithms.
․Taking the shape of a
wheel floorplan and its
mirror image as the basis of
operators leads to
hierarchical descriptions of
․This floorplan is not order 5.
slicing!
․Wheel is the smallest
non-slicing floorplans.

Unit 3 33
Y.-W. Chang

Order-5 Floorplan Examples

V H

Unit 3 34
Y.-W. Chang

17
 General Floorplan Representation: Polar Graphs
․vertex: channel segment; edge: cell/block/module.

vertical
polar
graph

horizontal polar graph

Unit 3 35
Y.-W. Chang

B*-Tree: Compacted Floorplan Representation

․ Chang et. al., “B-tree: A new representation for non-
slicing floorplans,” DAC-2K.
⎯ Compact modules to left and bottom.
⎯ Construct an ordered binary tree (B*-tree).
¾ Left child: the lowest, adjacent block on the right (x = x + w ).
j i i
¾ Right child: the first block above, with the same x-coordinate

(xj = xi).
n0
b5 b6 b6
b5
n7 n1
b9 b9
b1 b3 b1 b3
b4 b4
b2 b2 n8 n2 n5

b8 b8 n9 n3 n6
b0 b0
b7 b7 n4
A non-slicing floorplan Compact to left and down B*-tree
Unit 3 36
Y.-W. Chang

18
 B*-tree Packing
․ x-coordinates can be determined by the tree structure.
⎯ Left child: the lowest, adjacent block on the right (xj = xi + wi).
⎯ Right child: the first block above, with the same x-coordinate
(xj = xi).
․ y-coordinates?
b5 b6 n0

b10 n7 n1
b
b11 b3
b4
b2
x1=x0 n8 n2 n5
b9
b00
b8 b11 n11 n9 n3 n6
(x0,y0)
b7
w0
x7=x0+w0 n10 n4

Unit 3 37
Y.-W. Chang

Computing y-coordinates
․Reduce the complexity of computing a y-coordinate to
amortized O(1) time.

horizontal contour

vertical contour

b10
b1 b3 b
4

b9
b0
b8 b11
b7
Unit 3 38
Y.-W. Chang

19
 B*-Tree Perturbation
․Op1: rotate a macro
․Op2: delete & insert
․Op3: swap 2 nodes
․Op4: resize a soft macro

n0 Op3(n1, n7) n0 Op2(n11, n6) n0

n7 n1 n1 n7 n1 n7

n8 n2 n5 n8 n2 n5 n8 n2 n5

n11 n9 n3 n6 n11 n9 n3 n6 n9 n3 n6

n10 n4 n10 n4 n10 n4 n11

Unit 3 39
Y.-W. Chang

Simple Floorplan Sizing

․ Key: Line up with adjacent modules
․ Advantage: fast and reasonably effective
Ti M9
M11 M11 M9
M8 M8
Bi
M10
M10
M12 M14 M12 M14
M3 M3
M15 M15
M6 M6
M5 M5
M7 M7

M4 M3 M4 M3
M1 M1
M2 M2

Li Ri
Unit 3 40
Y.-W. Chang

20
 B*-tree Based Floorplanner
․Benchmark: ISPD98 ibm01 with 12,752 cells, 247
macros
⎯ Amax/Amin = 8416

Courtesy of Tung-Chieh Chen

Unit 3 41
Y.-W. Chang

21