10/2/2018

Indian Institute of Technology Jodhpur, Year 2018

Analog Electronics
(Course Code: EE314)
Lecture 21‐22: MOSFETs Amplifiers

Course Instructor: Shree Prakash

Tiwari
Email: [email protected]

Webpage:
b h //h
http://home.iitj.ac.in/~sptiwari/
/ /
Course related documents will be uploaded on
http://home.iitj.ac.in/~sptiwari/EE314/

Note: The information provided in the slides are taken form text books for microelectronics
(including Sedra & Smith, B. Razavi), and various other resources from internet, for
teaching/academic use only 1

MOSFETs as Current Sources

• A MOSFET behaves as a current source when it is operating in
the saturation region.
• An NMOSFET draws current from a point to ground (“sinks
( sinks
current”), whereas a PMOSFET draws current from VDD to a
point (“sources current”).

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Common‐Source Stage:  = 0
Amplifier circuit Small‐signal analysis circuit
for determining voltage gain, Av

Small‐signal analysis circuit for

determining output resistance
resistance, Rout
W
Av  gm RD   2nCox I D RD
L
Rin  
Rout  RD

Common‐Source Stage:   0
• Channel‐length modulation results in reduced small‐signal
voltage gain and amplifier output resistance.
Small signal analysis circuit
Small‐signal Small signal analysis circuit for
Small‐signal
for determining voltage gain, Av determining output resistance, Rout

Av  gm RD || rO 
Rin  
Rout  RD || rO

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CS Gain Variation with L

• An ideal current source has infinite small‐signal resistance.
The largest Av is achieved with a current source as the load.

• Since  is inversely proportional to L, Av increases with L.

W
2nCox ID
L 2nCoxWL
Av  gmro  
I D ID

CS Stage with Current‐Source Load

• Recall that a PMOSFET can be used as a current source from VDD.
 Use a PMOSFET as a load of an NMOSFET CS amplifier.

Av   g m1 rO1 || rO 2 
Rout  rO1 || rO 2

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PMOS CS Stage with NMOS Load

• An NMOSFET can be used as the load for a PMOSFET CS amplifier.

Av   g m 2 ( rO1 || rO 2 )
Rout  rO1 || rO 2

CS Stage with Diode‐Connected Load

Amplifier circuit Small‐signal analysis circuit
including MOSFET output resistances

  0:

If   0 :  1 
Av  gm1 || rO2 || rO1 
1 W / L1  gm2 
Av  gm1  
gm2 W / L2 Rout 
1
|| rO2 || rO1
gm2
Av is lower, but it is less dependent on process parameters
n and Cox and drain current (ID).

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CS Stage with Diode‐Connected PMOS Load

  0:
 1 
Av   g m 2  || ro1 || ro 2 
 g m1 
1
Rout  || ro1 || ro 2
g m1

CS Stage with Degeneration

Amplifier circuit Small‐signal analysis circuit
for determining voltage gain, Av

RD
If   0 : Av  
1
 RS
gm

Find Av when  is not 0

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Example
• A diode‐connected device degenerates a CS stage.

RD
Av  
1 1

g m1 g m 2

Rout of CS Stage with Degeneration

• Degeneration boosts the output impedance:

Small‐signal analysis circuit for

determining output resistance, Rout

Current flowing down through ro is

i X  g m v1  i X  g m  i X RS 
 i X  g mi X RS

v1  i X RS

rO i X  g mi X RS   i X RS  v X

 rO 1  g m RS   RS  rO  g m rO RS
vX
iX

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Output Impedance Examples

 1 
Rout  rO11  gm1  Rout  g m1rO1rO 2  rO1
 g m2 

CS Stage with Gate Resistance

• For low signal frequencies, the gate conducts no current.
 Gate resistance does not affect the gain or I/O impedances.

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CS Core with Biasing

R1 || R2  RD R1 || R2
Av   Av   gm R D
RG  R1 || R2 1  R RG  R1 || R2
S
gm

Diode‐Connected MOSFETs
Diode‐connected NMOSFET Diode‐connected PMOSFET

1 1
RX  ro 1 RY  ro 2
g m1 gm2

Small‐signal analysis circuit Small‐signal analysis circuit

• Note that the small‐signal model of a PMOSFET is identical to

that of an NMOSFET

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Summary of MOSFET Impedances

• Looking into • Looking into • Looking into the
the gate, the the drain, the source, the
impedance is impedance is impedance is 1/gm
i fi it (∞).
infinite ( ) ro if the
th gate
t i parallel
in ll l with
ith ro if
and source the gate and drain
are (ac) are (ac) grounded.
grounded.

Common‐Gate Amplifier Stage

• An increase in Vin decreases VGS and hence decreases ID.
The voltage drop across RD decreases  Vout increases
The small‐signal
small signal voltage gain (Av) is positive.
positive

Av  gmRD

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Operation in Saturation Region

• For M1 to operate in saturation, Vout cannot fall below Vb‐VTH.
 Trade‐off between headroom and voltage gain.

I/O Impedances of CG Stage ( = 0)

Small‐signal analysis circuit for Small‐signal analysis circuit for
determining input resistance, Rin determining output resistance, Rout

1
Rin  Rout  RD
gm

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CG Stage with Source Resistance

Small signal equivalent

Small‐signal
circuit seen at input 1
gm
vX  vin
1
RS 
gm

For = 0:
vout vout v X 1 RD
   g m RD  Av 
vin v X vin g m RS  1 1
 RS
gm

CG Stage with Source Resistance

• The output impedance of a CG stage with source resistance is
identical to that of CS stage with degeneration.
S ll i
Small‐signal
l analysis
l i circuit
i i for
f
determining output resistance, Rout

Rout  rO 1  g m RS   RS  1  g m rO RS  rO

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CG Stage with Biasing

• R1 and R2 establish the gate bias voltage.
• R3 provides a path for the bias current of M1 to flow.

vout R3 || 1/ gm 
  gmRD
vin R3 || 1/ gm   RG

CG Stage with Gate Resistance

• For low signal frequencies, the gate conducts no current.
 Gate resistance does not affect the gain or I/O impedances.

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CG Stage Example
Small‐signal equivalent Small‐signal equivalent
circuit seen at input circuit seen at output
 1 
1 1
Rout1  g m1rO1  RS  rO1
g m1 g m 2 1  g m 2 
vX  vin  vin
1 1 1   g m1  g m 2 RS
 RS
g m1 g m 2

vout vX gm1RD   1  
Av    Rout   gm1rO1  || RS   rO1  || RD
vX vin 1  gm1  gm2 RS   gm 2  

Source Follower Stage

vout r || R
Av   O L 1
vin 1 r || R
O L
gm
Small‐signal analysis circuit for
determining voltage gain, Av Equivalent circuit

vout  gmv1ro RL 
vin  v1 vout
 gmvin voutro RL 

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Source Follower Example

• In this example, M2 acts as a current source.

rO1 || rO 2
Av 
1
 rO1 || rO 2
g m1

Rout of Source Follower

• The output impedance of a source follower is relatively low,
whereas the input impedance is infinite (at low frequencies);
thus,, it is useful as a voltage
g buffer.
Small‐signal analysis circuit for
determining output resistance, Rout

1 1
Rout  || rO || RL  || RL
gm gm

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Source Follower with Biasing

• RG sets the gate voltage to VDD; RS sets the drain current.
(Solve the quadratic equation to obtain the value of ID.)

Assuming  = 0:
1 W
ID  nCox VDD  IDRS VTH 
2

2 L

Supply‐Independent Biasing
• If Rs is replaced by a current source, the drain current ID
becomes independent of the supply voltage VDD.

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Review: MOSFET Amplifier Design

• A MOSFET amplifier circuit should be designed to
1. ensure that the MOSFET operates in the saturation region,
2 allow the desired level of DC current to flow,
2. flow and
3. couple to a small‐signal input source and to an output “load”.
 Proper “DC biasing” is required!
(DC analysis using large‐signal MOSFET model)

• Key amplifier parameters:

(AC analysis using small‐signal MOSFET model)
– Voltage gain Av  vout/vin
– Input resistance Rin  resistance seen between the input node
and ground (with output terminal floating)
– Output resistance Rout  resistance seen between the output
node and ground (with input terminal grounded)

MOSFET Models
• The large‐signal model is used to determine the DC
operating point (VGS, VDS, ID) of the MOSFET.

• The small‐signal model is used to determine how the

output responds to an input signal.
signal

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Comparison of Amplifier Topologies

Common Source Common Gate Source Follower
• Large Av < 0 • Large Av > 0 • 0 < Av ≤ 1
‐ degraded by RS ‐degraded by RS
• Large Rin
• Large Rin • Small Rin – determined by
‐ decreased by RS biasing circuitry
– determined by biasing
circuitry • Rout  RD • Small Rout
‐ decreased by RS
• Rout  RD • ro decreases Av & Rout
but impedance seen • ro decreases Av &
• ro decreases
d Av & Rout
looking into the drain Rout
but impedance seen
can be “boosted” by
looking into the drain
source degeneration
can be “boosted” by
source degeneration

Common Source Stage

 0
R1 || R2  RD
Av  
RG  R1 || R2 1  R
0
S
gm
Rin  R1 || R2
Rout  R D Rout  RD rO  g m rO RS 

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Common Gate Stage

 0

RS || 1/ gm 
Av   gm RD
RS || 1/ gm   RG
1
Rin  RS 0
gm

Rout  R D Rout  RD rO  g m rO RS 

Source Follower

 0 0

RS rO || RS
Av  Av 
1 1
 RS  rO || RS
gm gm
Rin  RG Rin  R G
1 1
Rout  || RS Rout  || ro || RS
gm gm

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CS Stage Example 1
• M1 is the amplifying device; M2 and M3 serve as the load.
Equivalent circuit for small‐signal analysis,
showing resistances connected to the drain

 1 
Av   g m1  || rO3 || rO 2 || rO1 
 g m3 
1
Rout  || rO3 || rO 2 || rO1
g m3

CS Stage Example 2
• M1 is the amplifying device; M3 serves as a source (degeneration)
resistance; M2 serves as the load.
E i l t circuit
Equivalent i it ffor small‐signal
ll i l analysis
l i

1  0

rO2
Av  
1 1
 || rO3
gm1 gm3

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CS Stage vs. CG Stage

• With the input signal applied at different locations, these circuits
behave differently, although they are identical in other aspects.
Common source amplifier Common gate amplifier

1  0

2  0

rO1
Av  gm1(1 gm2rO2 )RS  rO2  || rO1 Av 
1
 RS
gm2

Composite Stage Example 1

• By replacing M1 and the current source with a Thevenin
equivalent circuit, and recognizing the right side as a CG stage,
g ggain can be easilyy obtained.
the voltage

1  0 2  0
RD
Av 
1 1

g m 2 g m1

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Composite Stage Example 2

• This example shows that by probing different nodes in a circuit,
different output signals can be obtained.
• Vout1 is a result of M1 actingg as a source follower,, whereas Vout2
is a result of M1 acting as a CS stage with degeneration.
1
|| rO2
vout1 gm2

vin 1 1
 || rO2
gm1 gm2

1  0 1
|| rO3 || rO4
vout2 g m3

vin 1 1
 || rO2
gm1 gm2

Short‐Circuit Transconductance
• The short‐circuit transconductance is a measure of the
strength of a circuit in converting an input voltage signal into
p current signal:
an output g

iout
Gm 
vin vout  0

• The voltage gain of a linear circuit is Av  Gm Rout

(Rout is the output resistance of the circuit)

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What Next
• Cascode stage
• Current Mirror
• Frequency Response

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