Chapter-1 Digital Systems and Binary Numbers
Chapter-1 Digital Systems and Binary Numbers
Chapter 1:
Digital Systems and Binary Numbers
Edited by: Semere Seged,
Mekelle University
April 2024
* Original Credit to Eastern Mediterranean University
Analog system
The physical quantities or signals may vary continuously over a specified
range.
Digital system
The physical quantities or signals can assume only discrete values.
Greater accuracy
X(t) X(t)
t t
Analog signal Digital signal Digital Logic Design Ch1-4
Binary Digital Signal
Logic 0
t
Binary digital signal
Digit Weight 5 1 2 7 4
Weight = (Base) Position
Magnitude 100 10 1 0.1 0.01
Sum of “Digit x Weight”
Formal Notation
500 10 2 0.7 0.04
d2*B2+d1*B1+d0*B0+d-1*B-1+d-2*B-2
(512.74)10
Digital Logic Design Ch1-6
Binary Number System
Base = 2
2 digits { 0, 1 }, called binary digits or “bits”
Weights
Weight = (Base) Position 4 2 1 1/2 1/4
Magnitude 1 0 1 0 1
Sum of “Bit x Weight” 2 1 0 -1 -2
Formal Notation 1 *2 2
+0 *2 1
+1 *2 0
+0 *2 -1
+1 *2 -
2
Groups of bits 4 bits = Nibble
8 bits = Byte =(5.25)10
(101.01)2
1011
11000101
Digital Logic Design Ch1-7
Hexadecimal Number System
Base = 16
16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }
Weights
Weight = (Base) Position 256 16 1 1/16 1/256
Magnitude 1 E 5 7 A
Sum of “Digit x Weight”
2 1 0 -1 -2
Formal Notation
1 *162+14 *161+5 *160+7 *16-1+10 *16-2
=(485.4765625)10
= (1E5.7A)16
n 2n n 2n
0 20=1 8 28=256
1 21=2 9 29=512
2 22=4 10 210=1024 Kilo
3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega
Column Addition
1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23
1 0 1 0 1 0 0 = 84
≥ (2)10
1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23
0 1 1 0 1 1 0 = 54
Bit by bit
1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1
1 1 1 0 0 1 1 0
Decimal Binary
(Base 10) (Base 2)
Hexadecimal
(Base 16)
Evaluate
Magnitude
Digital Logic Design Ch1-14
Decimal (Integer) to Binary Conversion
Example: (13)10
Quotient Remainder Coefficient
13 / 2 = 6 1 a0 = 1
6 /2= 3 0 a1 = 0
3 /2= 1 1 a2 = 1
1 /2= 0 1 a3 = 1
Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2
MSB LSB
Digital Logic Design Ch1-15
Decimal (Fraction) to Binary Conversion
Example: (0.625)10
Integer Fraction Coefficient
0.625 * 2 = 1 . 25 a-1 = 1
0.25 * 2 = 0 . 5 a-2 = 0
0.5 *2= 1 . 0 a-3 = 1
Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2
MSB LSB
( 1 0 1 1 0 . 0 1 )2 4 100
5 101
6 110
( 2 6 . 2 )8 7 111
Example (10110000)2
(01001111)2
If you add a number and its 1‟s complement …
10110000
+ 01001111
11111111
Radix Complement
Example: Base-10
Example: Base-2
Example 1.5
Using 10's complement, subtract 72532 – 3250.
Example 1.6
Using 10's complement, subtract 3250 – 72532.
Example 1.7
Given the two binary numbers X = 1010100 and Y = 1000011, perform the
subtraction (a) X – Y ; and (b) Y X, by using 2's complement.
Table 1.3 lists all possible four-bit signed binary numbers in the
three representations.
Digital Logic Design Ch1-28
Signed Binary Numbers
Example:
Arithmetic Subtraction
In 2‟s-complement form:
1. Take the 2‟s complement of the subtrahend (including the sign bit)
and add it to the minuend (including sign bit).
2. A carry out of sign-bit position is discarded.
( A) ( B) ( A) ( B)
( A) ( B) ( A) ( B)
Example:
BCD Code
A number with k decimal digits will
require 4k bits in BCD.
Decimal 396 is represented in BCD
with 12bits as 0011 1001 0110, with
each group of 4 bits representing one
decimal digit.
A decimal number in BCD is the
same as its equivalent binary number
only when the number is between 0
and 9.
The binary combinations 1010
through 1111 are not used and have
no meaning in BCD.
Example:
Consider decimal 185 and its corresponding value in BCD and binary:
BCD addition
Example:
Consider the addition of 184 + 576 = 760 in BCD:
Error-Detecting Code
To detect errors in data communication and processing, an eighth bit is
sometimes added to the ASCII character to indicate its parity.
A parity bit is an extra bit included with a message to make the total
number of 1's either even or odd.
Example:
Consider the following two characters and their even and odd parity:
Error-Detecting Code
Redundancy (e.g. extra information), in the form of extra bits, can be
incorporated into binary code words to detect and correct errors.
A simple form of redundancy is parity, an extra bit appended onto the code
word to make the number of 1‟s odd or even. Parity can detect all single-
bit errors and some multiple-bit errors.
A code word has even parity if the number of 1‟s in the code word is even.
A code word has odd parity if the number of 1‟s in the code word is odd.
Example:
Memory
Control
CPU unit Datapath
Figure 1.1 Transfer of information among register Digital Logic Design Ch1-44
Transfer of information
Figure 1.2 Example of binary information processing Digital Logic Design Ch1-45
===
End of CH-1:
The following few Slides are from CH-2 Intro Concepts …
AND OR NOT
x y z x y z x z
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
z=x•y=xy z=x+y z = x = x’
x x x
y z y z z
Digital Logic Design Ch1-48
Switching Circuits … CH-2
AND OR
Logic gates
Graphic Symbols and Input-Output Signals for Logic gates: