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Handout - VLSI Design

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Nivedita Acharyya 2035
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31 views

Handout - VLSI Design

Uploaded by

Nivedita Acharyya 2035
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, PILANI – K. K.

BIRLA GOA
CAMPUS

I-Semester 2022-23
Course Handout – II
In addition to Part-I (General Handout for all courses appended to the timetable) this portion gives
specific details regarding the course

Course No.: MEL G621

Course Title: VLSI DESIGN

Instructor-in-charge: Apurba Chakraborty ([email protected])

1. Scope and Objective

The objective of this course is to understand the need and importance of digital VLSI design in
CMOS integrated circuits. To understand different design principles used in the design of Digital
VLSI Circuits & Systems using CMOS with emphasis on low power and high performance. We
will study the fundamental structures of VLSI Systems at the lowest levels of system abstraction,
namely those associated with the direct application of VLSI devices to particular problems of
interest. The broad topics of coverage includes Principles of operations of CMOS transistors used
as a digital switch and various other topologies used in Digital VLSI Design, Logic implementation
strategies and performance characterization of the VLSI circuits, Low Power Design, different
clocking strategies, symbolic layout systems, CMOS subsystems design and Memory modules etc.

2. Book:

TEXTBOOKS

T1 “Essential of VLSI Circuits and systems”, Kamaran Esharaghian, Dauglas A, Puecknell Sholen
Eshraghian Publisher: PHI 2009.
T2 “CMOS Digital Integrated Circuit, Analysis and Design”, Sung-Mo Kang and Yusuf Leblebici
, Publisher: Mcgraw-Hill Companies, Inc 2003.

REFERENCE BOOKS

R1 “Digital Integrated Circuits, A design Perspective”, Jan M Rabaey, Anatha Chandrakasan,


Borivoje Nikolic, 2nd edition, Prantice Hall, 2005.
R2 “CMOS VLSI Design: A Circuits and Sytems Perspective”, Neil H.E. Weste, David Money
Harris, 4th edition, Addison-wesley, 2011.
3. Course Plan
Lecture Topic Learning Objective Reference
1 Introduction to VLSI Design Overview of technology and design Chapter 1 (T2)
trends
2-5 Device Physics and Modeling of Basic MOS Physics, Current- voltage Chapter 3 (T2)
MOS transistor relation, technology scaling and short
channel effects, SPICE Modeling
6-9 CMOS Processing technology, CMOS Fabrication processing steps, Chapter 3 (T1)
Layout and Design rules stick diagram, Layout Design rules
10-13 static NMOS/CMOS Inverter, Voltage Transfer Characteristics of Chapter 5 (T2)
Voltage transfer characteristics. CMOS, performance measure of Chapter 5 (R1)
CMOS Inverters, Noise margins.
14-16 Dynamic behavior of CMOS Different capacitances of CMOS Chapter 6 (T2)
Inverter devices, switching characteristics and
RC delay model.
17-22 Combinational CMOS Logic Building blocks of combinational Chapter 6.2-6.4(T1).
design logics, example of structures logic Chapter 6 (R1)
design, optimization for speed and
method of logical efforts. Different
design style: ratioed logic, pass
transistor logic and pseudo NMOS
logic
23-26 Sequential CMOS logic design Design of Latches, Flipflops and Chapter 7 (R1)
registers
27-30 Dynamic and domino logic Dynamic Logic design techniques, Chapter 7 (R1)
NORA, pipelining approach. Chapter 9 (T2)
31-33 Designing Arithmetic blocks Data path design: Adder, Multiplier Chapter 8.4-8.5 (T1)
and shifter.
34-36 Designing memory and arrays SRAM Design, DRAM , Flash Chapter 9 (T1)
memory, decoder and sense amplifier
design.
37-38 Basic timing issues, Clocks and Synchronous design, timing metrics, Chapter 10.1-10.2
I/O ESD protection circuits, input output (R1)
circuits. Chapter 13 (T2)
39-40 Validation and test Test procedure and design of Note
testability

4. Evaluation Scheme:
S. No Component Duration Marks Remark
1 Midsem Exam 90 Minutes 25 Close Book
2 Quiz: Quiz 1 and Quiz 2 20 minutes each 20 Open Book
3 Lab Assignment, Project Continuous evaluation 15 Open Book
work and presentation
4 Comprehensive Exam 3 Hours 40 Close Book
5. Chamber consultation hour: To be announced in the class.
6. Makeup policies: Application for make-up exam shall be granted only in genuine case.
Makeup exam will be considered only for Mid-sem and comprehensive Exam. An application
with all relevant documents is required to be submitted to IC of this course at least a day before
the scheduled exam. No make-up will be given for quizzes, tutorials and lab evaluations etc.
7. Notices: All notices will be put on moodle page of course. All students are requested to
check their institute mail regularly

Instructor In-charge
(MEL G621)

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