8051 Question and Answer Bank
8051 Question and Answer Bank
A device which contains the microprocessor with integrated peripherals like memory, serial
ports, parallel ports, timer/counter, interrupt controller, data acquisition interfaces like ADC,
DAC is called microcontroller.
The overall system cost is low , as the peripherals are integrated in a single chip.
The size is very small
The system is easy to troubleshoot and maintain.
If required additional RAM , ROM and I/O ports may be interfaced. The
system is more reliable.
a) DJNZ Rn, rel Decrement the content of the register Rn and jump if not zero.
b) DJNZ direct, rel Decrement the content of direct 8- bit address and jump if not zero.
6. State the function of RS1 and RS0 bits in the flag register of Intel 8051 microcontroller?
RS1, RS0- Register bank select bits
RS1, RS0- Bank
Bank 0
Bank 1
Bank 2
Bank 3
8. Specify the single instruction, which clears the most significant bit of B register of 8051,
without affecting the remaining bits.
Single instruction, which clears the most significant bit of B register of 8051, without affecting the
remaining bits, is CLR B.7.
PSEN: PSEN stands for program store enable. In 8051 based system in which an external
ROM holds the program code, this pin is connected to the OE pin of the ROM.
EA: EA stands for external access. When the EA pin is connected to Vcc, program fetched to address
0000H through 0FFFH are directed to the internal ROM and program fetches to addresses
1000H through FFFFH are directed to external ROM/EPROM. When the EA pin is grounded, all
addresses fetched by program are directed to the external ROM/EPROM.
DPTR stands for data pointer. DPTR consists of a high byte (DPH) and a low byte (DPL).
Its function is to hold a 16-bit address. It may be manipulated as a 16- bit data registers. It serves
as a base register in indirect jumps, lookup table instructions and external data transfer.
SP stands for stack pointer. SP is a 8-bit wide register. It is incremented before data is stored during
PUSH and CALL instructions. The stack array can reside anywhere in-chip RAM. The stack pointer is
initialised to 07H after a reset. This causes the stack to begin at location. 08H.
The 8051 operations that do not use the internal 128 byte RAM address from 00 H to 7F H are done
by a group of special internal registers called SPFs (Special Function Registers) which have address
between 80 H and FF H.
Accumulator
B Register
Program status Word.
Stack pointer.
Data pointer
Port 0 Port 1 Port 2 Port 3 Interrupt
priority control register.
Interrupt enable control register.
EA ET2 ES
14. What is the function of SM2 bit present in SCON register in 8051?
SM2 enables the multiprocessor communication feature in modes 2 and 3. If SM2 = 1, RI will not be
activated if the received 9th data bit (RB8) is 0.
In mode 1, if SM2 = 1, RI will not be activated if a valid stop bit was not received.
Baud rate is used to indicate the rate at which data is being transferred. Baud rate = 1/Time for a
bit cell.
16. If a 12 Mhz crystal is connected with 8051, how much is the time taken for the count in
timer 0 to get incremented by one?
Baud rate = oscillator frequency/12 = (12 Χ 106) / 12 =1 Χ 106 Hz T = 1/f = 1 /(1 Χ 106 ) = 1 μ sec
External interrupt-0 , External interrupt-1,Timer-0 interrupt, Timer-1 interrupt, and serial port
interrupt.
To select the operating mode and the timer/counter operation of the timers we use TMOD register.
Timer 0 and timer 1 are 2 timer registers in 8051. Both of these registers use the same register
called
TMOD to set various timer operation modes. TMOD is dedicated to the two timers (Timer0 and
Timer1) and can be considered to be two duplicate 4 bit registers, each of which controls the action
of one of the timers.
MSB LSB
GATE C/T M1 M0 GATE C/T M1 M0
Timer1 Timer2
22. Write a program to subtract the contents of RI of Bank0 from the contents of R0 0f Bank2.
23. How the RS-232 serial bus is interrupt to 1TL logic device?
The RS-232 signal voltage level devices are not compatible with TTL logic levels. Hence for
interfacing TTL devices to RS-232 serial bus, level converters are used. The popularly used level
converters are MC 1488 & MC 1489 or MAX 232.
b. the 8096 is designed to use in application which require high speed calculations and fast I/O
operation.
c. The high speed I/O section of an 8096 includes a 16-bit timer, a 16- bit counter, a 4 input
programmable edge detector, 4 software timer and counter 6-output programmable events
Generator.
d. It has 100 instructions, which can operate on bit, byte, word and double words.
e. The bit operation is possible and these can be performed on any bit in the register file or in the
special function register.
25. Explain the operating mode 0 of 8051 serial ports?
In this mode serial enters & exits through RXD, TXD outputs the shift clock 8 bits are
transmitted/received: 8 data bits (LSB first). The baud rate is fixed at 1/12 the oscillator
frequency.
In this mode 11 bits are transmitted (through TXD) or received (through RXD): a start bit (0), 8 data
bits (LSB first) a, programmable 9th data bit, & a stop bit (1).ON transmit the 9th data bit (TB* in
SCON) can be assigned the value of 0 or 1.
For eg: the parity bit (P, in the PSW) could be moved into TB8. On receive the 9th data bit go in to
the RS8 in Special Function Register SCON, while the stop bit is ignored. The baud rate is
programmable to either 1/32, or 1/64 the oscillator frequency.
In this mode 11 bits are transmitted (through TXD) or received (through RXD): a start bit (0), 8 data
bits (LSB first) a, programmable 9th data bit, & a stop bit (1). In fact, Mode 3 is the same as Mode
2 in all respect except the baud rate. The baud rate in Mode 3 is variable.
In all the four modes, transmission is initiated by any instruction that uses SBUF as a destination
register. Reception is initiated in Mode 0 by the condition RI=0 & REN=1. Reception is initiated in
other modes by the incoming start bit if REn=1.
Direct addressing
Register addressing
Register indirect addressing
Implicit addressing
Immediate addressing
Index addressing
Bit addressing
1. What are the different types of methods used for data transmission?
(b) Duplex
In simplex mode, data is transmitted only in one direction over a single communication channel.
For example, a computer (CPU) may transmit data for a CRT display unit in this mode.
In duplex mode, data may be transferred between two transreceivers in both directions
simultaneously.
In half duplex mode, on the other hand, data transmission may take place in either direction, but
at a time may be transmitted only in one direction. For example, a computer may communication
with a terminal in this mode. When the terminal sends data (i.e. terminal is sender).The message is
received by the computer (i.e. computer is receiver). However, it is not possible to transmit data
from the computer to terminal and from terminal to the computer simultaneously.
It is a data method which is used when the I/O device and the microprocessor match in speed. The
transfer a data to or from the device, the user program issues a suitable instruction addressing the
device. The data transfer is completed at the end of the execution of this instruction.
4. What is asynchronous data transfer?
It is a data transfer method which is used when the speed of I/O device does not match with the
speed of the microprocessor. Asynchronous data transfer is also called as Handshaking.
It is a word stored in a register (control register) used to control the operation of a program digital
device.
6. What is an USART?
Mechanical switch are used as keys in most of the keyboard. When a key is pressed the contact
bounce back and forth and settle down only after a small time delay (about 20ms). Even though a
key is actuated once, it will appear to have been actuated several times. This problem is called Key
Bouncing.
9. What is TXD?
TXD- Transmitter Data Output. This output pin carries serial of the transmitted data bits along with
other information like start bit, stop bits and priority bit.
The hold request output request the access of the system bus. In non- cascaded 8257 systems, this
is connected with HOLD pin of CPU. In cascade mode, this pin of a slave is connected with a DRQ
input line of the master 8257, while that of the master is connected with HOLD input of the CPU.
The time taken by the DAC to convert a given digital data to corresponding analog signal is called
conversion time.
The different types of ADC are successive approximation ADC, counter type ADC, flash type ADC,
integrator converters and voltage to frequency converters.
The scan section has a scan counter and four scan lines. These scan line scan be decoded using a
4to-16 decoder to generate 16 lines for scanning
The task involved in keyboard interfacing are sensing a keyboard interfacing are sensing a key
actuation, de bouncing the key and generating key codes(decoding the key).these task are
performed software if the keyboard is interfaced through ports and they are performed by
hardware if the keyboard is interfaced through 8279.
The return lines RL0 to RL7 of 8279 are used to form the columns of keyboard matrix.in decoded
scan the scan lines SLO to SL3 of 8279 are used to form the rows of keyboard matrix. In encoded
scan mode, the output lines of external decoder are used as rows of keyboard matrix.
The process of sending a zero to each row of a keyboard matrix and reading the columns for key
actuation is called scanning. The scan time is the time taken by the processor to scan all the rows
one by one starting from first row and coming back to the first row.
In simplex transmission, data are transmitted in only one direction. Example: transmission from a
microcomputer to a printer.
20. What is the purpose of control word written to control register in 8255?
The control words written to control register specify an I/O function for each I/O port. The bit D7
of the control word determines either the I/O functions of the BSR function.
Port - A : 8- bits Port – B : 8- bits Port -CU : 4- bits Port –CL : 4- bits
The 8255A is a widely used, programmable, parallel I/O device. It can be programmed to transfer
data under various conditions, from simple I/O to interrupt I/O.
1. Two 8-bit ports (port A and port B) and two 4-bit ports (port C upper and lower) are available.
The two 4-bit ports can be combined used as a third 8- it port.
2. Any port can be used as an input or output port.
3. Output ports are latched. Input ports are not latched.
4. A maximum of four ports are available so that overall 16 I/O configurations are possible.
Two groups A and group B are available for strobe data transfer. Each group contains one 8-bit
data I/O port and one 4-bit control/data port. The 8-bit data port can be either used as input
or output port. The inputs and outputs both are latched. Out of 8-bit port C, PC0-PC2 is used to
generate control signals for port B and PC3=PC5 are used to generate control signals for port A.
The inputs PC6, PC7 may be used as independent data lines.
10. What are the signals used in input control signal and output control signals?
Input control signals : STB (Strobe input), IBF (Input buffer full) , INTR (Interrupt request)
Output control signal : OBF (Output buffer full) , ACK (Acknowledge input) INTR (Interrupt request)
27. Specify the bit of a control word for the 8255, which differentiates between the I/O mode
and the BSR mode?
28. Write down the output control signals used in 8255A PPI?
OBF output Buffer Full, ACK Acknowledge, INTR Interrupt request and INTE Interrupt Enable
Each of the three counters of 8253 can be operated in one of the following six modes of operation.
a) I/O Mode
i. Mode 0- Simple Input/Output.
ii. Mode 1- Strobe Input/Output (handshake mode) iii. Mode 2-
Strobe bi-directional mode
b) Bit Set/Reset Mode.
(a) Fully Nest Mode (b) End of Interrupt (c) Automatic Rotation (d) Automatic EOI mode (e) Specific
Rotation (f) Special Mask Mode (g) Edge and level Triggered Mode (h) Reading 8259
Status (i) Poll command (j) Special Fully Nested Mode (k) Buffered Mode (l) Cascade Mode
The Read- Back Command in 8254 allows the user to read the count and the status of the counter
35. What are the functional types used in control words of 8251a?
The control words of 8251A are divided into two functional types.
Mode Instruction control word: - This defines the general operational characteristics of 8251A.
Command Instruction control word: - The command instruction controls the actual operations of
the selected format like enable transmit/receiver, error reset and modem control.
36. What is the use of 8251A chip?
The modem control unit handles the modem handshake signals to coordinate the communication
between the modem and the USART.
8251 chip is mainly used as the asynchronous serial interface between the processor and the
external equipment.
Read/Write control logic, Three buffer registers, Data register, Control register transmission
receiver, Data bus buffer and Modem control.
RXD- Receive Data Input. This input pin of 8251A receives a composite stream of the data to be
received by 8251A.
8279 provides two output modes for selecting the display options, Display and scan. In display
mode, 8279 provides 8 or 16 character- multiplexed displays those can be organized as dual 4-bit
or single 8-bit display units. Display Entry 8279 allows options for data entry on the displays. The
display data is entered for display from the right side or from the left side.
Keyboard/ Display
1. Left Entry Mode : In the left entry mode, the data is entered from the left side of the display unit.
2. Right Entry Mode : In the right entry mode, the first entry to be displayed is entered on the
rightmost display.
46. What are the different types of write operations used in 8253?
The scan counter has two modes to scan the key matrix and refresh the display. In the encoded
mode, the counter provides binary count that is to be externally decoded to provide the scan lines
for keyboard and display. In the decoded scan mode, the counter internally decodes the least
significant 2 bit and provides a decoded 1 out of 4 scan on SL3-SL 3. The keyboard and display both
are in the same mode at a time.