Timer & Counter of 8051 𝝁𝝁C

 8051 has Two 16 bits Timers T0 & T1, working as up counters.  Timer or Counter?
T0 and T1 is further divided into 8bits of registers TH0-TL0 and  If clock to the count is given by internal clock of 8051 then it
TH1-TL1. will be timer and if clock is given by external clock on T0 and T1

a
T0 T1 then it will be counter.

d
 That is to be configured by TMOD register of 8051.

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 T/C bit will decide timer or counter configuration of 8051.
TH0 TL0 TH1 TL1

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 How Timer / Counter works?

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Load Count in T0 or T1

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 How to Load Count? ISR Address

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Make TF0 or TF1 bit

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 This Timers are Up counter.
Count will

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 So, on given clock it will increment by 1. to 0 before it jumps

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 When it reaches to FFFFH, it will rolls back to 0000H and during increase after to ISR Address

in
that it will generates Timer Overflow interrupt. every clock

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Count = FFFFH – Value + 1

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When Count rolls from

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 So, if you wants to count 9 then Count = FFFF – 9 + 1 = FFF7H
MOV TH0, #FFH
FFFFH to 0000H, it will
MOV TL0, #F7H make TF0 or TF1 bit to 1.
{It is interrupt to 8051}
Clock
COUNT RETI
 ISR Address of Timer 0 and Timer 1
 Timer 0 ISR Address is 000BH and Timer 1 ISR Address is 001BH
 This count loaded in T0 or T1 will increment after every clock.
 TCON & TMOD of 8051 𝝁𝝁C
 8051 has Two 16 bits Timers T0 & T1, working as up counters.  IT1 and IT0 – External Interrupt Type bit
T0 and T1 is further divided into 8bits of registers TH0-TL0 and  SET 1 = 𝑰𝑰𝑰𝑰𝑰𝑰𝑰𝑰 and 𝑰𝑰𝑰𝑰𝑰𝑰𝟎𝟎 must be –ve edge trigger.
TH1-TL1.  Clear 0 = 𝑰𝑰𝑰𝑰𝑰𝑰𝑰𝑰 and 𝑰𝑰𝑰𝑰𝑰𝑰𝑰𝑰 must be low level trigger.

a
 If T0 & T1 counts internal clock pulses, then it is timer.
 TMOD register – Timer Mode Control register

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 If T0 & T1 counts External clock pulses, then it is Counter.

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 Timer action is controlled by TCON and TMOD registers. GATE C/𝑻𝑻 � M1 M0 GATE C/𝑻𝑻 � M1 M0
 TCON register – {Bit Address TCON.7 to TCON.0}

F u
Timer 1 Timer 0

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TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

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� – Counter / Timer Type bit
 C/ 𝑻𝑻

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 TF1 and TF0 – Timer Overflow Flag  SET 1 = Acts as Counter. {External Frequency on T1 & T0}

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 SET 1 = When timer 1 and timer 0 overflows, when timer roll  Clear 0 = Acts as Timer. {Internal Frequency Fosc/12}

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overs to all 0’s.

in
 GATE – Gate Enable Control bit
 Clear 0 = When processor executes ISR after overflow. {For  SET 1 = Timer Controlled by Hardware. {INTX Signal}

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Timer 1 ISR address is 001BH and Timer 0 ISR address is  Clear 0 = Timer independent on INTX signal.

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000BH}

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 TR1 and TR0 – Timer Run Control Bit  M1 & M0 – Mode Control bits
 SET 1 = Start Counting Timer. M1 M0 Timer Mode
 Clear 0 = Halts Timer. 0 0 Timer Mode 0
 IE1 and IE0 – External Interrupt bit 0 1 Timer Mode 1
 SET 1 = when 8051 receives interrupt on 𝑰𝑰𝑰𝑰𝑰𝑰𝑰𝑰 and 𝑰𝑰𝑰𝑰𝑰𝑰𝟎𝟎.
1 0 Timer Mode 2
 Clear 0 = when ISR executed. {For 𝑰𝑰𝑰𝑰𝑰𝑰𝑰𝑰 ISR address is 0013H
and 𝑰𝑰𝑰𝑰𝑰𝑰𝟎𝟎 ISR address is 0003H} 1 1 Timer Mode 3
Engineering Funda Android App 8051 YT Playlist
 Working of Timer/Counter in 8051 𝝁𝝁C
 TCON register – {Bit Address TCON.7 to TCON.0}
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 Oscillator
Fosc/12

a
Frequency

d
 TMOD register – Timer Mode Control register � = 0, Timer
C/𝑻𝑻
GATE �
C/𝑻𝑻 M1 M0 GATE �
C/𝑻𝑻 M1 M0 Timer
u n
F
Timer 1 Timer 0 � = 1, Counter
C/𝑻𝑻 Count

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Stages

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T0 or T1 Pin

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 8051 has Two 16 bits Timers T0 & T1, working as up counters.

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 � bit we can select timer and counter.
By C/𝑻𝑻

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 In Timer, clock will be given by internal clock.
Counter

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 In counter, clock will be given by T0 or T1 Pin of 8051.

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 To have running counter, TR bit of TCON register must be 1.

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 If Timer/Counter is triggered by external signal then GATE = 1
TR0 or TR1

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of TOMD register, which means Timer/ Counter operation will
get trigger by INTX {INT0 or INT1}.
 If Timer 0 is configured then with GATE bit we use INT0
INTX
hardware interrupt to trigger Timer/Counter.
 If Timer 1 is configured then with GATE bit we use INT1
hardware interrupt to trigger Timer/Counter. GATE
 If GATE bit is logic 1, then INTX pin will used for timer/Counter
only.
Engineering Funda Android App 8051 YT Playlist
 Modes of Timer/Counter in 8051 𝝁𝝁C
 Timer Mode 0 {13 bits Timer/ Counter}  Timer Mode 2 {8 bits Auto reload TL from TH}
Clock Interrupt
Clock Interrupt TLX [8] TFX

a
TLX [5] THX [8] TFX

n d
 TLX will increment on every count.

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 TLX has 5 bits for count and THX has 8 bits for count. So in  When TLX rolls over from FFH to 00H,

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total, 13 bits of count is available in this mode 0. Two events are happening.
THX [8] 1. TFX will give interrupt

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 After 32 counts TLX rolls over and it will increment THX.
2. THX will reload TLX

in
 So TLX will divides the frequency by 32.

r
 By this mode, total maximum count can be 𝟐𝟐𝟏𝟏𝟏𝟏 = 8K.  Maximum count = 𝟐𝟐𝟖𝟖 =256

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 So maximum delay = 8192 (12/Fosc)  Maximum delay = 256 (12/Fosc)

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 Timer Mode 1 {16 bits Timer/ Counter}  Timer Mode 3 {Two 8 bits timer by Timer 0}
Clock
g i n Interrupt Clock
TL0 [8] TF0
Interrupt

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TLX [8] THX [8] TFX




E
TLX and THX used completely here with Mode 1.
On each clock 16 bits will increment by 1.
TFX will set to 1, when all 16 bits rolls from FFFFH to 0000H.
Clock


TH0 [8] TF1
Interrupt

TL0 and TH0 used with two separate timers.

 By this mode, total maximum count can be 𝟐𝟐𝟏𝟏𝟔𝟔 = 64K.  TL0 will give interrupt to TF0 flag bit of Timer 0.
 So maximum delay = 65536 (12/Fosc)  TL0 can be used as Timer and Counter.
 TH0 will give interrupt to TF1 flag bit of Timer 1.
 TH0 can only be used as Timer.
 Timer Programming in 8051 𝝁𝝁C
 Write a program to Generate delay of 20 µSec and
send logic 1 on P2.0. Assume Fosc = 12MHz

a
 TCON register – {Bit Address TCON.7 to TCON.0} MOV TMOD, #00000001B ;Timer 0 Mode 1

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MOV TL0, #ECH

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TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

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MOV TH0, #FFH ;Count 20 = 14H

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MOV TCON, #00010000B ;Start Timer
 TMOD register – Timer Mode Control register Wait: JNB TCON.5, Wait ;wait for 20µSec
GATE �
C/𝑻𝑻 M1 M0 GATE �
C/𝑻𝑻 M1 M0

in g SETB P2.0 ;logic ‘1’ on P2.0

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MOV TCON, #00000000B ;Stop Timer

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Timer 1 Timer 0 Here: SJMP Here ;End of Program

i n e
 For Timer 0 with Mode 1 as 16 bits timer, TMOD = 0000 0001B

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 To start Timer 0 with mode 1, TCON = 0001 0000B
 To stop time 0 with mode 1, TCON = 0000 0000B

 So value of Count = 20 = 14H E

 To calculate Count, one count time = 12/Fosc = 1µSec.

 As timer is up counter actual value should be loaded will be

Count = FFFFH – 14H + 1 = FFECH
 TL0 = ECH and TH0 = FFH, to be loaded for delay of 20µSec.
 Timer Programming in 8051 𝝁𝝁C
 Write a program to Generate square wave of 1KHz
on TxD pin. Assume Fosc = 12MHz

a
 TCON register – {Bit Address TCON.7 to TCON.0} CLR P3.1 ;Clear TxD line

d
Repeat: MOV TMOD, #00000001B ;Timer 0 Mode 1

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TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

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MOV TL0, #0CH

F
MOV TH0, #FEH ;Count 500 = 1F4H
 TMOD register – Timer Mode Control register MOV TCON, #00010000B ;Start Timer
GATE �
C/𝑻𝑻 M1 M0 GATE �
C/𝑻𝑻 M1 M0

in g
Wait: JNB TCON.5, Wait ;wait for 0.5mSec

r
CPL P3.1 ;Square wave

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Timer 1 Timer 0 MOV TCON, #00000000B ;Stop Timer


i n e
For Timer 0 with Mode 1 as 16 bits timer, TMOD = 0000 0001B
SJMP Repeat ;Repeat of Program

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 To start Timer 0 with mode 1, TCON = 0001 0000B

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 To stop time 0 with mode 1, TCON = 0000 0000B

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 Square wave of 1KHz has time = 1msec.
 So for 0.5msec, It should be high and for 0.5msec, it should be
low.
 To calculate Count, one count time = 12/Fosc = 1µSec.
 So value of Count = 0.5msec/1µSec = 500 = 1F4H
 As timer is up counter actual value should be loaded will be
Count = FFFFH – 1F4H + 1 = FE0CH
 TL0 = 0CH and TH0 = FEH