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1 - ACKTS - Unit 1 Learning Material

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temp29890
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UNIT-I

LOW – FREQUENCY SINGLE – STAGE AMPLIFIERS


Objectives
 To introduce basic structures of MOSFET and BJT amplifier circuits.
 To familiarize with characteristic parameters of amplifiers
 To design and analyse behaviour of BJT & FET amplifiers at low frequencies.
 To Discuss the General considerations of High – frequency response of
an amplifier.
 To Discuss the High-frequency response of the CS and CE amplifiers

Syllabus
UNIT- I: Single-Stage MOS and BJT Amplifiers

Single-Stage MOS amplifiers: Three basic configurations, Characterizing


Amplifiers, The common-source (CS) amplifier.
Single-Stage BJT amplifiers: Basic Structure, The common-Emitter (CE)
amplifier.

High Frequency response - General considerations : The High-frequency


Gain Function, Determining the 3-dB frequency f H , Using Open-Circuit Time
Constants for the approximate determination of fH , Miller's Theorem
High-frequency response of CS and CE amplifier - Analysis using Miller's
Theorem - Analysis using Open-Circuit Time Constants - Adapting these
formulas for the case of the CE amplifier
Pre-requisites
 Small-signal models of MOSFET
 Small-signal models of BJT
 Circuit models for amplifiers
 The terms: Frequency response and Bandwidth of an amplifier
 High-frequency equivalent circuits MOSFET and BJT
 Unity Gain frequency

Outcomes:
Students will be able to
 distinguish unilateral and non-unilateral amplifiers
 analyse FET and BJT amplifiers at low frequencies
 Draw, analyse, and characterize the MOS and BJT single-stage
amplifiers at high frequencies.

Pre-requisites
 Small – signal equivalent circuit models of MOSFET
 From a signal point of view the FET behaves as a Voltage Controlled
current source. It accepts a signal VGS between gate and source and
provides a current gm VGS, at the drain terminal.
 The input resistance of this controlled source is very high – ideally
infinite. The output resistance – i.e., resistance looking in to the drain –
also is high.
 Putting all of this together, we get the circuit in as shown in below figure
that represents the small signal model or small signal equivalent circuit.

Fig. A1. Small signal model for the MOSFET neglecting the
dependence of iD on VDS in saturation
 From MOSFET characteristics in saturation, we know that the drain
current does in fact depend on VDS in linear manner. Such linear relation
was modelled by a finite resistance r o between drain and source. we
represent it as

 Accuracy of the small signal model can be improved by including r o in


parallel with the controlled source.
Fig. A2 Small signal model for MOSFET including the effect of channel – length
modulation.
The T Equivalent Circuit Model
 Although hybrid –π model can be used to carry out small signal analysis
of all transistor circuits, there are situations in which alternative model
shown in below fig, is much more convenient, is called as T model.

 Observe that the gate current doesn’t change (remains equal to zero) -
thus this connection doesn’t alter the terminal characteristics.
 Here, resistance 1/gm = vgs /iS = Gate to Source resistance looking into
the source
 Note that the resistance between gate and source, looking into the gate,
is infinite.

Fig. A3: T-equivalent circuit model for the MOSFET. For simplicity, r o has been
omitted but can be added between D and S.

 In T-model including resistance r o between drain and source the circuit is


modeled as follows.
Fig. A4: The T - model of the MOSFET augmented with the drain to source
resistance ro

 Small signal equivalent circuit models of BJT

The Hybrid – π Model


An equivalent circuit model for the BJT is shown in below Fig.

Fig. A5: Simplified hybrid – π model for the small signal operation of the
BJT.

 Model (a) represents the BJT as a voltage controlled current source (a


transconductance amplifier) and explicitly includes the input resistance
looking into the base rπ. The model obviously yields ic = gmvbe , ib= vbe/rπ ,
and ie = vbe/re.
 Note: β = gm rπ , re = rπ /1+ β ; gmvbe = β ib

 Finally, although the models have been developed for an NPN transistor,
they apply equally well to a PNP transistor with no change of polarities.

The T Model :
Figure represents the BJT as a voltage controlled current source with the
control voltage being vbe. Here, however, the resistance between base and
emitter, looking into the emitter, is explicitly shown.
Fig. A6: T model of the BJT

The two versions of T-model shown in above figure. From fig (a) we see clearly
that the model yields the correct expression for ic and ib.

 ic = gm vbe , ib= vbe/rπ , and ie = vbe/re.


 Note: β = gm rπ , α = gm re , re = rπ /1+ β ; rπ = re (1+
β) ; gmvbe = β ib = α ie

Frequency Response of Amplifiers


 An important characterization of an amplifier in terms of its response to
input sinusoids of different frequencies. Such characterization of
amplifier performance is known as the amplifier frequency response.

 Fig. A7: Typical magnitude response of amplifier.

Amplifier bandwidth
 The band of frequencies over which the gain of the amplifier is almost
constant,to within a certain number of decibels(usually 3dB),is called
the Amplifier bandwidth.
High Frequency Equivalent of MOSFET:
Figure A.8 (a) shows the small-signal model of the MOSFET, including the four
capacitances Cgs, Cgd, Csb, and Cdb. This model can be used to predict the
high-frequency response of MOSFET amplifiers. It is, however, quite complex
for manual analysis, and its use is limited to computer simulation using, for
example, SPICE.

Fortunately, when the source is connected to the body, the model simplifies
considerably, as shown in Fig. A.8 (b). In this model, Cgd, although small,
plays a significant role in determining the high-frequency response of
amplifiers and thus must be kept in the model.

Fig. A.8 (a) High-frequency, equivalent-circuit model for the MOSFET.

Fig. A.9 (b) The equivalent circuit for the case in which the source is connected
to the substrate (body).
Capacitance Cdb, on the other hand, can usually be neglected, resulting in
significant simplification of manual analysis. The resulting circuit is shown in
Fig. A.8 (c).

Fig. A.8 : (c) The equivalent-circuit model of (b) with Cdb neglected (to simplify
analysis).

High Frequency Equivalent of BJT:


 Figure A.9 shows the hybrid-π model of the BJT, including capacitive
effects. Specifically, there are two capacitances: the emitter–base
capacitance Cπ = Cde + Cje and the collector–base capacitance Cμ .

Fig. A.9 The high-frequency hybrid-π model.


 The Base-Charging or Diffusion Capacitance Cde : When the
transistor is operating in the active mode, minority carrier charge is
stored in the base region. For an npn transistor, the minority cariers
stored in base are electrons.
 The Base–Emitter Junction Capacitance Cje : A change in vBE not
only changes the charge stored in the base region but also the charge
stored in the base–emitter depletion layer. This distinct charge-storage
effect is represented by the EBJ depletion-layer capacitance, Cje
 The Collector–Base Junction Capacitance Cμ : In active-mode
operation, the CBJ is reverse biased, and its junction or depletion
capacitance, usually denoted Cμ.
 Typically, Cπ is in the range of a few picofarads to a few tens of
picofarads, and Cμ is in the range of a fraction of a picofarad to a few
picofarads.
 Note that we have also added a resistor rx to model the resistance of the
silicon material of the base region between the base terminal B and a
fictitious internal, or intrinsic, base terminal that is right under the
emitter region (refer to Fig. 6.6).
 Typically, rx is a few tens of ohms, and its value depends on the current
level in a rather complicated manner.
 Since (usually) rx << rπ , its effect is negligible at low frequencies. Its
presence is felt, however, at high frequencies.

Unity Gain frequency:


 A figure of merit for the high-frequency operation of the MOSFET as an
amplifier is the unity-gain frequency, fT, also known as the transition
frequency, which gives rise to the subscript T. This is defined as the
frequency at which the short-circuit current-gain of the common-source
configuration becomes unity.
 Figure A.10 shows the MOSFET hybrid-π model with the source as the
common terminal between the input and output ports. To determine the
short-circuit current gain, the input is fed with a current-source signal
Ii and the output terminals are short-circuited.
 It can be seen that the current in the short circuit is given by
Fig. A.10 : Determining the short-circuit current gain Io / Ii

 Recalling that Cgd is small, at the frequencies of interest the second


term in this equation can be neglected,

---- (5)
 From Fig. A.8, we can express Vgs in terms of the input current Ii as

---- (6)
 Equations (9.28) and (9.29) can be combined to obtain the short-circuit
current gain,

 For physical frequencies s = jω, it can be seen that the magnitude of the
current gain becomes unity at the frequency

 Thus the unity-gain frequency f T = ωT /2π is

 Since fT is proportional to gm and inversely proportional to the MOSFET


internal capacitances, the higher the value of fT, the more effective the
MOSFET becomes as an amplifier.
 In case of BJT, the unity gain frequency is given by,
 In another simplified case, including the effect of load capacitance CL,
Unity gain frequency of MOSFET (equally applicable to BJT also) is
given by:

Fig. A10: Frequency response of a CS amplifier loaded with a


capacitance CL and fed with an ideal voltage source.
 For a given capacitive load a larger gain–bandwidth product is achieved
by operating the MOSFET at a higher gm.
 Further, shorter-channel MOSFETs and narrower-base BJTs are
inherently capable of a wider bandwidth of operation.
 For npn transistors fabricated in the modern low-voltage process, fT is
in the range of 10 GHz to 20 GHz as compared to the 400 MHz to 600
MHz obtained with the standard high-voltage process.
 In the MOS case, NMOS transistors fabricated in a modern submicron
technology, such as the 0.18-μm process, achieve f T values in the range
of 5 GHz to 15 GHz.

SYLLABUS

1.1 SINGLE STAGE MOS AMPLIFIERS:


 we consider the various configurations utilized in the design of MOS
amplifiers.
 We focus on discrete MOS amplifiers, leaving the study of integrated-
circuit (IC) MOS amplifiers later
 Beside being useful in their own right, discrete MOS amplifiers are
somewhat easier to understand than their IC counterparts for two main
reasons:
 (i) The separation between dc and signal quantities is more obvious in
discrete circuits, and (ii) discrete circuits utilize resistors as amplifier
loads. In contrast, IC MOS amplifiers employ constant-current sources
as amplifier loads, with these being implemented using additional
MOSFETs and resulting in more complicated circuits.
 Since in discrete circuits the MOSFET source is usually tied to the
substrate, the body effect will be absent. Therefore in this section we
shall not take the body effect into account.
 Also, in some circuits we will neglect r 0 in order to keep the analysis
simple.
1.1.1 Three basic Configurations
 There are three basic configurations for connecting the MOSFET as an
amplifier. Each of these configurations is obtained by connecting one of
the three MOSFET terminals to ground, thus creating a two-port
network with the grounded terminal being common to the input and
output ports.
 Figure 1.1 shows the resulting three configurations with the biasing
arrangements omitted.

 In the circuit of Fig. 1.1(a) the source terminal is connected to ground,


the input voltage signal vi is applied between the gate and ground, and
the output voltage signal vo is taken between the drain and ground,
across the resistance RD. This configuration, therefore, is called the
grounded-source or common-source (CS) amplifier. It is by far the
most popular MOS amplifier configuration and is the one we utilized in
for low frequency and high frequency analysis of MOS amplifier
operation.

Fig.1.1: Three configurations of MOSFET amplifier


 The common-gate (CG) or grounded-gate amplifier is shown in Fig.
1.1(b). It is obtained by connecting the gate to ground, applying the
input vi between the source and ground, and taking the output vo
across the resistance RD connected between the drain and ground.
 Finally, Fig. 1.1 (c) shows the common-drain (CD) or grounded-drain
amplifier. It is obtained by connecting the drain terminal to ground,
applying the input voltage signal vi between gate and ground, and
taking the output voltage signal between the source and ground, across
a load resistance RL.
 The Common Drain configuration is more commonly called the source
follower because the voltage at the source (output) is approximately the
same amplitude as the Gate (input) voltage and is in phase with it. In
other words, the Source voltage follows the Gate input voltage.
 Our study of the three basic MOS amplifier configurations will reveal
that each has distinctly different attributes and hence areas of
application.

1.1.2 The Basic Structure


 Figure 1.2 shows the basic circuit to implement the various
configurations of discrete-circuit MOS amplifiers. Among the various
schemes for biasing discrete MOS amplifiers, the constant-current
biasing is employed for its effectiveness and simplicity.
Fig.1.2: (a) Basic structure of the circuit used to realize single-stage discrete-
circuit MOS amplifier configurations (b) Implementation of constant current
source using current mirror

 Figure 1.2 indicates the dc current and the dc voltages resulting at


various nodes.

1.1.3 Characterizing Amplifiers


 To use amplifier circuits (using BJT / MOSFET), it is important to know
how to characterize the performance of amplifiers as circuit building
blocks.
 Most of the amplifiers are non-unilateral amplifiers, i.e., they have
internal feedback that may cause their input resistance to depend on
the load resistance. Similarly, internal feedback may cause the output
resistance to depend on the value of the resistance of the signal source
feeding the amplifier.

 A number of remarks are in order:


 The amplifier is shown fed with a signal source having an open-circuit
voltage vsig and an internal resistance Rsig. These can be the parameters
of an actual signal source or the Thevenin equivalent of the output
circuit of another amplifier stage preceding the one under study in a
cascade amplifier. Similarly, RL can be an actual load resistance or the
input resistance of a succeeding amplifier stage in a cascade amplifier.
 Parameters Rt, R0, Av0, Ais, and Gm pertain to the amplifier proper; that
is, they do not depend on the values of R sig and RL. By contrast, Rin, Rout,
Av, At, Gv0, and Gv may depend on one or both of Rsig and RL.
 Also, observe the relationships of related pairs of these parameters; for
instance,
Ri = Rin when RL = ꚙ; and Ro = Rout when Rsig = 0
 For non-unilateral amplifiers, Rin may depend on RL, and Rout may
depend on Rsig. No such dependencies exist for unilateral amplifiers, for
which Rin = Ri and Rout = R0.
 The loading of the amplifier on the signal source is determined by the
input resistance Rin. The value of Rin determines the current that the
amplifier draws from the signal source. It also determines the
proportion of the signal vsig that appears at the input of the amplifier
proper (i.e., vi).
 When evaluating the gain Av from the open-circuit value A v0, R0 is the
output resistance. This is because Av is based on feeding the amplifier
with an ideal voltage signal vi.
 If the overall voltage gain Gv is to be calculated from its open-circuit
value Gv0, the output resistance to use is Rout. This is because G v is
based on feeding the amplifier with v sig, which has an internal resistance
Rsig.
 This can be seen from Table 1.1

Table 1.1 : Characterizing parameters


(A)

The relation between open circuit voltage gain Avo and voltage gain Av can be
derived from Figure (A).

The relationship between transconductance Gm and voltage gain Av can be


derived using Figure (B). Similarly, the relationship between Open ciruit overall
voltage gain Gvo and open circuit voltage gain Avo can be derived using Figure
(C).
1.1.4 Low – frequency response of the Common-Source (CS) Amplifier
 The common-source (CS) or grounded-source configuration is the most
widely used of all MOSFET amplifier circuits. A common-source amplifier
realized using the circuit of Fig. 1.1 is shown in Fig. 1.2 (a).
 Observe that to establish a signal ground, or an ac ground as it is

sometimes called, at the source, we have connected a large capacitor, Cs,


between the source and ground. This capacitor, usually in the pF range, is
required to provide very small impedance (ideally, zero impedance; i.e., in
effect, a short circuit) at all signal frequencies of interest.

 In this way, the signal current passes through Cs to ground and thus
bypasses the output resistance of current source I (and any other circuit
component that might be connected to the MOSFET source); hence, Cs is
called a bypass capacitor.
Fig. 1.2: (a) Common-source amplifier based on the circuit of Fig. 1.1
 The lower the signal frequency, the less effective the bypass capacitor

becomes. Here we shall assume that Cs is acting as a perfect short circuit


and thus is establishing a zero signal voltage at the MOSFET source.
 In order not to disturb the dc bias current and voltages, the signal to be

amplified, shown as voltage source vsig with an internal resistance Rsig is


connected to the gate through a large capacitor C C1. Capacitor CC1, known
as a coupling capacitor, is required to act as a perfect short circuit at all
signal frequencies of interest while blocking dc.
 As the signal frequency is lowered, the impedance of CC1 (i.e., 1 / jωCC1) will
increase and its effectiveness as a coupling capacitor will be
correspondingly reduced.
 Here we assume CC1 is acting as a perfect short circuit as far as the signal
is concerned. Before leaving CC1, where the signal source can provide an
appropriate dc path to ground, the gate can be connected directly to the
signal source and both RG and CC1can be dispensed with.
 The voltage signal resulting at the drain is coupled to the load resistance RL
via another coupling capacitor CC2. We assume that CC2 acts as a perfect
short circuit at all signal frequencies of interest and thus that the output

voltage v0 = vd.
 Note that RL can be either an actual load resistor, to which the amplifier is
required to provide its output voltage signal, or it can be the input
resistance of another amplifier stage in cases where more than one stage of
amplification is needed.
 To determine the terminal characteristics of the CS amplifier—that is, its
input resistance, voltage gain, and output resistance - we replace the
MOSFET with its small-signal model. The resulting circuit is shown in Fig.
1.2 (b).

Fig. 1.2: (b) Equivalent circuit of the amplifier for small-signal analysis
 This amplifier is unilateral. Therefore R in does not depend on RL, and thus
Rin = Ri. Also, Rout will not depend on Rsig, and thus Rout = R0.
 Analysis of this circuit is straight forward and proceeds in a step-by-step
manner, from the signal source to the amplifier load. At the input
ig = 0
Rin = RG
Fig. 1.2: (c) Small-signal analysis performed directly on the amplifier circuit
with the MOSFET model implicitly utilized.
 Usually RG is selected very large (e.g., in the MΩ range) with the result that

in many applications RG >>Rsig and

Thus the voltage gain Av is

and the open-circuit voltage gain Avo is

The overall voltage gain from the signal-source to the load will be
Gv = Vo / Vsig

We know that,
In the above equation, we can replace, Vgs = Vsig * RG / (RG + Rsig)
=> Vo = -gm * [Vsig * RG / (RG + Rsig)] * (ro || RD || RL)
 Finally, to determine the amplifier output resistance R out we set vsig to 0;

that is, we replace the signal generator vsig with a short circuit and look
back into the output terminal, as indicated in Fig. 1.2.

 Including the output resistance v0 in the analysis of the CS amplifier is


straight forward: Since r0 appears between drain and source, it in effect
appears in parallel with RD. Since it is usually the case that r 0 >> RD, the
effect of r0 will be a slight decrease in the voltage gain and a decrease in
Rout.

 Although small-signal equivalent circuit models provide a systematic


process for the analysis of any amplifier circuit. Consider the Fig. 1.2 (c)
the small-signal analysis of the CS amplifier performed on a somewhat
simplified version of the circuit and its equivalent circuit is shown in Fig.
1.2 (b).

 The CS amplifier has a very high input resistance, a moderately high


voltage gain, and a relatively high output resistance.

 NPTEL Video Link: https://www.youtube.com/watch?


v=nWbwa7cDvPs

1.2 BJT Amplifiers:


1.2.1 The basic structure of BJT amplifier
 There are three basic configurations for single-stage BJT amplifiers:
 Common-Emitter
 Common-Base
 Common-Collector
 The basic circuit that utilize to implement the various configurations of BJT amplifiers
with constant current biasing is shown in figure 1.4. The value of R B is selected as
large value in order to keep the input resistance at the base large. However it is also
required to limit the dc voltage drop across RB

Fig. 1.4: Basic structure of the circuit used to realize single-stage, discrete-
circuit BJT amplifier configurations

1.2.2 Low – frequency response of the Common-Emitter Amplifier

 First, assume Re= 0 (this is not re, but an explicit resistor)


 The BJT is biased with a current source (with high output impedance) and
a capacitor connects the emitter to ground capacitor provides an AC short
at the emitter for small time-varying signals but is an open circuit for DC
signals Can redraw the circuit with an equivalent circuit that replaces the
BJT with its hybrid-π model
Fig. 1.5: a) CE Amplifier, b) Equivalent circuit by replacing BJT with π-
model

 The terminal characteristics of amplifier are analysed as

Where Rib is the input resistance looking into the base. Since the emitter
is grounded,

Rib = rπ

Normally we select RB>>rπ, which results Rin ≡ rπ

 The fraction of source signal will appear across the input terminals of the
amplifier and is given by,
At the output of the amplifier we have

 The voltage gain of the amplifier is

 The open circuit voltage gain is obtained by making RL=∞

from which we can say that the effect of r0 is simply to reduce the gain,
usually r0>> RC, results in

The output resistance Rout can be found from the equivalent circuit 1.5
(b) by looking back into the output terminal while short-circuiting the
source vsig. This will result in vπ = 0, and
Thus r0 reduces the output resistance of the amplifier, typically r 0>> RC

and
For this unilateral amplifier R0 = Rout, we can use Av0 and R0 to obtain the
voltage gain Av corresponding to any particular RL,

The overall voltage gain from source to load, G v can be obtained by


multiplying (vi /vsig) by Av,

For the case RB>>rπ, this expression simplifies to

In case Rsig << rπ, And voltage gain reduces to

Since rπ = β / gm => gm = β / rπ

 The short circuit current gain is calculated as


ios = - gm * vπ

Since vπ is related to i i by Vπ = vi – ii * Rin

The short-circuit current gain can be found as

Substituting Rin = RB ‖ rπ, we can see that in the case R B >> rπ │Ais│
reduces to β, which is to be expected since β is the short – circuit current gain
of the common – emitter configuration.

• Ib = v π / r π
• Ic = g m vπ

• Ais = ic / ib = β = gm * rπ

Summary: The common emitter configuration can provide large voltage gain,
large current gain, low input resistance and relatively high output resistance.

1.3 High Frequency Response : General Consideration


 We now address the question of the high-frequency performance of the CS and
CE amplifiers.
 Our objective is to identify the mechanism that limits the high-frequency
performance of these important amplifier configurations.
 As well, we need to find a simple approach to estimate the frequency f H at
which the gain falls by 3 dB below its value at midband frequencies, |AM|.
 The Frequency response of a direct-coupled (dc) amplifier is shown in Figure
1.1.
 The various stages in an integrated - circuit cascade amplifier are directly
coupled; that is they do not utilize coupling capacitors. Hence the mid band
gain remains constant down to zero frequency.

Fig. 1.1 Frequency response of a direct-coupled (dc) amplifier.

1.3.1 The High - Frequency Gain Function:

The amplifier gain, taking into account the internal transistor capacitances,
can be expressed as a function of the complex frequency variable ‘s’ in the
general form
A(s) = AM FH(S)
where, AM is the mid-band gain.
Considering the generalized transfer function
where ωp1, ωp2, …. ωpn are pole frequencies.
ωz1, ωz2, …. ωzn are zero frequencies.

1.3.2 Determining the 3-dB frequency fH :


i) Dominant pole is present:
The amplifier designer usually is particularly interested in the part of the high-
frequency band that is close to the mid-band. This is because the designer needs to
estimate-and if needed modify-the value of the upper 3-dB frequency f H. In many cases
the zeros are either at infinity or such high frequencies as to be of little significance to
the determination of fH.
If in addition one of the poles, says ω Pl, is of much lower frequency than any of
the other poles, then this pole will have the greatest effect on the value of the amplifier
ωH. In other words, this pole will dominate the high-frequency response of the
amplifier, and the amplifier is said to have a dominant-pole response. In such cases
the function FH(s) can be approximated by

If a dominant pole exists, then the determination of WH is greatly simplified

This approximation is valid only when the Dominant pole is existing.


A Dominant pole is said to be existing if the lowest frequency pole is at least two
octaves (a factor of 4) lowest from nearest pole or zero.

ii) Dominant pole not existing


If a dominant pole does not exist, the 3-dB frequency ω H can be determined
alternatively, by an approximate formula for ωH that can be derived as follows:
Consider, for simplicity, the case of a circuit having two poles and two zeros in
the high-frequency
band; that is
Since wH is usually smaller than the frequencies of all the poles and zeros, So by
neglecting the terms containing fourth order ωH terms.

1.3.3 Using Open Circuit Time Constants for the Approximate


Determination of fH
It is not a simple matter to determine the poles and zeros by quick hand
analysis. In such cases an approximate value for fH can be obtained using this
method.
Considering the generalized transfer function

where the coefficients a and b are related to the frequencies of the zeros and poles,
respectively. Specifically, the coefficient b1 is given by

……… (1)
The value of b1 can be obtained by considering the various capacitances in the high-
frequency equivalent circuit one at a time while reducing all other capacitors to zero
(or, equivalently, replacing them with open circuits). That is, to obtain the contribution
of capacitance C, we reduce all other capacitances to zero, reduce input signal source
to zero and determine the resistance Rio seen by Ci.
This process is repeated for all other capacitors in the circuit. The value of b1 is
computed by summing the individual time constants, hence called Open – Circuit
Time Constants.
Now the approximate value of fH can be obtained by considering there exist a dominant
pole ωP1 then from eq.(1)

But also upper 3dB frequency will be approximately equal to ωp1leading to the
approximation

1.3.4 MILLER’S THEOREM:


Consider the situation in Figure 5(a) as a part of a larger circuit that is
not shown, we have two isolated circuit nodes, labelled 1 and 2, between which
an impedance Z is connected.
Nodes 1 and 2 are also connected to other parts of the circuit, as signified by
the broken lines
emanating from the two nodes. Furthermore, it is assumed that somehow it
has been determined
that the node voltage at node 2 is related to the node 1 by
V2 = K V 1

The Miller equivalent circuit


In typical situations K is a gain factor that can be positive or negative and that
has a magnitude usually larger than unity. This, however, is not an
assumption for Miller's theorem.

Miller's theorem states that impedance Z can be replaced by two impedances:


Z1 connected between node 1 and ground and Z2 connected between node 2
and ground, where
Z1 = Z / (1 – K) ----- (1)
and

----- (2)
Proof:
The current entering in to node1 is given as below

---- (3)
Rearranging equation (3) we get,
1/Z1 = (1 - K) / Z
 Z1 = Z / (1 - K)
similarly current entering into node2 is given as below

---- (4)
Rearranging equation (4) we get,
- K V1 / Z2 = - KV1 [ (- 1/K) + 1 ] / Z
Cancelling – K V1 on both sides,
1 / Z2 = [ 1 – (1 / K) ] / Z
 Z2 = Z / [ 1 - (1/K) ]
Limitations of Miller’s Theorem:
Although not highlighted, the Miller equivalent circuit derived above is
valid only as
long as the rest of the circuit remains unchanged; otherwise the ratio of V 2 to
V1 might
change.
It follows that the Miller equivalent circuit cannot be used directly to
determine
the output resistance of an amplifier. This is because in determining output
resistances it is
implicitly assumed that the source signal is reduced to zero and that a test-
signal source
(voltage or current) is applied to the output terminals—obviously a major
change in the
circuit, rendering the Miller equivalent circuit no longer valid.

1.4 High-frequency response of the CS and CE amplifiers:


Figure. High frequency equivalent circuit
The above figure shows the High-frequency response equivalent circuit of
the common source amplifier. This equivalent circuit applies equally well to the
CE amplifier while a simple relabeling of components Cgs would be replaced by
C Π , Cgd by Cµ and obviously Vgs by v Π .
The input-signal source is represented by Vsig and Rsig. In some cases,
however, Vsig and Rsig would be modified values of the signal-source voltage
and internal resistance, taking into account other resistive components such
as a bias resistor RG or RB, the BJT resistances rx and rπ , etc.

The load resistance RL represents the combination of an actual load


resistance (if one is connected) and the output resistance of the current-source
load.

To avoid loss of gain, RL is usually on the same order as r0. We combine


RL with ro and denote their parallel equivalent RL'.
RL’ = (ro || RL)

The load capacitance CL represents the total capacitance between drain


(or collector) and ground; it includes the drain-to-body capacitance Cdb
(collector-to-substrate capacitance), the input capacitance of a succeeding
amplifier stage, and in some cases, as we shall see in later chapters, a
deliberately introduced capacitance. In IC MOS amplifiers, CL can be relatively
substantial.

1.4.1 Analysis Using Miller's Theorem

In situations when Rsig is relatively large and CL is relatively small, Miller's


theorem can be used to obtain a quick but approximate estimate of the 3-dB
frequency fH. Below fig shows the approximate equivalent circuit obtained for
the CS case, from which we see that the amplifier has a dominant pole formed
by Rsig and Cin.
Thus, Vo / Vsig = AM / (1 + s / ωH )

where AM = - gm RL ‘

and the 3-dB frequency fH. = ωH / 2π is given by

where

1.4.2 Analysis Using Open-Circuit Time Constants

The method of open-circuit time constants can be directly applied to the CS


equivalent circuit of from which we see that :

(i) The resistance seen by Cgs, Rgs = Rsig


(ii) The resistance seen by CL is R'L.

(iii) The resistance Rd seen by Cgd can be found by analyzing the circuit
in Fig (b) with the result that
Figure 1.21 Application of the open-circuit time-constants method to the CS
equivalent circuit

And the 3-dB frequency fH is

1.4.3 Adapting the Formulas for the Case of the CE Amplifier

Adapting the formulas presented above to the case of the CE amplifier is


straightforward. First, note from Figure how Vsig and Rsig are modified to
V’sig and R’sig to take into account the effect of rx and rΠ :
Thus the DC gain is now given by

Using Millers theorem (Miller approximation) we obtain

Correspondingly, the 3-dB frequency fH can be estimated from


Alternatively, using the method of open-circuit time constants yields

from which fH can be estimated as

The exact analysis yields the following zero frequency:

and, assuming that a dominant pole exists

Additional Topics:
1.4 Design of CS amplifier

Design a common source amplifier using N-channel enhancement MOSFET to


meet the following specifications.
Voltage gain, Av = -10 (min), Rin ≥ 400 KΩ, Rout ≤ 5 KΩ
fL< 1 kHz , VDD = 20 V, ID = 2 mA
The MOSFET parameters: kn = µnCox (W/L) = 130 mA/V2, Vt = 1.4 V, λ = 0.
Design Procedure
To find VGS:
ID = (1/2) kn (VGS – Vt )2
Apply the values of ID, Kn, and Vt we get,
VGS = 1.575 V
To operate the MOSFET in saturation region for amplification V DS > VGS - Vt
Check the condition
VDS = VDD / 2 = 20 /2 = 10 V

To find RD and RS = RS1 + RS2:


Choosing VDS = VDD/2 = 10 V and VRS = 0.1 VDD = 2 V,
Apply KVL to output loop
VRD = VDD – VDS – VRS = 20 – 10 – 2 V = 8 V
RD = VRD / ID = 8 / 2 mA = 4 K Ω
RS = VRS / ID = 2 V / 2 mA =1KΩ
To find R1 and R2 :
VG = VDD.R2 / (R1 + R2) = VGS + VRS = 3.5 V
R2/(R1 + R2) = VG/VDD = 0.17
Given, Rin ≥ 400 KΩ.
Choosing Rin = R1 || R2 = 1 MΩ,
R1 = 5.6 M Ohm
R2 = 1.2 M Ohm
To find Rs1 and Rs2:
Given, Av = -10 (min)
When CS is not present, Av = - gm RD / (1 + gm RS) ----- as ro = 1/( λ ID) = 1 / 0 = ∞
• gm = dID / dVgs = Kn (Vgs – Vt) ----- (2)
• Substitute the values of Kn, Vgs, and Vt we get gm = 22.8 mA / V
In order to improve the gain stability, RS shall be split into RS1 and RS2, with RS2
bypassed by CS, as shown in figure.
Then, Av = - gm RD / (1 + gmRS1) = - 10
=> gmRS1 = (gm * RD / 10) - 1
=> RS1 = (RD / 10 ) – 1/gm
RS1 = 4 * 102 – (1/ 22.75 * 10 -3 )
• RS1 = 400 – 43.86 = 356 ohm = 330 ohm
RS2 = RS – RS1 = 644 ohm = 680 ohm
To find R1 and R2:
• Using Voltage divider rule and KVL at the input side,
• VG = VDD.R2 / (R1 + R2) = VGS + VRS = 3.575 V
• R2 / (R1 + R2) = VG/VDD = 3.575 / 20 = 0.179
• Given, Rin ≥ 400 KΩ. (For voltage amplifier)
• Choosing Rin = R1 || R2 = 1 MΩ,
• Rin = R1 * R2 / R1 + R2 => 1 MΩ = R1 * 0.179 =>
• R1 = 5.59 MΩ => R1 = 5.6 M Ω
• Rin = 1/R1 + 1/R2 = 1 MΩ
• 1/R2 = 1 - 0.179 => R2 = 1/0.821
• R2 = 1.2 M Ω

To find C1:
fL = 1 / [2π (Rsig + R1||R2)C1], Rsig is signal source resistance (not shown in the
circuit diagram).
Neglecting Rsig , fL = 1 / [2π RB C1], Note: R1 || R2= RB
Choosing fL = 100 Hz, 100 = 1 / [2π (1MΩ) C1]
C1 = 1 / [2π (1 * 106) * 100] = 0.159 uF = 1 uF
Note: Generally, when the capacitance value calculated is less than 1 uF
choose 1 uF, if it is greater than 1 uF, choose 10 uF

To find C2:
fL = 1 / [2π (RD || RL )C2], Assuming RL = ∞ in order to calculate open
circuit voltage gain,
C2 = 1 / [2π RD * 100] = = (1 / 25.13) * 10-4 = 0.04 x10-5 F = 0.4
µF = 1 µF
To find CS:
fL = 1 / [2π{RS2 || (RS1 + 1/gm)}CS]
CS = 1 / [2π {RS2 || (RS1 + 1/gm) }* 100]
= 1 / [2π * { 680 || (330 + 1/22.8 * 10 -3 )}* 100] = 6.5 uF = 10 uF

1.8 Design of Common Emitter Amplifier

Design statement: Design CE amplifier for the following specifications:


VCC= 12V, IC= 5 mA, β= 500, stability factor S ≤ 5, f =1 KHz

Finding Q-Point:
VCEQ = VCC/2 = 12V/2 = 6V
Q – point = [VCEQ, ICQ] = [6V, 5 mA]
Finding RE and RC :
Apply KVL at output loop we get,
VCC = IC RC + VCE + IE RE
RC + RE = (VCC-VCE)/IC = (12V-6V)/5x10-3 = 1.2 KΩ

VE = VCC/10 => IE RE = VCC/10 = 1.2V


=> RE = VE/IC = 1.2V/5x10-3 = 240 Ω ≈ 220Ω

RC + RE= 1200 Ω =>RC = 980 Ω ≈1 KΩ


VR2 = VCC R2 / (R1+R2)
 Apply KVL in the base loop we get,
VR2 = VBE +IE RE = 0.7V+1.2V = 1.9V
• Using the value of VR2 in equation (1) and apply Vcc= 12 V
R2 / (R1+R2) = VR2/VCC = 1.9V/12V = 0.158
• From the stability factor equation,
βRE
• S = (1+β)/1+[ ℜ+ RB ] = 5 = 1 + 500 / [1 + (500 (220) /RB + 220 )]

=> RB = 888.87 Ω
RB =R1 R2/(R1+R2) ==> 888.87 Ω
R1 = 5.6 KΩ, R2 = 1 KΩ
Finding Capacitances:
XCi = RB / 10 ==> Ci = 1/ 2πf XCi = 1.79 μF ≈1μF
XCO = RC / 10 ==> Co = 1/ 2πf XCO = 1.59 μF ≈1μF
XCE = RE / 10 ==> CE = 1/ 2πf XCE = 7.23 μF ≈10μF

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