Sequential Circuits

Homework 1 from Previous Lecture

Simplify the following Boolean functions:

1. F(A,B,C,D)=Σ(1, 3, 7, 8, 9, 12, 13, 14, 15)

2. F(A,B,C,D)=Π(0, 2, 4, 5, 8, 10, 12, 13)

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1. F(A, B, C, D) = Σ (1, 3, 7, 8, 9, 12, 13, 14, 15)

C, D
A, B 00 01 11 10
00 0 1 1 0

01 0 0 1 0

11 1 1 1 1

10
1 1 0 0

F = AB+A’B’D+BCD+AC’

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2. F(A, B, C, D) = Π(0, 2, 4, 5, 8, 10, 12, 13)

C, D
A, B 00 01 11 10
00 0 1 1 0

01 0 0 1 1

11 0 0 1 1

10
0 1 1 0

F = (B’+C)(B+D)

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 Homework 2 from Previous Lecture

Given the following Boolean function:

F=x+x’y’

1. List the truth table

2. Draw the logic diagram

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Boolean Function Truth Table

x y x’ y’ x’y’ x+x’y’
(=F)

0 0 1 1 1 1
0 1 1 0 0 0
F = x + x’ y’
1 0 0 1 0 1
1 1 0 0 0 1

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 x’ x+x’y’
x
x’y’

y’
y

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In this lecture, we will study

i. Flip-flops

ii. Sequential circuits (decoders and encoders, multiplexers, registers, counters,

and memory - RAM, ROM)
Sequential Circuits

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 Circuits

Combinational Sequential

Output depends on Output depends not only

the current input on the current inputs
but also on the past states

Needs some sort of memory

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Sequential Circuit

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 Synchronous
Circuit output changes only at some
discrete instants of time.
A clock is needed.

Sequential Circuits

Asynchronous
Circuit output can change at any time.
No clock is needed.

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 Circuits

Sequential circuits
Combinational circuits
are made up of
are made up of GATES
GATES and FLIP-FLOPS

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Synchronous Sequential Circuits with Flip-Flop as State Memory

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Flip-Flops

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 SR (Set-Reset) Flip-Flop aka SR Latch

(a) Logic Diagram

An SR flip-flop has three inputs:

S (set)
R (reset)
C (clock)

It has an output Q, and sometimes (b) Graphical Symbol

has another, complemented output,
denoted by a little circle at the
other output terminal.

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 Operation of SR Flip-Flop

If there is no signal at the clock input, the output of the circuit cannot change
irrespective of the input.

When clock signal changes from 0 to 1, the following states are possible:

Characteristic Table
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Function Table for SR Flip-Flop

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 D (Data) Flip-Flop: A slight modification of the SR flip-flop

An SR flip-flop can be converted to a D flip-flop by inserting an inverter between

S and R, and assigning the symbol D to the single input.

The inverter makes sure that the inputs are never 1 simultaneously, thereby
eliminating the ‘indeterminate state’ that could occur in case of an SR flip-flop.

(a) Logic Diagram (b) Graphical Symbol

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 Operation of D Flip-Flop

If there is no signal at the clock input, the output of the circuit cannot change
irrespective of the input.

When clock signal changes from 0 to 1, the following states are possible:

Characteristic Table

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Function Table for D Flip-Flop

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 JK Flip-Flop: A refinement of the SR flip-flop

Named after its inventor, Jack Kilby.

The inputs J and K behave like the inputs S and R, except when both J and K are
simultaneously 1, in which case, a clock transition switches the output of the flip-
flop to its complement state.

(a) Logic Diagram (b) Graphical Symbol

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 Operation of JK Flip-Flop

If there is no signal at the clock input, the output of the circuit cannot change
irrespective of the input.

When clock signal changes from 0 to 1, the following states are possible:

Characteristic Table
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 T (Toggle) Flip-Flop: A modification of the JK flip-flop

A T flip-flop is obtained from a JK flip-flop when inputs J and K are connected to

provide a single input (T).

(a) Logic Diagram (b) Graphical Symbol

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 Operation of T Flip-Flop

When T=0, a clock transition does not change the state of the flip-flop.

When T=1, a clock transition complements the state of the flip-flop.

Characteristic Table

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 Edge-Triggered Flip-Flops

An edge-triggered flip-flop changes states either at the positive/rising edge

or at the negative/falling edge of the clock pulse.

Positive Edge-Triggered Flip-Flop Negative Edge-Triggered Flip-Flop

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 Master-Slave Flip-Flops

Some circuits use two flip-flops; one is the MASTER and the other is the SLAVE.

The ‘master’ flip-flop responds to the POSITIVE level of the clock, while the
‘slave’ flip-flop responds to the NEGATIVE level of the clock.

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Master-Slave JK Flip-Flop

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Master-Slave SR Flip-Flop

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 Excitation Tables

Characteristic tables specify the next state of the flip-flop WHEN THE INPUTS
AND THE PRESENT STATE ARE KNOWN.

But what about when we need to find out WHICH INPUT CONDITIONS WILL
GENERATE THE DESIRED TRANSITION?

For that, we need Excitation Tables.

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Excitation Tables

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Returning to Sequential Circuits…

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State Tables

State Table

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 State Diagrams

The information available in a state table can be represented

graphically using a ‘State Diagram’.

In a state diagram:

• each STATE is represented by a CIRCLE

• each TRANSITION between states is represented by
DIRECTED LINES connecting the states

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State Diagrams

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Integrated Circuits

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 Integrated Circuits

An Integrated Circuit (IC) is a small silicon semiconductor chip that contains

electrical components for the digital gates.

Various gates are interconnected inside the chip to form the required circuit.
The chip is then mounter in a plastic or ceramic conatiner, and the
connections are welded by thin gold wires to external pins to form the
integrated circuits.

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Integrated Circuits

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ICs

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 Small Scale Integration (SSI)
less than 10 gates in a single package

Types of Integration Devices

Medium Scale Integration (MSI)
10-200 gates in a single package

Large Scale Integration (LSI)

between 200 to a few thousand gates
in a single package (processors, microchips)

Very Large Scale Integration (VLSI)

thousands of gates in a single package
(large memory arrays, complex microcomputer chips)
Skip to Next Component
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 TTL?

Integrated Circuits
Logic Families of

ECL?

MOS?

CMOS?
Skip to Next Component
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Decoders

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 (Binary) Decoders

Information is represented in digital computers using binary codes;

a code of n bits can represent 2n distinct elements of information.

A binary decoder is a combinational circuit that converts binary information

from n coded inputs to a maximum of 2n unique outputs.

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 n-to-m Decoder

n-to-m line decoders (where m<=2n) have n inputs and they generate 2n (or
fewer) outputs.

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 n-to-m Decoder

(b) Truth Table

(a) Logic Diagram

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 n-to-m Decoder
with ‘enable’

(b) Truth Table

(a) Logic Diagram

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2-to-4 Line Decoder with NAND Gates

(b) Truth Table

(a) Logic Diagram

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 Decoder Expansion

What do we do when we
need a certain-sized decoder
but only smaller decoders are
available?

We combine several
encoders with enable input
to from a larger decoder.

A 3 x 8 decoder constructed using two 2 x 4 decoders.

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Encoders

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 (Binary) Encoders

An encoder performs the inverse operation of a decoder.

An encoder has 2n (or less) inputs and n output lines.

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 Octal to Binary Encoder

This encoder has eight inputs,

one for each of the octal digits,
and three outputs that
generate the corresponding
binary number.

Only one of the inputs has the

value of 1 at a time; otherwise,
the circuit has no meaning.

(a) Logic circuit

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 Octal to Binary Encoder

A=D1+D3+D5+D7
B=D2+D3+D6+D7
C=D4+D5+D6+D7
(a) Boolean functions (b) Truth table

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Multiplexers

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 Multiplexers

A multiplexer is a combinational circuit that receives binary

information from one of 2n input data lines and directs it to a single
output line.

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 4-to-1 Line Multiplexer

(a) Logic circuit (b) Function table

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 Quadruple 2-to-1 Line Mux

(a) Block Diagram (b) Function Table

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Registers

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 Registers

A register is a group of flip-flops, where each flip-flop holds one bit of

binary information.

A register may also contain additional combinational gates.

The flip-flops hold the binary information, while the gates control
when and how the new information is transferred into the register.

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A Simple 4-Bit Register

This register is constructed

with four D flip-flops.
It has no gates.

A common clock triggers all

the flip-flops, and the binary
information available at the
four inputs is transferred
into the 4-bit register.

The clear input is used to

clear the register. 59
 Register Load

The transfer of new information into the register is referred to as the

‘loading of register’.

If all the bits of the register are loaded simultaneously with a common
clock pulse, we say that the loading is ‘done in parallel’.

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4-Bit Register
with Parallel Load

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Shift Registers

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 Shift Register

A register capable of shifting its binary information in one or more

directions is known as a ahift register.

Shift registers consist of a chain of flip-flops in cascade, with the output

of one flip-flop connected to the input of the next.

All flip-flops receive a common clock pulse that initiates the shift from
one stage to the next.

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 A 4-Bit Shift Register

A simple 4-bit shift register with four cascading D flip-flops and a single clock.

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Bidirectional Shift Register
With Parallel Load

Function Table

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Binary Counters

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 Counter

A registers that goes through a predetermined sequence of states upon

the application of input pulses is called a counter.

The input pulse may be a clock or may come from an external source,
and may occur at uniform intervals of time or at random.

Counters are useful for counting the number of occurences of an

event or for generating timing signals to control the sequence of
operations in a computer.
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 Designing a 2-Bit Binary Counter: Step 1

We need to design a clocked

sequential circuit that goes
through a sequence of
repeated binary states
00, 01, 10, and 11
when an external input
x is equal to 1.

When x=0, the counter’s state

remains unchanged.
State diagram for binary counter

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 Designing a 2-Bit Binary Counter: Step 2

We need two flip-flops to design this counter.

x will be the input to these flip-flops and let’s say, A and B are the outputs.

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 Designing a 2-Bit Binary Counter: Step 3

Now we know the present and next states for this counter. In other words,
we know the exact state transitions we need from this counter.

So, by using JK flip-flop’s excitation table, we can determine which specific

inputs will help us achieve those particular state transitions.

Excitation table for JK flip-flop

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 Designing a 2-Bit Binary Counter: Step 3

Excitation Table for Binary Counter

Excitation Table

Present Next
State State

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 Designing a 2-Bit Binary Counter: Step 3

Excitation Table for Binary Counter

Excitation Table

Present Next
State State

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 Designing a 2-Bit Binary Counter: Step 3

Excitation Table for Binary Counter

Excitation Table

Present Next
State State

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 Designing a 2-Bit Binary Counter: Step 3

Excitation Table for Binary Counter

Excitation Table

Present Next
State State

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 Designing a 2-Bit Binary Counter: Step 3

Excitation Table for Binary Counter

Excitation Table

Present Next
State State

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Designing a 2-Bit Binary Counter: Step 3

Excitation Table for Binary Counter

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 Designing a 2-Bit Binary Counter: Step 4

We know that a sequential circuit takes two kinds of inputs:

an external input and the present state of the flip-flop.

In a binary counter, ‘x’ is the external input, and the

present state of the flip-flop (denoted by ‘A’ and ‘B’)
is represented by the first two columns of the excitation table.

A typical sequential circuit

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 Designing a 2-Bit Binary Counter: Step 4

Now, since the inputs to the counter are represented in terms of x, A, and B,
and the inputs to the two flip-flops are represented as JA, KA, JB, and KB,
we need to find a way to represent JA, KA, JB, and KB in terms of A, B, and x.

For that, we use (simplified) Boolean Functions.

Using the excitation table for the binary counter that we generated in Step 3,
we construct four K-maps, one each for JA, KA, JB, and KB.

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Designing a 2-Bit Binary Counter: Step 4

B, x
A 00 01 11 10
0 0 0 1 0
1 x x x x
K-Map for JA

JA=Bx
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 Designing a 2-Bit Binary Counter: Step 4

B, x B, x
A 00 01 11 10 A 00 01 11 10
0 0 0 1 0 0 x x x x
1 x x x x 1 0 0 1 0

JA=Bx KA=Bx
B, x B, x
A 00 01 11 10 A 00 01 11 10
0 0 1 x x 0 x x 1 0
1 0 1 x x 1 x x 1 0

JB=x KB=x
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 Designing a 2-Bit Binary Counter: Step 5

Using the four Boolean

Functions we have generated
so far, we create a logic circuit
for the binary counter.

JA=Bx JB=x

KA=Bx KB=x
Boolean Expressions
Logic diagram for two-bit counter
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 Create state diagram

Determine the number of flip-flops

needed

Circuit Design Procedure:

Outline Create the state and excitation tables

Obtain simplified Boolean functions -

generate K-maps

Construct the logic circuit

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 Types of Counters

Asynchronous Counters
(aka Ripple Counters)
Clock pulses are applied
Synchronous Counters
to the first flip-flop only;
All flip-flops receive
all subsequent flip-flops
a common clock pulse.
are clocked by the output
produced by the
preceding flip-flop.
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4-Bit Asynchronous Counter (Ripple Counter)

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4-Bit Synchronous
Binary Counter

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Memory Unit

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 Memory

A memory unit is a collection of storage cells,

together with the associated circuits that are needed
to transfer information in and out of the storage cells.

Memory stores information in groups of bits called WORDS.

(1 word = ? Bytes)

A word is the smallest entity that can be moved in/out of the memory.
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 Major Types of Memory
used in Computers

RAM ROM
Random Access Memory Read Only Memory

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 RAM

In RAM, any random memory cell can be accessed directly.

That is, the process of locating a word in the memory is the same
and takes the same amount of time, regardless of the physical
location of the memory cell that holds the desired word.

RAM is volatile.

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 RAM

The two operations RAM can perform are READ and WRITE.

The ‘write’ signal specifies a transfer-in operation.

A ‘read’ operation specifies a transfer-out operation.

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Block Diagram of RAM

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 Block Diagram of RAM

8 data input lines

In an m x n RAM
chip, ‘n’ is the
7 address lines
number of data
Read
128 x 8
lines and ‘k’ is Write RAM
the number of
address lines,
where 2 k = m
8 data output lines

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 Steps for transferring a word in or out of the memory

The ‘Transfer-In’ Process: The ‘Transfer-Out’ Process:

i. Apply the binary address of the

desired word into the address lines.
i. Apply the binary address of the
ii. Apply the data bits that must be
desired word into the address
stored in memory into the data
lines.
input lines.

ii. Activate the ‘read’ input.

iii. Activate the ‘write’ input.
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 ROM

ROM is a memory unit that only performs the read operation; it does
not have a write capability.

The binary information stored in a ROM is made permanent when

the hardware is produced, and this information cannot* be altered
afterwards.

Unlike RAM, ROM is non-volatile.

* Atleast not without special equipment.

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Block Diagram of ROM

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 Types of ROM

Mask Programming Programmable ROM Erasable PROM

(irreversible) (PROM) (irreversible) (EPROM) (reversible)

• This is done by the • When ordered, PROM • When EPROM is placed

manufacture during the units contain intact fuses; under a special UV light
last phase of memory i.e., all its bits are 1. for a certain period of
fabrication. The customer PROM fuses are then time, shortwave radiations
fills out the truth table that blown by application of discharge the internal
they wish the ROM to current passing through gates that serve as fuses.
satisfy, and the desired the output terminal of After erasure, the EPROM
circuit for satisfying that each address. A blown can be used again.
truth table is constructed fuse defines a binary 0 A variation: Electrically
by the manufacturer. state. Erasable PROM (EEPROM)

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 ROM

Utility of ROM?

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98
 Homework

1. How many address lines would a 64x8 RAM have?

2. How many 128x8 memory chips are needed to provide a memory capacity of

4096x16?

3. Which of the following multiplexers would have 4 input selection lines?

a. 4:1 mux b. 2:1 mux

c. 16:1 mux d. 8:1 mux

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