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EEE Lab Manual VR23-1

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130 views62 pages

EEE Lab Manual VR23-1

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Electrical and Electronics Engineering Lab Manual VR 23 Regulations

23ES1153 – Electrical and Electronics Engineering Lab

LAB MANUAL
(VR 23 Regulations)
For I /IV B.Tech, I Semester

Department of Electronics & Instrumentation Engineering


Velagapudi Ramakrishna Siddhartha Engineering College

Vijayawada-520 007
(Autonomous)
Department of Electronics & Instrumentation Engineering

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Department of Electronics & Instrumentation Engineering

Vision
To impart excellent education to provide globally competent Electronics and Instrumentation Engineers.
To establish Centre of Excellence and Research in Electronics and Instrumentation Engineering and allied
fields.

Mission
To prepare competent Electronics and Instrumentation Engineers who can pursue professional career and/or
higher studies.
To promote excellence in teaching with academically good ambiance that allows the learners to be socially
responsible with professional ethics.

Program Educational Objectives(PEO’s)


PEO1 Graduates excel in academic and professional career in Electronics and Instrumentation enabled
industries or software industries or be an entrepreneur in the domain area.

PEO2 Graduates pursue higher education in the core or allied areas of electronics and instrumentation
engineering and actively contribute to academic/R&D activities.

PEO3 Graduates exhibit professional and ethical attitudes having all-round personality to work in multi-
disciplinary allied areas to be of use to the society.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

PROGRAM OUTCOMES (POs)


PO1 An ability to apply knowledge of mathematics, science and engineering fundamentals
appropriate to the discipline.

PO2 An ability to identify, formulate and solve problems by applying the principles of electronic
instrumentation and control systems.

PO3 An ability to design and implement instrumentation and control systems to meet desired needs
with appropriate consideration for public health and safety, environment, society, economics and
sustainability.

PO4 An ability to design and conduct experiments as well as to analyse and interpret data

PO5 An ability to use the techniques, skills and modern engineering tools necessary for his
engineering practice.

PO6 The broad education necessary to understand the impact of engineering solutions in a global,
economic, environmental and societal context.

PO7 A knowledge of contemporary issues.

PO8 An understanding of professional, ethical, legal and social issues and consequent responsibility
relevant to professional engineering practice.

PO9 An ability to function on multidisciplinary teams.

PO10 An ability to communicate effectively with a range of audience in his professional engineering
practice.

PO11 A recognition of the need for and an ability to engage in lifelong learning.

PO12 An ability to use engineering and management principles to one’s own work, as a member and
leader in a team to manage projects.

PROGRAM SPECIFIC OUTCOMES (PSOs)


PSO1 Use basic engineering principles, concepts of measurement and sensor selection to design an
industrial process.

PSO2 Apply basic knowledge related to circuits and devices for designing electronic systems to
solve engineering problems.

PSO3 Demonstrate proficiency in the use of software and hardware required in industrial automation
systems.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
INSTRUCTIONS TO BE FOLLOWED IN MAINTAINING
THE RECORD BOOK
The Record should be written nearly with ink on the right hand page only. The left hand side page
being reserved for diagrams.

The Record should contain:

1. The date
2. The number and name of the experiment
3. The aim of the experiment
4. Characteristic tables of the circuit
5. On the left hand side, circuit should be designed
6. Index must be filled in regularly
7. You must get your record certified by the concerned staff on the every next class after completing
the experiment
8. You must get your record certified by the concerned staff at the end of every semester

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

INSTRUCTIONS TO BE FOLLOWED IN THE LABORATORY


1. You must bring record observations notebook, while coming to the practical class without you may
not be allowed to the practical.
2. Don’t touch the equipment which is not connected with our experiment.
3. When the apparatus is issued, you are advised to check their condition.
4. You should not leave the laboratory without obtaining the signature of the concerned lecturer after
completing the practical.
Note:

1. Damaged caused to the property of the laboratory will be recovered.


2. If 75% of the experiments prescribed are not completed the candidate will not be allowed for
attending examinations.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
23ES1153-ELECTRICAL and ELECTRONIC ENGINEERING LAB
Practical: 3 periods/ Week Internal Assessment: 30

Credits : 1.5 External Assessment: 70

Course Outcomes for Electronics Engineering Lab:

Upon successful completion of the course, the student will be able to:

CO1. Identify and testing of various electronic components.


CO2. Understand the usage of electronic measuring instruments.
CO3. Plot and discuss the characteristics of various electronic devices.
CO4. Explain the operation of a digital circuit.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
LIST OF EXPERIMENTS

A. Electrical Engineering Lab:

1.Verification of KCL and KVL.


2.Verification of Superposition theorem.
3.Measurement of Resistance using Wheat stone bridge.
4.Magnetization characteristics of DC shunt Generator.
5.Measurement of power and power factor using single phase wattmeter.
6.Measurement of energy using energy meter.
7. Calculation of electrical energy for domestic premises.

Note:
Minimum Six experiments to be performed.

B. Electronics Engineering Lab:

1. Plot V-I characteristics of PN junction diode forward and reverse bias.


2. Plot V-I characteristics of PN Zener diode and its application as voltage regulator.
3. Implementation of half wave and full wave rectifiers.
4. Plot input and output characteristics of BJT in CE and CB configurations.
5. Realization of NAND and NOR gates using AND or OR gates.
6. Verification of truth tables of AND, OR, NOT, NAND, NOR, Ex-OR, Ex-NOR gates
using ICs.
7. Verification of truth tables of S-R, J-K and D flip flops using respective ICs

Note:
Minimum Six experiments to be performed. All the experiments shall be implement in both
hardware and software.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Annexure

1. Resistance Color Code Chart


2. Electronic Component Symbols
3. Different Electronic Components
4. Bread board
5. h-parameter calculations
6. Pin configuration of logic gates

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
Characteristics of PN Junction Diode

Date:
Experiment No: 1

AIM:
To Study and plot VI Characteristics of a PN Junction Diode (IN 4001) using MULTISIM and
Discrete Components.

APPARATUS:

S.No APPARATUS RANGE QUANTITY


1 PN Junction diode IN 4001 1
2 Resistor 220Ω 1
3 Ammeter (0-200) mA, (0-200)µA Each 1
4 Voltmeter (0-20)V Each 1
5 Regulated Power Supply (0-30)V 1
6 Bread board - 1
7 Connecting wires - Few

SOFTWARE USED:
Multisim V12.

THEORY:
Junction Diode is formed by joining two different types of semiconductor materials,
which are typically made of silicon or germanium. These two materials are known as P-type and N-
type semiconductors, and they have different electrical properties due to the presence of different
types of impurities or dopants.
Here's a breakdown of the key characteristics and behaviors of a PN junction diode:
1. P-type Semiconductor (Anode):
 The P-side of the diode is doped with a trivalent element (e.g., boron), creating
"holes" in the crystal lattice. These holes represent places where electrons are missing.
 P-type materials have a surplus of positively charged "holes" (electron deficiencies)
called "majority carriers."
2. N-type Semiconductor (Cathode):
 The N-side of the diode is doped with a pentavalent element (e.g., phosphorus),
introducing extra electrons into the crystal lattice.
 N-type materials have a surplus of negatively charged electrons, which are
considered "majority carriers."
3. PN Junction Formation:
 When the P-type and N-type materials are brought into contact, electrons from the N-
side diffuse into the P-side, and holes from the P-side diffuse into the N-side.
 This diffusion process creates a region near the junction with a depleted charge,
called the "depletion region" or "barrier region."
4. Depletion Region:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
In the depletion region, electrons and holes combine to form immobile ions, resulting
in a zone devoid of free charge carriers.
 This depletion region acts as a barrier to the flow of current when a voltage is applied
in the "wrong" direction (reverse bias).
5. Forward Bias:
 When a positive voltage (anode at a higher potential than the cathode) is applied to
the diode, it reduces the barrier, allowing electron flow from the N-side to the P-side.
 This forward bias configuration results in low resistance and allows current to flow
through the diode.
6. Reverse Bias:
 When a negative voltage (anode at a lower potential than the cathode) is applied, it
increases the barrier, making it even harder for charge carriers to cross the junction.
 In this reverse bias state, the diode exhibits very high resistance and essentially
blocks the flow of current.
7. Diode Characteristics:
 Forward Voltage Drop (Vf): The voltage required to turn on the diode and allow
current to flow in the forward direction.
 Reverse Breakdown Voltage (Vr): The voltage at which the diode will conduct in the
reverse direction due to a breakdown mechanism. It should generally be avoided.

CIRCUIT DIAGRAM:
FORWARD BIAS:

Fig. (a) Forward Bias

Silicon diode NO: IN4007

VAK(V) 0.1 0.2 0.3 0.4 0.5 0.6 0.62 0.64 0.66 0.68 0.7 0.71

ID(mA)

Where VAK is Anode to Cathode Voltage at output voltmeter.


Where ID is Diode current at Ammeter.

Germanium diode NO: DR25

VAK(V) 0.1 0.2 0.22 0.24 0.26 0.28 0.3

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
ID(mA)

REVERSE BIAS:

Fig. (b) Reverse Bias


Silicon diode:

VAK(V) 5 10 15 20 25 30

ID(µA)

Germanium diode:

VAK(V) 5 10 15 20 25 30

ID(µA)

PROCEDURE:(with Discrete Components)

1. Connect the circuit as shown in fig. (a) to obtain forward characteristics and connect the circuit as shown
in fig. (b) to obtain reverse characteristics.
Forward Bias:

2. Vary the DC power supply, varying the voltage (VAK) in 0.1V steps in output voltmeter and note the
corresponding diode current (ID). Do not exceed maximum permissible forward current.
Reverse Bias:

3. Vary the DC power supply, varying the voltage (VAK) in 5V steps in output voltmeter and note the
corresponding diode current (ID). Do not exceed the specified break down voltage.
4. Tabulate your results in the following format and plot them on one graph paper for both the diodes.
5. From the above tables determine the material of P-N junction.
6. Draw the equivalent circuit of each diode by observing its characteristics and compute the average
resistance of diode under forward bias.
7. Use a curve tracer and observe the V-I characteristics of given diodes.
8. Calculate forward resistance and reverse resistance from the graph.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
PROCEDURE:(with Multisim)
1. Open Multisim software to design the circuit.

2. Select on new editor window and place the required component on the circuit window.

3. Make the connections using wire and check the connections of power supply and output meter.

4. Go for simulation using run key and observe the output.

MODEL GRAPH:

Viva Questions:

1. Define depletion region of a diode?

2. Define cut-in voltage of a diode and specify the values for Si and Ge diodes?

3. What are the applications of a p-n diode?

4. Draw the ideal characteristics of P-N junction diode?

5. What is the diode equation?

Result:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

ZENER DIODE CHARACTERISTICS AND ZENER DIODE AS A VOLTAGE REGULATOR

Date:
Experiment No: 2

AIM:
To Study and plot VI Characteristics of a Zener Diode using MULTISIM and Discrete
Components. Also verify Zener diode as a voltage regulator.

APPARATUS:

S.No APPARATUS RANGE QUANTITY


1. Zener diode 6.1V Zener Diode 1
2. Resistor and 1 KΩ Each1
Potentiometer
3. Ammeter (0-200) mA 1
4. Voltmeter (0-20)V Each1

5 Regulated Power Supply (0-30)V 1

6 Bread board - 1
7 Connecting wires - Few

SOFTWARE USED:
Multisim V12.

Theory:

Zener diode that is also known as a breakdown diode is a heavily doped semiconductor device that has been
specially designed to operate in the reverse direction. When the potential reaches the Zener voltage which is
also known as Knee voltage and the voltage across the terminal of the Zener diode is reversed, at that point
time, the junction breaks down and the current starts flowing in the reverse direction. This effect is known
as the Zener effect.

CIRCUIT DIAGRAM:
Forward bias:

Fig. (a) Forward Bias

Table: 1
EIE Department V.R.Siddhartha Engg. College
Electrical and Electronics Engineering Lab Manual VR 23 Regulations

VAK (V) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.75 0.76 0.77

ID (mA)

RF (Ω)

RF = Forward resistance
RF = VAK / ID, where VAK in volts, ID converted to mA to Ampere.

Reverse bias

Fig. (b) Reverse Bias


Table: 2

VAK (V) 0 2 4 6 7 7.5 7.6 7.7 7.8


ID (mA)
RZ (Ω)

RZ = Reverse resistance
RZ = VAK / ID, where VAK in volts, ID converted to mA to Ampere.

Forward bias:

1. Construct the circuit as in fig. (a) varying the DC power supply, increasing the voltage (VAK) in steps of
0.1V in output voltmeter and note down corresponding diode current (ID) in table (1).
Reverse bias:

2. Construct the circuit as in fig. (b) Varying the DC power supply, increasing the voltage (VAK) in steps
of 2V in output voltmeter and note down corresponding diode current (ID) in table (2).
3. Plot the V-I characteristic curve from the readings.

PROCEDURE:(with Multisim)

1. Open multisim software to design the circuit.

2. Select on new editor window and place the required component on the circuit window.

3. Make the connections using wire and check the connections of power supply and output meter.

4. Go for simulation using run key and observe the output.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

MODEL GRAPH:

Viva Questions:

1. Explain briefly about avalanche and zener breakdowns?

2. Draw the zener equivalent circuit?

3. Differentiate between line regulation & load regulation?

4. In which region zener diode can be used as a regulator?

Result:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
VOLTAGE REGULATOR USING ZENER DIODE
Date:

AIM:

To design Zener diode as a voltage regulator using multisim software.

APPARATUS:

1. Multisim software

2. Personal computer

CIRCUIT DIAGRAM:

Fig 1: Circuit Diagram of Voltage Regulator Using Zener Diode

THEORY

A Voltage regulator is an electronic circuit that provides a stable DC voltage independent of the load
current, temperature and AC line voltage variations. A Zener diode of break down voltage VZ is reverse
connected to an input voltage source VI across a load resistance RL and a series resistor RS. The voltage
across the Zener will remain steady at its break down voltage VZ for all the values of Zener current IZ as
long as the current remains in the break down region. Hence a regulated DC output voltage V0=VZ is
obtained across RL, whenever the input voltage remains within a minimum and maximum voltage.
Basically there are two of regulations such as Line regulation -in this type of regulation, series resistance
and load resistance are fixed, only input voltage is changing. Output voltage remains the same as long as
input voltage is maintained above a minimum value. Load regulation- in this type of regulation, input
voltage is fixed and the load resistance is varying. voltage remains same, as long as the load resistance is
maintained above a minimum value.

PROCEDURE:

1. Open multisim software to design the circuit.

2. Select on new editor window and place the required component on the circuit window.
EIE Department V.R.Siddhartha Engg. College
Electrical and Electronics Engineering Lab Manual VR 23 Regulations
3. Make the connections using wire and check the connections of power supply and output meter.

4. Go for simulation using run key and observe the output.

OUTPUT VALUE:

RESULT:

VIVA QUESTIONS:

1. What is meant by zener effect?


2. In which bias zener diode acts as a voltage regulator.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
Analysis of Half Wave & Full Wave Rectifiers with and without filter

Date:
Experiment No: 3

AIM: 1) To implement a Half Wave and full wave Rectifiers using discrete Components and MULTISIM.
2) To find out Ripple factor, voltage regulation, efficiency of rectification
APPARATUS:

S.No APPARATUS RANGE QUANTITY


1 Transformer 230/(12-0-12)V 1 No

(0–200)mA
2 Ammeter 1
3 Voltmeter (0–20)V 1
4 Diode IN4001 1
5 Resistor 220Ω 1
6 Capacitor 1000μf 1
7 Bread Board - 1

8 Connecting wires - Few

SOFTWARE USED:
Multisim V12.

THEORY:
A half-wave rectifier allows only one half of an AC input waveform to pass through while blocking the
other half. The key component in a half-wave rectifier is typically a single diode.
 During the positive half-cycle of the AC input voltage, the diode conducts and allows the current to
flow through, resulting in a positive voltage across the load (output).
 During the negative half-cycle of the AC input, the diode becomes reverse-biased and does not
conduct. This effectively blocks the negative voltage, resulting in zero output voltage during this
time.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Half wave rectifier

CIRCUIT DIAGRAM:

Figure 1: From the above circuit we can measure IDC, VDC, VAC, and voltage regulation.

IDC (mA) VDC (V) VAC(V) Ripple Factor (r) = VAC / VDC
Without filter
With filter

Figure 2: From the above circuit We can measure IAC (IRMS), VRMS (VS)

VRMS (V) VM = √2 x VRMS IAC  = PDC x 100


(V) (mA) PAC
Without filter
With filter

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

FULL WAVE RECTIFIER

Theory:

Full-Wave Rectifier:

A full-wave rectifier, as the name suggests, rectifies the entire AC input waveform, resulting in a smoother
DC output. There are two common types of full-wave rectifiers: the center-tapped transformer rectifier and
the bridge rectifier.

Center-Tapped Transformer Rectifier:

 In this type of full-wave rectifier, a center-tapped transformer is used to create two equal but
opposite AC voltages across its secondary winding.
 Two diodes are connected in a way that they conduct alternately during each half-cycle of the AC
input, allowing current to flow in one direction at a time.
 The two diode outputs are then combined to produce a full-wave rectified output.

CIRCUIT DIAGRAM:

Figure 1: From the above circuit we can measure IDC, VDC, VAC, and voltage regulation.

IDC (mA) VDC (V) VAC(V) Ripple Factor (r) = VAC / VDC
Without filter
With filter

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Figure 2: From the above fig. (2) We can measure IAC (IRMS), VRMS (VS)

VRMS (V) VM = √2 x VRMS IAC  = PDC x 100


(V) (mA) PAC
Without filter
With filter

PROCEDURE:

1) Connect the circuit as per circuit diagram, with filter.


2) With CRO observe and sketch the waveforms across secondary and load and also across the diode.
3) With multimeter measure IDC, VDC, VAC, IAC (IRMS), VRMS (VS) and record readings in above tables.
IDC = DC current

VDC = DC voltage

VAC = ripple voltage (AC Voltage)

IAC = AC current

VRMS = AC voltage (secondary voltage of the transformer)

VM = Peak value of the secondary voltage (VM = √2 x VRMS)


4) Calculate efficiency of rectification () = output power / input power
 = PDC x 100
PAC
 = IDC x VDC x 100
IAC x VRMS
5) Calculate ripple factor (r) = VAC / VDC
6) Connect a filter capacitor across the load resistor and observe the waveform across the load and repeat
the above procedure, note down the readings in above tables.

MODEL GRAPH:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Viva Questions:

1. What is the PIV of Half wave rectifier?

2. What is the efficiency of half wave rectifier?

3. What is the rectifier?

4. What is the difference between the half wave rectifier and full wave Rectifier?

5. What are the ripples?

7. What is the function of the filters?


8. What is the peak factor?
9. What is ripple factor of the Full-wave rectifier?

10. What is the necessity of the transformer in the rectifier circuit?

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
11. What are the applications of a rectifier?

Result:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
Realization of NAND, NOR gates using AND gate
Date:

Experiment No:4

AIM:
To construct and verify the logic gates of NAND, NOR using AND gate and
verify their truth tables.

APPARATUS:

1. 7407IC -1, 7402IC-2


2. Digital trainer kit
3. Power supply unit
4. Connecting wires

THEORY:

NAND Gate (NOT-AND):

 A NAND gate is a digital logic gate that performs the logical AND operation followed by the
logical NOT (inversion) operation on its inputs.
 It has two or more inputs and a single output.
 The output of a NAND gate is high (1) only when all of its inputs are low (0). In all other cases, the
output is low (0).
NOR Gate (NOT-OR):

 A NOR gate is a digital logic gate that performs the logical OR operation followed by the logical
NOT (inversion) operation on its inputs.

 Like the NAND gate, it has two or more inputs and a single output.

 The output of a NOR gate is low (0) only when all of its inputs are high (1). In all other cases, the
output is high (1).

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations
Realization of NAND gate using AND gate

Realization of NOR gate using AND gate

PROCEDURE

1. Place the IC on IC trainer kit.


2. Connect Vcc and ground to respective pins of IC.
3. Connect the inputs to the input switches provided in the IC trainer kit.
4. Connect the outputs to the switches of output LEDs.
5. Apply various combinations of inputs according to the truth table and observe condition of
LEDs.

RESULT:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Verification of Logic Gates


Date:
Experiment:5

AIM:
To construct and study different logic gates OR, NOT, AND, NAND, NOR
usingUniversal gates and verify their truth tables.

APPARATUS:

1.7400IC -1, 7402IC-2


2.Digital trainer kit
3.Power supply unit
4.Connecting wires

GATES USING UNIVERSAL GATES

THEORY:

Mainly the digital circuits are constructed with NAND or NOR gates than with
AND and OR gates. NAND and NOR gates are easier to fabricate with electronic
components with IC digital logic families. Basic gates are realized with the help of NAND
and NOR gates, so there are stated as universal gates. The realization of gates using NAND
and NOR and the corresponding truth tables are as shown in figures.

A B Q=AB

0 0 0

0 1 0

1 0 0

1 1 1

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

OR Gate:

A B Q=A+B

0 0 0

0 1 1

1 0 1

1 1 1

NOT gate:

A Q=Ā

0 1

1 0

NOR gate:

A B Q=A+B

0 0 1

0 1 0

1 0 0

1 1 0

Ex-OR Gate

A B Q=A'B+AB'

0 0 0

0 1 1

1 0 1

1 1 0
EIE Department V.R.Siddhartha Engg. College
Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Procedure
1. Place the IC on IC trainer kit.
2. Connect Vcc and ground to respective pins of IC.
3. Connect the inputs to the input switches provided in the IC trainer kit.
4. Connect the outputs to the switches of output LEDs.
5. Apply various combinations of inputs according to the truth table and observe condition of
LEDs.

VIVA QUESTIONS:

1. Explain how NOT gate acts as an inverter.


2. Explain the operation of OR gate using discrete components.
3. Why NAND and NOR gates are called Universal logic gates

RESULT:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Verification of Flip-Flops using gates

Date:
Experiment No:6

AIM:
Verification of Truth Tables of SR Flip Flop, JK Flip Flop, D Flip Flop and T Flip
Flop using ICs.

APPARATUS:

1. 7400 IC- 1(2-Input NAND gate)


2. 7410 IC- 1(3-Input NAND gate)
3. 7404 IC - 1 (Not gate)
4. Digital trainer kit
5. Power supply unit
6. Connecting wires
Theory:
Flip-flops are fundamental digital logic circuits used in digital electronics to store and manipulate binary
data. They are essential building blocks in sequential logic circuits and play a crucial role in tasks like data
storage, state machine design, and digital signal processing. There are several types of flip-flops, each with
its unique characteristics and applications. Here's an overview of various flip-flops:

1. SR Flip-Flop (Set-Reset Flip-Flop):


 The SR flip-flop has two inputs, "S" (Set) and "R" (Reset), along with two outputs, "Q" and
"Q'" (complement of Q).
 It can be used to store one bit of data and has two stable states: Set (Q=1, Q'=0) and Reset
(Q=0, Q'=1).
 It is sensitive to input setups where both S and R are HIGH (often considered an invalid
state), causing the outputs to be unpredictable.
 SR flip-flops can be used for basic data storage and simple memory elements.

2. D Flip-Flop (Data Flip-Flop):


 The D flip-flop, also known as a Data flip-flop or Delay flip-flop, has a single data input (D)
and two outputs (Q and Q').
 It stores the value of the data input at the rising or falling edge of the clock signal (depending
on whether it's a positive or negative edge-triggered D flip-flop).
 D flip-flops are commonly used for data storage and synchronization purposes.

3. JK Flip-Flop:
 The JK flip-flop has three inputs: "J" (set), "K" (reset), and a clock input.
 It can be used to toggle its state, set it, or reset it when certain conditions are met.
 The JK flip-flop is versatile and can be used in various applications, including counters and
memory units.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

4. T Flip-Flop (Toggle Flip-Flop):


 The T flip-flop has a single input (T) and a clock input.
 It toggles its state (Q and Q') when T is HIGH and the clock signal transitions.
 T flip-flops are commonly used in frequency division and toggle applications.

CIRCUIT DIAGRAM:

Truth Table:

Clock Inputs Outputs


Pulse S R Q Q'

1 0 0 Q0 (Previous state) Q0

1 0 1 0 1

1 1 0 1 0

1 1 1 indeterminate indeterminate

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

PROCEDURE:

1. Connect the logic circuit as per the circuit diagram.

2. S, R are the inputs to the Flip Flop and CLK is the Clock input, Q and Q' are the outputs.

3. Verify the truth table by applying ‘R’, ‘S’ inputs and clock pulse.

4. When S=0, R=0, CLK=1 the Flip Flop does not change state it remains in its previous
value.
5. When S=0, R=1, CLK=1 the output Q goes low (0 state), Q' goes high (1 state)

6. When S=1, R=0, CLK=1 the output Q goes high (1 state), Q' goes low (0 state)

7. When S=1, R=1, CLK=1 the state of the flip flop can not be determined (Indeterminate
state)

JK FILP FLOP:

Truth Table:

Clock Inputs Outputs


Pulse J K Q Q'

1 0 0 Q0 (Previous state) Q0

1 1 0 1 0

1 0 1 0 1

1 1 1 Toggle state Toggle state

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

PROCEDURE:

1. Connect the logic circuit as per the circuit diagram.

2. J, K are the inputs to the Flip Flop and CLK is the Clock input, Q and Q' are the outputs.

3. Verify the truth table by applying J, K inputs and clock pulse.

4. When J=0, K=0, CLK=1, the flip flop remains in its previous value.

5. When J=1, K=0, CLK=1, the output Q goes high (1 state), Q' goes Low (0 state)

6. When J=0, K=1, CLK=1, the output Q goes low (0 state), Q' goes high (1 state)

7. When J=1, K=1, CLK=1, the flip flop goes to toggle state.

D FILP FLOP:

Truth Table:

Clock Input Outputs


Pulse Q Q'
D

1 1 1 0

1 0 0 1

PROCEDURE:

1. Connect the logic circuit as per the circuit diagram.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

2. “D” is the input CLK is the clock pulse and Q, Q’ are the outputs.
3. If D=1, CLK=1, the output Q goes High (1 state) and Q' goes low (0 state) that is
flip flop stores binary “1”.
4. If D=1, CLK=1, the output Q goes low (0 state) and Q' goes high(1 state) that is flip
flop stores binary “0”.

T FILP FLOP:

Truth Table:

Clock Input Outputs


Pulse Q Q'
T

1 1 0 1

1 0 1 0

PROCEDURE:

1. Connect the logic circuit as per the circuit diagram.

2. “T” is the input CLK, the clock pulse, and Q, Q’ are the outputs.
3. If T=1, CLK=1, the output Q goes low (0 state) and Q' goes high (1 state) that is
flip flop stores binary “0”.
4. If D=0, CLK=1, the output Q goes high (1 state) and Q' goes low (0 state) that is
EIE Department V.R.Siddhartha Engg. College
Electrical and Electronics Engineering Lab Manual VR 23 Regulations

flip flop stores binary “1”.

VIVA QUESTIONS:

1. Modify S-R flip-flop to form D-flip-flop.


2. What is meant by Race around condition?
3. Modify J-K flip-flop to form a T flip-flop.
4. What are the applications of JK and T flip-flop?

RESULT:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Annexure
Resistance Color Code Chart

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Electronic Component Symbols

Ammeter
Amplifier general Amplifier, inverting Amplifier, operational

AND gate Antenna, balanced Antenna, general Antenna, loop

Antenna, loop, Battery Capacitor, feedthrough Capacitor, fixed


multiturn

Capacitor, Capacitor, Cathode, electron-tube,


Capacitor,
variable variable, split-stator cold
variable, split-rotor

Cathode, Cathode, electron- Cavity resonator Cell, electrochemical


electron-tube, tube indirectly
directly heated heated

Circuit breaker Coaxial cable Crystal, piezoelectric Delay line

Diac Diode, field-effect Diode, general Diode, Gunn

Diode, PIN
Diode, Schottky
Diode, light- Diode,
emitting photosensitive

Diode, tunnel Diode, varactor Diode, zener Directional coupler

Directional Exclusive-OR gate Female contact, general Ferrite bead


wattmeter

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Filament, Fuse Galvanometer Grid, electron-tube


electron-tube

Ground, chassis Ground, earth Headset Handset, double

Inductor, air core


Headset, stereo Inductor, air core,
Headset, single
bifilar

Inductor, air Inductor, air core, Inductor, iron core Inductor, iron core,
core, tapped variable bifilar

Inductor, iron Inductor iron core, Inductor, powdered- Inductor, powdered-


core, tapped variable iron core iron core, bifilar

or
Inductor, Inductor, powdered- Integrated circuit,
powdered-iron iron core, variable general Jack, coaxial or phono
core, tapped

Jack, phone, Jack, phone, three- Key, telegraph Lamp, incandescent


two-conductor conductor

Lamp, neon Male contact, general Meter, general Microammeter

Microphone Milliammeter NAND gate


Microphone,
directional

Negative voltage NOR gate NOT gate Optoisolator

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

connection

OR gate Outlet, two-wire, Outlet, two-wire, Outlet, three-wire


nonpolarized polarized

Plug, two-wire, Plug, two-wire,


Outlet, 234-V Plate, electron-tube
nonpolarized polarized

Plug, three-wire Plug, 234-V Plug, phone, two-


conductor
Plug, coaxial or phono

or
Plug, phone, Positive voltage Probe, radio-frequency
connection Potentiometer
three-conductor

Rectifier,
Rectifier, gas- Rectifier, high- semiconductor Rectifier, silicon-
filled vacuum controlled

Relay, single-pole, Relay, single-pole,


double-throw single-throw
Relay, double- Relay, double-pole,
pole, single-throw
double-throw

Resistor, fixed
Resistor, preset Resistor, tapped Resonator

Rheostat Saturable reactor Signal generator Solar battery

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Source, constant- Source, constant- Speaker


Solar cell current voltage

Switch, momentary-
Switch, double- Switch, double-pole, Switch, double-pole, contact
pole, rotary single-throw
double-throw

Switch, single-pole,
Switch, silicon- Switch, single-pole, Switch, single-pole,
single-throw
controlled rotary double-throw

Test point or
Terminals, Thermocouple
general, Terminals, general,
balanced unbalanced

Transformer, air Transformer, air Transformer, air core, Transformer, air core,
core core, step-up tapped primary
step-down

Transformer, air Transformer, iron core Transformer, iron core, Transformer, iron core,
core, tapped step-down step-up
secondary

Transformer, Transformer, iron core, Transformer, Transformer,


iron core, tapped secondary powdered-iron core powdered-iron core,
tapped primary step-down

Transformer, Transformer, Transformer,


Transistor, bipolar,
powdered-iron powdered-iron core, powdered-iron core,
EIE Department V.R.Siddhartha Engg. College
Electrical and Electronics Engineering Lab Manual VR 23 Regulations

core, step-up tapped primary tapped secondary NPN

Transistor, field-effect, Transistor, field-effect, Transistor, MOS field-


Transistor,
N-channel P-channel effect,
bipolar, PNP
N-channel

Transistor, MOS Transistor, Transistor, Transistor,


field-effect, photosensitive, NPN photosensitive, PNP photosensitive,
P-channel field-effect, N-channel

Transistor, Transistor, unijunction Triac Tube, diode


photosensitive,
field-effect, P-
channel

Tube, heptode Tube, hexode Tube, pentode Tube, photosensitive

Voltmeter Wattmeter
Tube, tetrode Tube, triode

Waveguide, Waveguide, flexible Waveguide, rectangular Waveguide, twisted


circular

Wires, crossing, Wires, crossing, not


connected connected

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

DIFFERENT ELECTRONIC COMPONENTS

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

BREAD BOARD
Breadboard:
This is a way of making a temporary circuit, for testing purposes or to try out an idea. No soldering
is required and all the components can be re-used afterwards. It is easy to change connections and replace
components. Almost all the Electronics Club projects started life on a breadboard to check that the circuit
worked as intended. The following figure depicts the appearance of Bread board in which the holes in top
and bottom stribes are connected horizontally that are used for power supply and ground connection
conventionally and holes on middle stribes connected vertically. And that are used for circuit connections
conventionally.

Figure: Bread board

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

h- PARAMETERS CALCULATIONS
h- Parameters calculations for Transistor in Common base configuration (CB Configuration)

a) Input impedance ( hib ) =  VEB /  IE ---- From input characteristics.

b) Reverse voltage transfer ratio ( hrb ) =  VEB /  VCB ---- From input characteristics.
c) Forward transfer current gain ( hfb ) =  IC /IE ---- From output characteristics.
d) Output conductance ( hob ) =  IC /  VCB ---- From output characteristics.

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab Manual VR 23 Regulations

Pin Configurations of Logic Gates

NOT GATE:

AND GATE:

OR GATE:

EIE Department V.R.Siddhartha Engg. College


Electrical and Electronics Engineering Lab VR23 Regulation

NAND GATE:

EXCLUSIVE –OR GATE:

NOR GATE

Prepared

1
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

ELECTRICAL ENGINEERING LAB

VERIFICATION OF KCL & KVL

AIM: To verify of Kirchhoff‟s voltage and current laws experimentally with an simple
electrical circuit.

Apparatus:
1.Bread Board
2. Resistors – 1 kΩ-1, 2.2 kΩ-1, 3.3 kΩ-1.
3. Multi meters - 3
4. RPS-1
5. Patch cords & connecting wires etc.
Theory:

KVL: In a closed electric circuit the algebraic sum of potential drops is equal
to the algebraic sum of total electromotive force occurring round the circuit.

KCL: The algebraic sum of current at any junction of a system of conductors


is zero, i.e. the sum of the currents flowing into a junction must be equal to the
sum of current flowing away from the junction.

Circuit Diagram:
R1 R2 R3

Vs 1kΩ 2.2kΩ 3.3kΩ


(0-15 v)
V1 V2 V3
- + - + - +
0.000 V 0.000 V 0.000 V

Fig 1: Verification of KVL


I1 I2
R1 + - + - R2
0.000 A 0.000 A
1kΩ 3.3kΩ
+

I3
0.000

Vs
(0-15 v)
A
-

R3
2.2kΩ

Fig 2: Verification of KCL

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Procedure:

KVL:
1. Connect the circuit as per the circuit diagram.
2. Vary the input voltage for different readings.
3. Connect the voltmeter to get the required voltage.
4. Repeat the same procedure for different observations.
5. Compare the values with theoretical results.
KCL:
1. Connect the circuit as per the circuit diagram.
2. Vary the input voltage for different readings.
3. Note down the ammeter readings.
4. Repeat the same procedure for different observations.
5. Compare the values with theoretical results.

Model Calculations:

Observation Table:

KVL:

I/P O/P Vs= V1+V2+V3 (V)


Vs V1 V2 V3 Algebraic sum of all Algebraic sum of all
(V) (V) (V) (V) voltages (theoretical) voltages (Practical)
5
10
15
20

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

KCL:

I/P O/P I1 = I2+I3

Vs I1 I2 I3
I1 (mA) I2+I3 (mA)
(V) (mA) (mA) (mA)
5
10
15
20

Precautions:
1) Don‟t touch bare conductors when supply is ON.
2) Ensure that there is no short circuit across the supply or any device, before switching
on
the supply.
3) Connections should be tight.
4) Readings must be taken without parallax error.
5) Do not make junctions at the terminals of meters.

Result: We have compared the measured values with the theoretical results.
Thus the KVL & KCL is verified successfully.

4
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

VERIFICATION OF SUPERPOSITION THEOREM


Aim: To verify the superposition theorem by determining the current flowing through
the resistance R.

Apparatus: 1.Bread Board


2. Resistors – 150Ω-1, 100 Ω -1, 47Ω-1.
3. Multi meters - 1
4. RPS-1
5. Patch cords & connecting wires etc.

Theory:
The superposition theorem states that in any linear network containing two or
more sources, the response in any element is equal to the algebraic sum of the
responses caused by individual sources acting alone, while the other sources are
non-operative; that is, while considering the effect of individual sources, other
ideal voltage sources and ideal current sources in the network are replaced by
short circuit and open circuit across their terminals respectively. This theorem is
valid only for linear systems.

Circuit Diagram:
R1 R3

150Ω 100Ω

V1 R2 V2
10 V 50Ω 10 V

+ I
0.000 A
-

Fig 1: When both sources V1 & V2 are active


R1 R3

150Ω 100Ω

V1 R2
10 V 50Ω

+ I
0.000 A
-

Fig 2: When V1 only active

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

R1 R3

150Ω 100Ω

R2 V2
50Ω 10 V

+ I
0.000 A
-

Fig 3: When V2 only active

Procedure:
1. Connect the circuit as per the circuit diagram.
2. Switch ON the supply voltage (DC) and apply V1 and V2.
3. Note down the Ammeter reading as I.
4. Make V1= 0 and apply V2, note down the ammeter reading as I1.
5. Make V2= 0 and apply V1, note down the ammeter reading as I2.
6. Verify the condition I = I1 + I2

Observation Table:
I/P Voltage O/P I=I1+I2
Sl.No Parameter Current(mA) at (mA)
V1(V) V2(V)
47Ω Resistor
1
When both sources V1
10 10 I= I1+I2=
& V2 are active
2 When V1 only active 10 0 I1 =
3 When V2 only active 0 10 I2 =

Result: The superposition theorem is verified for the given circuit theoretically and
practically.

6
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

MEASUREMENT OF POWER AND POWER FACTOR USING


SINGLE PHASE WATTMETER

Aim: To measure the Active Power and Power factor in a single phase circuit using watt
meter.

Apparatus
1. Watt meter -1

2. Voltmeter -1

3. Ammeter -1

4. Resistive Load

5. Inductive Load

6. Connecting Wires

Theory:

Power (P):

Definition: In the context of electrical systems, power is the rate at which work is done or
the rate at which energy is transferred or converted. In the International System of Units
(SI), the unit of power is the watt (W).

Mathematical Representation: Power (P) is calculated using the formula:

P=VIcos(ϕ)

where:

P is the power in watts (W),

V is the voltage in volts (V),

I is the current in amperes (A),

cos(ϕ) is the power factor.

Power Factor (PF):

Definition: The power factor of an electrical system is a dimensionless quantity that


represents the ratio of real power (in watts) to apparent power (in volt-amperes). It is a
measure of how effectively electrical power is being converted into useful work output.

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Mathematical Representation: The power factor is given by the cosine of the phase angle
(ϕ) between the voltage and current wave forms. It is denoted by cos(ϕ) and is expressed
as a value between -1 and 1.

Ideal Power Factor: Ideally, in an electrical system, the power factor is 1 (or 100%),
indicating that all the power is being used to do useful work. In reality, power factor is
often less than 1 due to reactive components like inductors and capacitors in the system.

Leading and Lagging Power Factor:

A leading power factor (cos(ϕ)>0) occurs when the current leads the voltage, typically in
circuits with inductive loads.

A lagging power factor (cos(ϕ)<0) occurs when the current lags the voltage, which is
common in circuits with capacitive loads.

Importance: Power factor is crucial in power systems because a low power factor can
result in increased power losses, reduced system efficiency, and increased stress on
equipment. Utilities often impose penalties for low power factor.

Circuit Diagram:

Procedures: –
1. Connect all the devices as per circuit diagram given above fig..
2. Take all the corresponding readings of the connected instruments in the circuit as per
observation table.

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

3. Now calculate power factor Cosɸ as per formula given in observation table.

Precaution:
1. Connections should be tight.
2. Ensure that there is no short circuit across the supply or any device, before switching on
the supply.
3. Don‟t touch bare conductors when supply is ON.
4. Readings must be taken without any parallax error.
Viva Questions:
1. What is active power?
2. What is Reactive Power?
3. What is Power Factor?
4. What is lagging Power factor?
5. What is Leading Power factor?
6. What is unity power factor?
7. What is the significance of Power Factor in power systems?

Result:

9
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

CALCULATION OF ELECTRICAL ENERGY FOR DOMESTIC


PREMISES
Aim:
To predict the daily power consumption and to calculate the daily usage of Electrical
energy and
energy bill for domestic appliances.
Theory:
Electricity is an essential part of our lives, but it‟s important to use it safely and
efficiently. By calculating your electric energy consumption and taking proper safety
precautions when using electrical appliances, you can help prevent accidents and ensure
that your household is using electricity responsibly. Electric energy consumption is the
amount of electrical energy used over a period of time. It is usually measured in kilowatt-
hours (kWh). This metric is crucial for hotels to calculate their energy usage and
determine ways to optimize it. Knowing how to calculate electric energy consumption can
also help you to understand your electricity bills and control energy usage. Calculating
the electrical load formula for a piece of equipment requires identifying its amps (measure
of current), volts (a measure of voltage), and watts (a measure of power generated).
Ampere = Watts/Volt
Watts = Volt x Ampere
Using these formulas, you can put together a detailed load calculation sheet and
determine the capacity of the main circuits and individual circuits. Start by joining down
the power consumption of your household appliances.
Here’s a representation of common appliances and their average power rating (in
watts):

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Procedure:
To calculate electric energy consumption, you‟ll need to know the following parameters:
 Power consumption (in watts)
 Operating time (in hours)
Once you have this information, you can follow these simple steps:
1. Convert power consumption from watts to kilowatts (kW) by dividing it by 1000. For
example, if the power consumption is 1200 watts, then the power consumption in kW is
1.2 kW.
2. Multiply the power consumption in kW by the operating time in hours. For example, if
the equipment was used for 5 hours, then the total energy consumption is:
Total energy consumption = 1.2 kWx 5 hours= 6 kWh
3. Use the calculated energy consumption value to estimate the energy costs. You can do
this by multiplying the energy consumption value by the cost of electricity per kWh.

11
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Calculations:
Therefore, your daily load = _________
Considering that you use these appliances for the same number of hours daily, your
monthly
power consumption is = _________
If the electricity tariff for your region is ₹ 8 per unit, your monthly energy bill is =
₹________

Result:

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Measurement of Energy using Energy Meter

Aim: To measure the energy in a single phase circuit using energy meter

Apparatus:
1.Watt meter -1

2.Voltmeter -1

3.Ammeter -1

4.Resistive Load

5.Inductive Load

6.Connecting Wires

THEORY:

Induction type of energy meters are universally used for measurement of energy in
domestic and industrial a.c. circuits. Induction type of meters possesses lower friction and
higher torque/weight ratio. Also they are inexpensive and accurate, and retain their
accuracy over a wide range of loads and temperature conditions. There are four main
parts of the operating mechanism: (i) Driving system (ii) Moving system (iii) Braking
system and (iv) Registering system. Driving System: The driving system of the meter
consists of two electro-magnets. The core of these electromagnets is made up of silicon
steel laminations. The coil of one of the electromagnets is excited by the load current.
This coil is called the ‘current coil’. The coil of second electromagnet is connected across
the supply and, therefore, carries a current proportional to the supply voltage. This coil is
called the ‘pressure coil’. Consequently the two electromagnets are known as series and
shunt magnets respectively. Copper shading bands are provided on the central limb. The
position of these banks is adjustable. The function of these bands is to bring the flux
produced by the shunt magnet exactly in quadrature with the applied voltage. Moving
System: This consists of an aluminium disc mounted on a light alloy shaft. This disc is
positioned in the air gap between series and shunt magnets. Braking System: A permanent
magnet positioned near the edge of the aluminium disc forms the braking system. The
aluminium disc moves in the field of this magnet and thus provides a braking torque. The
position of the permanent magnet is adjustable, and therefore, braking torque can be
adjusted by shifting the permanent magnet to different radial positions as explained
earlier. Registering (counting) Mechanism: The function of a registering or counting
mechanism is to record continuously a number which is proportional to the revolutions
made by the moving system. In all induction instruments we have two fluxes produced by
currents flowing in the winding of the instrument. These fluxes are alternating in nature
and so they produce emfs in a metallic disc or a drum provided for the purpose. These
emfs in turn circulate eddy currents in the metallic disc or the drum. The breaking torque
is produced by the interaction of eddy current and the field of permanent magnet. This
torque is directly proportional to the product of flux of the magnet, magnitude of eddy

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

current and effective radius ‘R’ from axis of disc. The moving system attains a steady
speed when the driving torque equals braking torque.

Circuit Diagram:

PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Now switch on the power supply.
3. For different values of load, note down the readings of the ammeter, voltmeter and
time in seconds.
4. Switch off the power supply.
5. Calculate observed reading and actual reading.

S.NO Load Voltmeter(V) Ammeter(A) Time Watt Theoretical Practical


in Sec meter

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EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Calculation of Energy

Result:

15
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Wheatstone’s bridge

Aim: To measure the unknown Resistance by Wheatstone’s bridge.

Apparatus:
1. DC Galvanometer
2. Decade Resistance Box
3. Resistors
4. DC Power supply
5. Bread Board
6. Connecting Wires
Theory:

Wheatstone‟s bridge is used for accurate measurement of resistance. A bridge circuit in


its simplest form consists of network of four resistance arms forming a closed circuit,
with a dc source is applied to two opposite junctions and a current detector connected to
the other two junctions.

When SW1 is closed, current flows and divides into the two arms at point A, i.e. I1 and
I2 . T he bridge is balanced when there is no current through the galvanometer, or when
the potential difference at points C and D is equal, i.e. the potential across the
galvanometer is zero.

To obtain the bridge balance equation

I 1 R1 = I 2 R2 ---(1)

For the galvanometer current to be zero, the following conditions should be satisfied.

I 1 = I 3 = E/( R1 + R3 ) I 2 = I 4 = E/( R2 + R4 )

Substituting in Eq. (1)

(E*R1 )/(R1+R3 ) = (E *R2 )/(R2+R4 )

R4 = (R2 *R3 ) / R1 This is the equation for bridge to be balanced

16
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College
Electrical and Electronics Engineering Lab VR23 Regulation

Procedure:

1) Measure resistors A, B, C, D, E, F, R1 and the variable pot R3 by adjusting “ADJ R3 ”.


Note down the values of each resistors.

2) Apply the DC supply volt age. ( It should be 12V DC )

3) Select the unknown resistor and measure its resistance Rx and note it down.

4) Connect the resistor to the terminal ( Rx ), and connect the power supply into the
circuit. Connect the galvanometer to the bridge.

5) Adjust pot ‘R3’ to get a null reading on the galvanometer.

6) Once the Null, reading is found, and measure the value of R3 . Put the value of R3 in
the formula given be low and calculate Rx practically.

Rx=R2 *R3 /R1 (R2=A or B or C….. or F)

7) Match the practical ‘Rx’ with that of the Rx directly measured on multimeter.

Result:

By
K. Prasanti
Asst.Prof.
EIE Dept.

17
EIE DEPARTMENT V.R.SIDDHARTHA Engg. College

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