Q.

Explain classification of memories

Primary or Main Memory

Primary memory is also known as the computer system's main memory that communicates directly
within the CPU, Auxiliary memory and the Cache memory. Main memory is used to kept programs or
data when the processor is active to use them. When a program or data is activated to execute, the
processor first loads instructions or programs from secondary memory into main memory, and then
the processor starts execution. Accessing or executing of data from primary memory is faster because
it has a cache or register memory that provides faster response, and it is located closer to the CPU.
The primary memory is volatile, which means the data in memory can be lost if it is not saved when a
power failure occurs. It is costlier than secondary memory, and the main memory capacity is limited as
compared to secondary memory.

The primary memory is further divided into two parts:

1. RAM (Random Access Memory)

2. ROM (Read Only Memory)

Random Access Memory (RAM)

Random Access Memory (RAM) is one of the faster types of main memory accessed directly by the
CPU. It is the hardware in a computer device to temporarily store data, programs or program results. It
is used to read/write data in memory until the machine is working. It is volatile, which means if a
power failure occurs or the computer is turned off, the information stored in RAM will be lost. All data
stored in computer memory can be read or accessed randomly at any time.

There are two types of RAM:

o SRAM
o DRAM

DRAM: DRAM (Dynamic Random-Access Memory) is a type of RAM that is used for the dynamic
storage of data in RAM. In DRAM, each cell carries one-bit information. The cell is made up of two
parts: a capacitor and a transistor. The size of the capacitor and the transistor is so small, requiring
millions of them to store on a single chip. Hence, a DRAM chip can hold more data than an SRAM chip
of the same size. However, the capacitor needs to be continuously refreshed to retain information
because DRAM is volatile. If the power is switched off, the data store in memory is lost.

SRAM: SRMA (Static Random-Access Memory) is a type of RAM used to store static data in the
memory. It means to store data in SRAM remains active as long as the computer system has a power
supply. However, data is lost in SRAM when power failures have occurred.

1
Q.DEFINE PROCESSOR

A processor (CPU) is the logic circuitry that responds to and processes the basic instructions that
drive a computer. The CPU is seen as the main and most crucial integrated circuitry (IC) chip in a
computer, as it is responsible for interpreting most of computers commands. CPUs will perform most
basic arithmetic, logic and I/O operations, as well as allocate commands for other chips and
components running in a computer.

The term processor is used interchangeably with the term central processing unit (CPU), although
strictly speaking, the CPU is not the only processor in a computer.

Q.Define assembly language program

An assembly language is a type of low-level programming language that is intended to

communicate directly with a computer’s hardware. Unlike machine language, which
consists of binary and hexadecimal characters, assembly languages are designed to be
readable by humans.

Low-level programming languages such as assembly language are a necessary bridge

between the underlying hardware of a computer and the higher-level programming
languages—such as Python or JavaScript—in which modern software programs are
written.

Q.Define machine cycle

The time needed for completing one operation of accessing memory, I/O or
acknowledging an external request is termed as Machine cycle. It is comprised of T-
states. One subdivision of the operation completed in one clock period is termed as
T-state. The following are the various machine cycles of 8085 microprocessor.

1. Opcode Fetch (OF)

2. Memory Read (MR)
3. Memory Write (MW)
4. I/O Read (IOR)
5. I/O Write (IOW)
6. Interrupt Acknowledge (IA)
7. Bus Idle (BI)

2
Q.Define instruction cycle

It has a set of instructions that it can execute, and the execution of each instruction involves a
series of steps known as the instruction cycle.
The instruction cycle of the 8085 microprocessor consists of four basic steps, which are:
1. Fetch: In this step, the microprocessor fetches the instruction from the memory location
pointed to by the program counter (PC). The PC is incremented by one after the fetch
operation.
2. Decode: Once the instruction is fetched, the microprocessor decodes it to determine the
operation to be performed and the operands involved.
3. Execute: In this step, the microprocessor performs the operation specified by the instruction
on the operands.
4. Store: Finally, the result of the execution is stored in the appropriate memory location or
register.

Q.Define t state

A T-state is a subdivision of an operation performed in one clock period. It's a basic unit for
calculating the execution of instructions or programs in a processor.
A T-state is measured from the falling edge of one clock pulse to the falling edge of the
next clock pulse. The time intervals T1 or T2 are examples of T-states.

3
Q.Differentiate between io mapped ,io memory mapped ,io schemes

4
Q.Explain the control word of PPi 8255 in detail

PPI 8255 is a general purpose programmable I/O device designed to interface the CPU with its
outside world such as ADC, DAC, keyboard etc. We can program it according to the given
condition. It can be used with almost any microprocessor. It consists of three 8-bit bidirectional
I/O ports i.e. PORT A, PORT B and PORT C. We can assign different ports as input or output
functions.

It consists of 40 pins and operates in +5V regulated power supply. Port C is further divided
into two 4-bit ports i.e. port C lower and port C upper and port C can work in either BSR (bit set
rest) mode or in mode 0 of input-output mode of 8255. Port B can work in either mode 0 or in
mode 1 of input-output mode. Port A can work either in mode 0, mode 1 or mode 2 of input-
output mode. It has two control groups, control group A and control group B. Control group A
consist of port A and port C upper. Control group B consists of port C lower and port B.
Depending upon the value if CS’, A1 and A0 we can select different ports in different modes as
input-output function or BSR. This is done by writing a suitable word in control register (control
word D0-D7).

Operating modes –
1. Bit set reset (BSR) mode – If MSB of control word (D7) is 0, PPI works in BSR mode. In
this mode only port C bits are used for set or reset.
2. Input-Output mode – If MSB of control word (D7) is 1, PPI works in input-output mode. This
is further divided into three modes:

 Mode 0 –In this mode all the three ports (port A, B, C) can work as simple input function or
simple output function. In this mode there is no interrupt handling capacity.
 Mode 1 – Handshake I/O mode or strobed I/O mode. In this mode either port A or port B
can work as simple input port or simple output port, and port C bits are used for handshake
signals before actual data transmission. It has interrupt handling capacity and input and
output are latched
 Mode 2 – Bi-directional data bus mode. In this mode only port A works, and port B can
work either in mode 0 or mode 1. 6 bits port C are used as handshake signals. It also
has interrupt handling capacity.

Advantages:

Versatility: The PPI 8255 can be programmed to operate in a variety of modes, which makes
it a versatile component in many different systems. It provides three 8-bit ports that can be
configured as input or output ports, and supports multiple modes of operation for each port.
Ease of use: The PPI 8255 is relatively easy to use and program, even for novice
programmers. The control register of the PPI can be programmed using simple commands,
which makes it easy to interface with other devices.
Compatibility: The PPI 8255 is widely used and has been around for many years, which
means that it is compatible with a wide range of devices and software.

Disadvantages:

Limited functionality: While the PPI 8255 is versatile, it has limited functionality compared to
newer I/O interface components. It is not capable of high-speed data transfer and has limited
memory capacity.
Limited number of ports: The PPI 8255 provides only three 8-bit ports, which may not be
sufficient for some applications that require more I/O ports.

5
Q.explain different data transfer schemes in detail of microprocessor 8085

Serial I/O mode transfer

For these devices and for these above mention reasons serial I/O mode is used. In
serial I/O mode transfer a single bit of data on a single line at a time. For serial I/O
data transmission mode, 8-bit parallel word is converted to a stream of eight serial bit
using parallel-to-serial converter. Similarly, in serial reception of data, the
microprocessor receives a stream of 8-bit one by one. After receiving serial data, it
converted to 8- bit parallel word using serial-to-parallel converter. For this purpose
data transfer schemes of 8085 microprocessor are introduced.
Parallel data transfer scheme
Parallel data transfer scheme is faster than serial I/O transfer. In parallel data
transfer mode, 8-bit data send all together with 8 parallel wire. In 8085
microprocessor mainly three types of parallel data transfer scheme we observed.
Those are
 Programmed I/O Data Transfer
 Interrupt Driven I/O Data Transfer
 Direct Memory Access (DMA) Data Transfer.

The 8085 microprocessor is a parallel device. That means it transfers eight bits of data simultaneously
over eight data lines (parallel I/O mode). However in many situations, the parallel I/O mode is either
impractical or impossible. For example, parallel data communication over a long distance becomes
very expensive. Similarly, parallel data communication is not possible with devices such as CRT
terminal or Cassette tape etc. So using different transfer scheme we can connect keyboard, external
memory, any input analogue sensor, motor etc with microprocessor.

6
Q. discuss stepper motor interfacing to 8085 microprocessor.

Using INTEL 8279, a keyboard and six 7-segment LED displays have been interfaced in the system.
Through the keyboard, the operator can issue commands to control the system. The LED display has been
provided to display messages to the operator.

• The windings of the stepper motor are connected to the collector of Darlington pair transistors.

• The transistors are switched ON/OFF by the microprocessor through the ports of 8255 and buffer
(74LS245).

• A freewheeling diode is connected across each winding for fast switching.

• The flowchart for the operational flow of the stepper motor control system is shown.

• The processor has to output a switching sequence and wait for I to 5 mull-seconds before sending the next
switching sequence. (The delay is necessary to allow the motor transients to die- out).

Stepper motor

Stepper motor is an electromechanical device that rotates through fixed angular steps when digital inputs are
applied. It is suitable for precise position, speed and direction control which are required in automation system.
Operation

The important parameter of a stepper motor is the step angle. It is the minimum angle through which the
motor rotates in response to each excitation pulse. In a four phase motor if there are 200 steps in one
complete rotation then then the step angle is 360/200 = 1.8O . So to rotate the stepper motor we have to
apply the excitation pulse. For this the controller should send a hexa decimal code through one of its ports.
The hex code mainly depends on the construction of the stepper motor.

Interfacing:

Even a small stepper motor require a current of 400 mA for its operation. But the ports of the
microcontroller cannot source this much amount of current. If such a motor is directly connected to
the microprocessor/microcontroller ports, the motor may draw large current from the ports and
damage it. So a suitable driver circuit is used with the microprocessor/microcontroller to operate the
mot

7
Q.Explain different addressing mode of 8051 microcontroller with example

In 8051 There are six types of addressing modes.

 Immediate AddressingMode
 Register AddressingMode
 Direct AddressingMode
 Register IndirectAddressing Mode
 Indexed AddressingMode
 Implied AddressingMode

Immediate addressing mode

In this Immediate Addressing Mode, the data is provided in the instruction itself. The data is
provided immediately after the opcode. These are some examples of Immediate Addressing
Mode

ex:-.

MOVA, #0AFH;

MOVR3, #45H;

MOVDPTR, #FE00H;

Register addressing mode

In the register addressing mode the source or destination data should be present in a register (R0 to
R7). These are some examples of RegisterAddressing Mode.

ex:-

MOVA, R5;

MOVR2, #45H;

MOVR0, A;

In 8051, there is no instruction like MOVR5, R7. But we can get the same result by using this
instruction MOV R5, 07H, or by using MOV 05H, R7. But this two instruction will work when the
selected register bank is RB0. To use another register bank and to get the same effect, we have to
add the starting address of that register bank with the register number. For an example, if the RB2 is
selected, and we want to access R5, then the address will be (10H + 05H = 15H), so the instruction
will look like this MOV 15H, R7. Here 10H is the starting address of Register Bank 2.

8
Direct Addressing Mode
In the Direct Addressing Mode, the source or destination address is specified by using 8-bit data in
the instruction. Only the internal data memory can be used in this mode. Here some of the examples
of direct Addressing Mode.

ex:-

MOV80H, R6;

MOVR2, 45H;

MOVR0, 05H;

The first instruction will send the content of registerR6 to port P0 (Address of Port 0 is 80H). The
second one is forgetting content from 45H to R2. The third one is used to get data from Register R5
(When register bank RB0 is selected) to register R5.

Register indirect addressing Mode

In this mode, the source or destination address is given in the register. By using register indirect
addressing mode, the internal or external addresses can be accessed. The R0 and R1 are used for 8-
bit addresses, and DPTR is used for 16-bit addresses, no other registers can be used for addressing
purposes. Let us see some examples of this mode.

ex:-

MOV0E5H, @R0;

MOV@R1, 80H

In the instructions, the @ symbol is used for register indirect addressing. In the first instruction, it is
showing that theR0 register is used. If the content of R0 is 40H, then that instruction will take the
data which is located at location 40H of the internal RAM. In the second one, if the content of R1 is
30H, then it indicates that the content of port P0 will be stored at location 30H in the internal RAM.

ex:-

MOVXA, @R1;

MOV@DPTR, A;

In these two instructions, the X in MOVX indicates the external data memory. The external data
memory can only be accessed in register indirect mode. In the first instruction if the R0 is holding
40H, then A will get the content of external RAM location40H. And in the second one, the content of
A is overwritten in the location pointed by DPTR.

9
Indexed addressing mode
In the indexed addressing mode, the source memory can only be accessed from program memory
only. The destination operand is always the register A. These are some examples of Indexed
addressing mode.

ex:-

MOVCA, @A+PC;

MOVCA, @A+DPTR;

The C in MOVC instruction refers to code byte. For the first instruction, let us consider A holds 30H.
And the PC value is1125H. The contents of program memory location 1155H (30H + 1125H) are
moved to register A.

Implied Addressing Mode

In the implied addressing mode, there will be a single operand. These types of instruction can work
on specific registers only. These types of instructions are also known as register specific instruction.
Here are some examples of Implied Addressing Mode.
ex:-

RLA;

SWAPA;

10
Q/ EXPLAIN internal memory organization of 8051 microcontroller

The concept of four register banks is very useful. For servicing the interrupts, this feature is
very good. The interrupt program can use one bank, and the interrupt Service Subroutine
(ISS) can access another bank for better performance. As there are four banks, so for nested
interrupts these can be used

When all of the register banks are being used, the scratch pad area will be 20H to 7FH. But
from 20H to 2FH (16 bytes or 128 bits) can be used as bit addressable RAM. By using some
simple instructions with 8-bit memory address we can check the bit addressing. For an
example the instruction CLR 6FH, using this instruction it clears the location 6FH. As we
know the8-bit address can locate 256 different locations, but here only128-bits are
addressable. Another section of bit addressable locations is 80H to FFH. The remaining
locations (30H to 7EH) of the RAM can be used to store variable data and stack.

11
Q.Write an 8051 ALP microcontroller block data transfer

8051 ALP to move a block of data from internal memory to external memory

ORG 0000H
MOV R1,#05 ;Counter
MOV R0,#30H ;Source
MOV DPTR,#2000H ;Destination
back:MOV A,@R0
MOVX @DPTR,A ;A->ext destn
INC R0 ;Source increment
INC DPTR ;destination increment
DJNZ R1,back
END

Q. write an 8051 ALP perform multiplication

8051 Program to Multiply two 8 Bit numbers

Assume multiplicand is stored in internal memory location 40H and multiplier in
memory location 41H. Store the LB and HB of the result in memory location 42H and
43H respectively.

Assembly language Program:

MOV A, 40h ; Copy the content of 40h into accumulator
MOV 0F0h, 41h ; Copy content of 41h into register B
MUL AB ; Multiply contents of Accumulator and B register
MOV 42H, A ; Copy the lower byte of result from accumulator to 42h
MOV 43H, 0F0h ; Copy the higher byte of result from B register to 43h
STOP: AJMP STOP ; Stop

12
Q. Discuss RS232 in detail

RS232C “Recommended Standard 232C” is the recent version of Standard 25 pin whereas, RS232D which
is of 22 pins. In new PC’s male D-type which is of 9 pins.

RS232 is a standard protocol used for serial communication, it is used for connecting computer and its
peripheral devices to allow serial data exchange between them. As it obtains the voltage for the path
used for the data exchange between the devices. It is used in serial communication up to 50 feet with the
rate of 1.492kbps. As EIA defines, the RS232 is used for connecting Data Transmission Equipment
(DTE) and Data Communication Equipment (DCE).

Universal Asynchronous Data Receiver &Transmitter (UART) used in connection with RS232 for
transferring data between printer and computer. The microcontrollers are not able to handle such kind of
voltage levels, connectors are connected between RS232 signals. These connectors are known as the DB-
9 Connector as a serial port and they are of two type’s Male connector (DTE) & Female connector (DCE).

Electrical Specifications
Let us discuss the electrical specifications of RS232 given below:

 Voltage Levels: RS232 also used as ground & 5V level. Binary 0 works with voltages up to +5V to
+15Vdc. It is called as ‘ON’ or spacing (high voltage level) whereas Binary 1 works with voltages
up to -5V to -15Vdc. It is called as ‘OFF’ or marking (low voltage level).
 Received signal voltage level: Binary 0 works on the received signal voltages up to +3V to +13
Vdc & Binary 1 works with voltages up to -3V to -13 Vdc.
 Line Impedances: The impedance of wires is up to 3 ohms to 7 ohms & the maximum cable
length are 15 meters, but new maximum length in terms of capacitance per unit length.
 Operation Voltage: The operation voltage will be 250v AC max.
 Current Rating: The current rating will be 3 Amps max.
 Dielectric withstanding voltage: 1000 VAC min.
 Slew Rate: The rate of change of signal levels is termed as Slew Rate. With its slew rate is up to
30 V/microsecond and the maximum bitrate will be 20 kbps.

13
 Q. explain TCON and TMOD registers in 8051 microcontroller

Counters and Timers in 8051 microcontroller contain two special function registers: TMOD (Timer
Mode Register) and TCON (Timer Control Register), which are used for activating and configuring
timers and counters TMOD and TCON registers are used for setting and using these timers/counters.
Both can be configured to operate either as timers or as event counters. In the case of timers,
register is incremented once every machine cycle. Hence timer is considered as counter which
counts machine cycles. One machine cycle has about 12 oscillator periods. The count rate is about
(1/12)Oscillator frequency..

 TF1, TF0 (Timer Overflow Flag): Both the bits work independently. If these bits are equal to one, it
indicates that a Timer interrupt has occurred. These bits are auto-cleared.
 TR1, TR0 (Timer Run Control bit): If these bits are equal to one it indicates to start the timer and if
they are equal to zero then it is to stop the timer.
 IE1, IE0 (External interrupt bit): If an external interrupt has occurred then these bits are equal to
one else they remain zero. Technically these bits are similar to timer overflow bits. These bits are
also auto-cleared.
 IT1, IT0 (Interrupt trigger bit): Considering the active high condition, if the bits are equal to one then
it indicates edge-triggered, if the bits are equal to zero then it indicates level triggered.

Among 8 bits, four bits are for timer 1 and the remaining four bits are for timer 0. The bits of
timer 0 and timer 1 are identical to each other.

 Gate: Gate means enable hardware control. The timer should run or stop. If the gate is equal to one
then counting is controlled by external Interrupt (0 or 1) using a hardware pin. If the gate is zero
then it is independent of external Interrupt. By default, the gate is one.
 C/T: If this bit is equal to one then it acts as a counter or else timer.
 M1, M0: Decides the mode of the timer.

00: Mode 0

01: Mode 1

10: Mode 2

11: Mode

14
 Q.Explain interfacing of traffic light controller in 8085
microprocessor.

 Thehardwareof thesystem consists of two parts.

 The first part is Microprocessor based system with 8085. Microprocessor as CPU
and the peripheral devices like EPROM, RAM, Keyboard & Display Controller
8279.
 ProgrammableasPeripheralInterface8255.
 26pinparallelport connector
 21keysHexakey pad
 sixnumberofseven segmentLED's.

 The second part is the traffic light controller interfaceboard, which consist of 36
LED's in which 20 LED's are used for vehicle traffic and they are connected to 20
port lines of 8255 through Buffer.

 RemainingLED'sareusedforpedestrian traffic.

 The traffic light interface board is connected to Main board using 26 core flat cables
to 26-pin Port connector.
 The LED's can be switched ON/OFF in the specified sequence by the
Microprocessor.

SourceProgram:

MVIA,80H:Initialize8255,portAandportB OUT 83H (CR): in output

mode
START: MVIA,09H
OUT80H(PA):SenddataonPAtoglowR1andR2 MVI A, 24H
OUT81H(PB):SenddataonPBtoglowG3andG4 MVI C, 28H: Load multiplier
count (40ıο) for delay CALL DELAY: Call delay subroutine
MVIA,12H

OUT(81H)PA:SenddataonPortAtoglowY1andY2 OUT (81H)PB: Send

dataon port Bto glow Y3 and Y4 MVI C, 0AH: Load multiplier count (10ıο)
for delay CALL: DELAY: Call delay subroutine

15
MVIA,24H
OUT(80H)PA:SenddataonportAtoglowG1andG2 MVI A, 09H
OUT(81H)PB:SenddataonportBtoglowR3andR4 MVI C, 28H: Load
multiplier count (40ıο) for delay CALL DELAY: Call delay subroutine
MVIA,12H
OUT PA: Send data on port A to glow Y1 and Y2 OUT PB: Send data on
port B to glow Y3 and Y4 MVIC,0AH:Loadmultipliercount(10ıο)fordelay
CALL DELAY: Call delay subroutine
JMPSTART

Delay Subroutine:
DELAY:LXID,Count:Loadcounttogive0.5secdelay BACK: DCX D: Decrement
counter
MOVA, D
ORAE:Checkwhethercountis0 JNZ BACK: If not zero,
repeat
DCRC: Check if multiplier zero, otherwise repeat JNZ DELAY

16
Q.What is an interrupt? Explain different type of interrupt occurs in 8085.
 Interrupts are the signals generated by the external devices to request the
microprocessor to perform a task. Or
Interrupt is the method of creating a temporary halt during program execution and
allows peripheral devices to access the microprocessor. The microprocessor
responds to that interrupt with an ISR (Interrupt Service Routine), which is a short
program to instruct the microprocessor on how to handle the interrupt.
Types of Interrupt

These are classified into two main types.

A.Hardware Interrupts
B.Software Interrupts

A.HardwareInterrupts are classified into types

a. Maskable Interrupts–
 Masking is preventing the interrupt from disturbing the main program. When an
interrupt is masked the processor will not accept the interrupt signal.
 All the hardware interrupts, except TRAP are disabled, when the processor is
resettled. They can also be disabled by executing DI instruction. (DI-Disable
Interrupt).
 RST7.5,RST6.5and RST5.5aremaskableinterrupt.
b. Non-maskable Interrupts(NMI)–
 The NMIs are the highest priority activities that need to be processed immediately
and under any situation, such as a timeout signal generated from a watchdog timer.
 TRAPisnon-maskable interrupt.
c. Vectored interrupt
 In vectored interrupts, the processor automatically branches to the specific address
in response to an interrupt.
 TheTRAP,RST7.5,RST6.5andRST5.5arevectoredinterrupts.
d. Non-vectored interrupt
 In non-vectored interrupts the interrupted device should give
The address of the interrupt service routine(ISR).
 The INTR is a non-vectored interrupt.

17
 Hence when a device interrupts through INTR, it has to supply the address of ISR
after receiving interrupt acknowledge signal.

B.Software Interrupts
 The processor itself requests a software interrupt after executing certain instructions
or if particular conditions are met.
 These can be a specific instruction that triggers an interrupt such as subroutine calls
and can be triggered unexpectedly because of program execution errors, known as
exceptions or traps.
 The software interrupts are program instructions. When the instruction is executed,
the processor executes an interrupt service routine stored in the vector address of
the software interrupt instruction.
 Thesoftwareinterrupts areRST0, RST1, RST2, RST3, RST 4, RST 5, RST 6 and
RST 7.

18
 Q. Discuss different types of Data transfer techniques in
8085.ExplainSynchronousandAsynchronousDataTransfer Method

A.Paralleldatatransfer techniques
 We know that under the parallel data transfer scheme, multiple data bits can
be transmitted at the same time.
 ThusfortheIntel8085,8bitsofdataaresentalltogether using eight parallel lines.
 The different types of parallel data transfer schemes We have:
a. ProgrammedI/OData Transfer
b. InterruptDrivenI/ODataTransfer
c. DeviceorDirect MemoryAccess (DMA)DataTransfer
a. ProgrammedI/OData Transfer

This is a straight forward scheme under parallel data transfer mechanisms.

 This mode is generally preferred for simple, small microprocessor systems where
speed is critical.
 This method can work under the synchronous and asynchronous mode, depending
on the speed and architecture of the I/O devices.
 We also prefer this method when there is a small amount of information to be
exchanged between the microprocessor and other devices that are placed near to the
microprocessor. Example: Computer, printer, etc.

19
 I. SynchronousDataTransferMethod
 The word Synchronous means taking place at the same time.
 Thus, to establish communication between our processor and the device, we need to
set a common clock pulse. This common pulse synchronizes the peripheral device
with the 8085 microprocessor.
 If the device is ready to send data, it can indicate via the READY pin of 8085.
 Once the speeds match, the data transfer immediately begins, once a signal is issued
by the microprocessor to begin transferring.
 The microprocessor need not wait for an extended period because of the matching
speeds.
 Hence, this method of data transfer is most commonly employed for communicating
with compatible memory devices.
II. AsynchronousData TransferMethod
 When the speed of the I/O device is slower than that of the microprocessor, we
prefer the Asynchronous Data Transfer Method.
 As the speeds of both the devices differ, the I/O device’s
Internal timing is entirely independent of the microprocessor.
 Thus they are termed to be asynchronous from each other. The term asynchronous
means ‘at irregular intervals.’

B.SerialDataTransfer Techniques
 Under the serial data transfer mode a single bit of information/data is transmitted on
a single line at a time.
 An 8-bit parallel word is first converted into a stream of 8 serial bits with the help
of a parallel to serial converter.
 In the same way during the serial reception of information bits, the microprocessor
receives a stream of separate 8 bits one by onewhicharelaterconvertedtoan8-
bitparallel word with the help of a serial to parallel converter.

20
Q.Draw and explain block diagram of 8051 microcontroller.

a. CentralProcessorUnit(CPU)
 As we know that the CPU is the brain of any processing device of the
microcontroller.
 It monitors and controls all operations that are performed on the Microcontroller
units.
 TheUserhas nocontrolover theworkof theCPUdirectly.
 It reads program written in ROM memory and executes them and do the expected
task of that application.
b. Interrupts
 As its name suggests Interrupt is a subroutine call that interrupts of the
microcontrollers main operations or work and causes it to execute any other
program which is more important at the time of operation.
 The feature of Interrupt is very useful as it helps in case of emergency operations.
 An Interrupts gives usa mechanism top ut on hold the ongoing operations, execute a
subroutine and then again resumes to another type of operations.
 Thereare5interrupts are shown in below
• INTR
• TRAP
• RST 7.5
• RST 6.5
• RST 5.5

21
c. Memory
 The memory which is used to store the program of the microcontroller is known as
code memory or Program memory of applications.
 It is known as ROM memory of microcontroller also requires a memory to store
data or operands temporarily of the micro controller.
 Thedatamemoryofthe8051isusedtostoredatatemporarily
For operation is known RAM memory.

 8051 microcontroller has 4K of code memory or program memory, thathas 4KB

ROM and also 128 bytes of data memory of RAM.
d.BUS
 Basically Bus is a collection of wires which work as a communication channel or
medium for transfer of Data.
 Thesebusesconsistof8,16ormorewiresofthe microcontroller.
 Thus thesecancarry8 bits or16 bits simultaneously.
 Here are two types of buses that are shown in below
• Address Bus
• Data Bus
 Address Bus: It is used to address memory locations and to transfer the address
from CPU to Memory of the microcontroller.
 Data Bus: Microcontroller 8051 has 8 bits ofthe data bus, which is used to carry
data of particular applications.
e. Oscillator
 Generally we know thatthe microcontroller is a device, therefore it requires clock
pulses for its operation of microcontroller applications.
 Forthispurposemicrocontroller8051hasanon-chiposcillator which works as a clock
source for Central Processing Unit of the microcontroller.
 The output pulses of oscillator are stable.
 Therefore it enables synchronized work of all parts of the 8051 Microcontroller.
f. Input/OutputPort
 Normally microcontroller is used in embedded systems to control the operation of
machines in the microcontroller.
g. Timers/Counters
 8051microcontrollerhastwo16bittimersandcounters.
 These counters are again divided intoa8bit register.

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Q. explain power saving mode in 8051
 PowerSavingModein8051
 Only two bits in the register are related to power saving mode in 8051 ( PD, IDL ).
 Whenever the processor restarts by default it is in normal mode.

There are two types of power saving modes in8051

A.Idle mode
B.Powerdown mode

A.Idle mode
In the case of the idle mode the most power-hungry unit the CPU of the
microcontroller is turned off.
 All the other peripherals like the timer, serial communication and interrupts keep
functioning normally.
 Also the statuses of the CPU, Accumulator, and the stack pointer remain as it is.
 ALE and PSEN output high signals.
 There are two ways to pull the 8051 microcontroller out from the idle mode.

a. If any enabled interrupt occurs during the idle mode it resets the IDL bit of
the PCON register.
b. Hardwarereset

B.Powerdown mode
 In this mode clock supply is cut from the whole system.
 In this power saving mode maximum amount of power is saved.
Control signal of PD and IDL mode and its status are shown below
PD IDL Status
0 0 NormalPowermode
0 1 Idle mode
1 0 Powerdownmode
1 1 Powerdownmode

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 Q. Draw the architecture of 8085 microprocessor and enlist its features

8085 consists of the following functional units −

Accumulator

It is an 8-bit register used to perform arithmetic, logical, I/O &

LOAD/STORE operations. It is connected to internal data bus & ALU.

Arithmetic and logic unit

As the name suggests, it performs arithmetic and logical operations like

Addition, Subtraction, AND, OR, etc. on 8-bit data.

General purpose register

There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H

& L. Each register can hold 8-bit data.

These registers can work in pair to hold 16-bit data and their pairing
combination is like B-C, D-E & H-L.

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Program counter

It is a 16-bit register used to store the memory address location of the

next instruction to be executed. Microprocessor increments the program
whenever an instruction is being executed, so that the program counter
points to the memory address of the next instruction that is going to be
executed.

Stack pointer

It is also a 16-bit register works like stack, which is always

incremented/decremented by 2 during push & pop operations.

Temporary register

It is an 8-bit register, which holds the temporary data of arithmetic and

logical operations.

Flag register

It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1

depending upon the result stored in the accumulator.

Instruction register and decoder

It is an 8-bit register. When an instruction is fetched from memory then it

is stored in the Instruction register. Instruction decoder decodes the
information present in the Instruction register.

Timing and control unit

It provides timing and control signal to the microprocessor to perform

operations. Following are the timing and control signals, which control
external and internal circuits

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Interrupt control

As the name suggests it controls the interrupts during a process. When a

microprocessor is executing a main program and whenever an interrupt
occurs, the microprocessor shifts the control from the main program to
process the incoming request. After the request is completed, the control
goes back to the main program.

There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST
6.5, RST 5.5, TRAP.

Serial Input/output control

It controls the serial data communication by using these two instructions:

SID (Serial input data) and SOD (Serial output data).

Address buffer and address-data buffer

The content stored in the stack pointer and program counter is loaded
into the address buffer and address-data buffer to communicate with the
CPU. The memory and I/O chips are connected to these buses; the CPU
can exchange the desired data with the memory and I/O chips.

Address bus and data bus

Data bus carries the data to be stored. It is bidirectional, whereas address

bus carries the location to where it should be stored and it is
unidirectional. It is used to transfer the data & Address I/O devices.

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Q. Explain interfacing of ADC 0800 converter
TheADC 0800 Chip
 The ADC 0808is an8-bit analog to digital converter.
 It has 8 channel multiplexer to interface with the microprocessor.
 This chip is popular and widely used ADC.
 This device uses successive approximation technique to convert analog signal to
digital form.
 One of the main advantage of this chip is that it does not require any external zero
and full scale adjustment only +5V DC supply is sufficient.
The functional block diagram of this chip is like this

InterfacingADCwith8085Microprocessor
To interface the ADC with 8085 we need 8255 Programmable Peripheral Interface chip
with it.
 The circuit diagram of connecting 8085,8255andthe ADC converter.
 Program:-
 MVI A, 98H ; Set Port A and C upper as input, C Lower as output
 OUT 03H ; Write control word 8255-I to control Word register
 XRA A; Clear the accumulator
OUT 02H ; Send the content of Accumulator to Port C lower to select IN0
MVIA,08H;Loadtheaccumulatorwith08H OUT 02H ; ALE and SOC
will be 0
XRA A ; Clear the accumulator
OUT 02H ; ALE and SOC will below.
READ:IN02H; Read from EOC (PC7)
RAL ; Rotate left to check C7 is 1. JNC READ ;If C7 is not
1, go to READ IN00H;ReaddigitaloutputofADC STA 8000H ; Save
result at 8000H
HLT; Stop the program

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Q. write a note on 8251 USART.

8251 universal synchronous asynchronous receiver transmitter (USART) acts as a mediator

between microprocessor and peripheral to transmit serial data into parallel form and vice
versa. 1. It takes data serially from peripheral (outside devices) and converts into parallel
data. 2. After converting the data into parallel form, it transmits it to the CPU. 3. Similarly, it
receives parallel data from microprocessor and converts it into serial form. 4. After
converting data into serial form, it transmits it to outside device (peripheral).

It contains the following blocks:

1. Data bus buffer – This block helps in interfacing the internal data bus of 8251 to
the system data bus. The data transmission is possible between 8251 and CPU
by the data bus buffer block.
2. Read/Write control logic – It is a control block for overall device. It controls the
overall working by selecting the operation to be done.
3. Modem control (modulator/demodulator) – A device converts analog
signals to digital signals and vice-versa and helps the computers to
communicate over telephone lines or cable wires
4. Transmit buffer – This block is used for parallel to serial converter that
receives a parallel byte for conversion into serial signal and further
transmission onto the common channel.
1. TXD: It is an output signal, if its value is one, means transmitter will
transmit the data.
5. Transmit control – This block is used to control the data transmission with
the help of following pins:
1. TXRDY: It means transmitter is ready to transmit data character.
2. TXEMPTY: An output signal which indicates that TXEMPTY pin has
transmitted all the data characters and transmitter is empty now.
3. TXC: An active-low input pin which controls the data transmission rate
of transmitted data.
6. Receive buffer – This block acts as a buffer for the received data.
1. RXD: An input signal which receives the data.
7. Receive control – This block controls the receiving data.
8. RXRDY: An input signal indicates that it is ready to receive the data.

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Q.explain significance of each flag of 8085 microprocessor in detail and 8051 microcontroller.

In 8085 microprocessor, the flags register can have a total of eight flags. Thus a flag can be
represented by 1 bit of information. But only five flags are implemented in 8085. And they
are:

 Carry flag (Cy),

 Auxiliary carry flag (AC),
 Sign flag (S),
 Parity flag (P), and
 Zero flag (Z).

The respective position of these flag bits in flag register has been show the below figure. The
positions marked by “x” are to be considered as don't care bits in the flags register. The user
is not required to memorize the positions of these flags in the flags register.

These individual flags are either set to 1, or reset to 0 depending on the result of execution
of the last executed arithmetic or logical instruction. But in a few arithmetic and logical
instructions, some or none of these flags are affected. Also there are some arithmetic and
logical instructions, flag bits in the flag register will not get affected as well.
Carry flag (Cy): after performing the addition of any two 8-bit numbers, the carry
generated can be either 0 or 1. That is only 1-bit. Thus to store the carry information 1-bit
storage is enough. The Cy flag is stored in the LS bit position in the flags register.
Instructions that use the Cy flag are widely used in the user programs.
Auxiliary carry flag (Ac): Now let us consider the addition of any two 8-bit (2-hex digit)
numbers, a carry may be generated when we add the LS hex digits of the two numbers.
Such a carry is called intermediate carry also known as half carry, or auxiliary carry (AC).
Intel prefers to call it AC.
Sign flag (S): The S flag is set to 1, when the result thus produced against any logical or
arithmetic operations is negative, indicated by MS bit of 8-bit result being 1. It is reset to 0
otherwise if the result is positive, indicated by MS bit of 8-bit result being 0.
Parity flag (P): The P flag is set to 1, if the 8-bit result thus produced against any logical
and arithmetic operation has an even number of 1's in it. If there are odd number of 1's in
the 8-bit result, the P flag is reset to 0.
Zero flag (Z): The Z flag is set to 1, if after arithmetic and logical operations, the 8-bit
result thus produced, is 00H. If the 8-bit result is not equal to 00H, the Z flag is reset to 0.
Thus the Z flag is hoisted to indicate that the result is 0.

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Q. Explain DMA Controller in detail
 DMA Controller
 A DMA controller is a device usually peripheral to a CPU that is programmed to
perform a sequence of data transfers on behalf of the CPU.
 A DMA controller can directly access memory and is used to transfer data from one
memory location to another or from an I/O device to memory and vice versa.
 A DMA controller manages several DMA channels each of which can be
programmed to perform a sequence of these DMA transfers.
 A DMA request signal for each channel is routed to the DMA controller.
 This signal is monitored and responded to in much the same way that a processor
handles interrupts.
 When the DMA controller sees a DMA request it responds by performing one or
many data transfers from that I/O device into system memory or vice versa.
 Channels must be enabled by the processor for the DMA controller to respond to
DMA requests.
 The number of transfers performed transfer modes used and memory locations
accessed depends on how the DMA channel is programmed.
A DMA controller typically shares the system memory and I/O bus with the CPU and has
both bus master and slave capability
Inbusmastermode the DMA controller acquires the system bus (address, data, and
control lines) from the CPU to perform the DMA transfers.
 Because the CPU releases the system bus for the duration of the transfer the process
is sometimes referred to as cycle stealing.
 In bus slave mode the DMA controller is accessed by the CPU which programs the
DMA controller's internal registers to set up DMA transfers.

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Q.Explain SCON register in 8051

ANS>

31
Draw pin diagram of 8085

Draw pin diagram of 8051

32
Q.Addressing modes in 8085 microprocessor
In 8085 microprocessor there are 5 types of addressing modes:

1. Immediate Addressing Mode –

In immediate addressing mode the source operand is always data. If the data is 8-bit,
then the instruction will be of 2 bytes, if the data is of 16-bit then the instruction will be
of 3 bytes.
Examples:
MVI B 45 (move the data 45H immediately to register B)
LXI H 3050 (load the H-L pair with the operand 3050H immediately)
JMP address (jump to the operand address immediately)

2. Register Addressing Mode –

In register addressing mode, the data to be operated is available inside the register(s)
and register(s) is(are) operands. Therefore the operation is performed within various
registers of the microprocessor.
Examples:
MOV A, B (move the contents of register B to register A)
ADD B (add contents of registers A and B and store the result in register A)
INR A (increment the contents of register A by one)

3. Direct Addressing Mode –

In direct addressing mode, the data to be operated is available inside a memory
location and that memory location is directly specified as an operand. The operand is
directly available in the instruction itself.
Examples:
LDA 2050 (load the contents of memory location into accumulator A)
LHLD address (load contents of 16-bit memory location into H-L register pair)
IN 35 (read the data from port whose address is 35)

4. Register Indirect Addressing Mode –

In register indirect addressing mode, the data to be operated is available inside a
memory location and that memory location is indirectly specified by a register pair.
Examples:
MOV A, M (move the contents of the memory location pointed by the H-L pair to the
accumulator)
LDAX B (move contents of B-C register to the accumulator)
STAX B (store accumulator contents in memory pointed by register pair B-C)

5. Implied/Implicit Addressing Mode –

In implied/implicit addressing mode the operand is hidden and the data to be operated
is available in the instruction itself.
Examples:
CMA (finds and stores the 1’s complement of the contents of accumulator A in A)
RRC (rotate accumulator A right by one bit)
RLC (rotate accumulator A left by one bit)

33
Q.Write an ALP to generate square wave form cro using interfacing
ic 8255 with microprocessor 8085

34
Q.enlist features of 8051 microcontroller
 8 – Bit ALU: ALU or Arithmetic Logic Unit is the heart of a
microcontroller. It performs arithmetic and bitwise operation on
binary numbers. The ALU in 8051 is an 8 – Bit ALU i.e. it can
perform operations on 8 – bit data.
 8 – Bit Accumulator:The Accumulator is an important register
associated with the ALU. The accumulator in 8051 is an 8 – bit
register.
 RAM: 8051 Microcontroller has 128 Bytes of RAM which
includes SFRs and Input / Output Port Registers.
 ROM: 8051 has 4 KB of on-chip ROM (Program Memory).
 I/O Ports: 8051 has four 8 – bit Input / Output Ports which are
bit addressable and bidirectional.
 Timers / Counters: 8051 has two 16 – bit Timers / Counters.
 Serial Port: 8051 supports full duplex UART Communication.
 External Memory: 8051Microcontroller can access two 16 – bit
address line at once: one each for RAM and ROM. The total
external memory that an 8051 Microcontroller can access for
RAM and ROM is 64KB (216 for each type).
 Additional Features: Interrupts, on-chip oscillator, Boolean
Processor, Power Down Mode, etc.

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Description of the Pins : 8051 microcontroller

 (RST) – Reset pin. It is an active-high, input pin. Therefore if the RST pin is high
for a minimum of 2 machine cycles, the microcontroller will reset i.e. it will close
and terminate all activities. It is often referred as “power-on-reset” pin because it
is used to reset the microcontroller to it’s initial values when power is on (high).
 (RXD) : 10th pin is RXD (serial data receive pin) which is for serial
input. Through this input signal microcontroller receives data for serial
communication.
 (TXD) : 11th pin is TXD (serial data transmit pin) which is serial output
pin. Through this output signal microcontroller transmits data for serial
communication.
 (INT0′, INT1′ ) : 12th and 13th pins are for External Hardware Interrupt
0 and Interrupt 1 respectively. When this interrupt is activated(i.e. when
it is low), 8051 gets interrupted in whatever it is doing and jumps to the
vector value of the interrupt (0003H for INT0 and 0013H for INT1) and
starts performing Interrupt Service Routine (ISR) from that vector
location.
 (T0 and T1) : 14th and 15th pin are for Timer 0 and Timer 1 external
input. They can be connected with 16 bit timer/counter.
 (WR’) : 16th pin is for external memory write i.e. writing data to the
external memory.
 (RD’) : 17th pin is for external memory read i.e. reading data from external
memory
 (XTAL2 And XTAL1) – These pins are connected to an external oscillator
which is generally a quartz crystal oscillator. They are used to provide an
external clock frequency of 4MHz to 30MHz..
 (PSEN) – PSEN stands for Program Store Enable. It is output, active-low pin.
This is used to read external memory. In 8031 based system where external
ROM holds the program code, this pin is connected to the OE pin of the ROM.
 (ALE/ PROG) – ALE stands for Address Latch Enable. It is input, active-high
pin. This pin is used to distinguish between memory chips when multiple
memory chips are used. It is also used to de-multiplex the multiplexed address
and data signals available at port 0. During flash programming i.e. Programming
of EPROM, this pin acts as program pulse input (PROG).
 (EA/ VPP) – EA stands for External Access input. It is used to enable/disable
external memory interfacing. In 8051, EA is connected to Vcc as it comes with
on-chip ROM to store programs. For other family members such as 8031 and
8032 in which there is no on-chip ROM, the EA pin is connected to the GND.

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