Digital System Design

Chapter 1
Logic Simplification and Combinational Logic Design

NUMBER SYSTEMS

The study of number systems is important from the viewpoint of understanding how data are
represented before they can be processed by any digital system including a digital computer.
Different characteristics that define a number system include the number of independent
digits used in the number system, the place values of the different digits constituting the
number and the maximum numbers that can be written with the given number of digits. The
base or radix of a number system is defined as the maximum number of digits or symbols that
can be used in any position. The radix of the decimal number system is 10 as it has 10
independent digits, i.e. 0, 1, 2, 3, 4, 5, 6, 7, 8 and 9. Similarly, the binary number system with
only two independent digits, 0 and 1, is a radix-2 number system. The octal and hexadecimal
number systems have a radix (or base) of 8 and 16 respectively.

Decimal Number System:

The decimal number system is mainly suitable for human beings. As it uses 10 digits in any
position of a given number, the base or radix is 10.

Example: 152 10 , 82.45 10 , 98.79 10

It obeys positional notation rule. The value or magnitude of a given decimal number can be
expressed as the sum of the various digits multiplied by their place values or weights.

Example: 1245 10 = 1 × 103 + 2 × 102 + 4 × 101 + 5 × 100

Binary Number System:

Most of the electronic components will have two state or binary operation ON and OFF. The
decimal number system is not suitable to digital systems which contain two state operation.
The number system used for digital systems is binary number system. The binary number
system is a radix-2 number system with „0‟ and „1‟ as the two independent digits. All larger
binary numbers are represented in terms of „0‟ and „1‟. These symbols are known as binary
digits or simply bits. It also obeys positional notation rule.

Example: 101001 2 , 11.01101 2

1001.11 2 = 1 × 23 + 0 × 22 + 0 × 21 + 1 × 20 + 1 × 2−1 + 1 × 2−2

Octal Number System:

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Digital System Design

The octal number system has a radix of 8 and therefore has eight distinct digits. The
independent digits are 0, 1, 2, 3, 4, 5, 6 and 7. It also obeys positional notation rule.

Example: 754.16 8 , 557.63 8

714.77 8 = 7 × 82 + 1 × 81 + 4 × 80 + 7 × 8−1 + 7 × 8−2

Hexadecimal Number System:

To represent large numbers in digital systems like computers, hexadecimal number system is
used. Here the base is 16 and hence 16 digits or symbols (0-9) and (A-F) can be placed in any
given number. This number system obeys positional notation rule.
Example: 1𝐴𝐶. 𝐵𝐷 16 , 2𝐵𝐶 𝐻

3𝐶𝐷. 4𝐸 16 = 3 × 162 + 𝐶 × 161 + 𝐷 × 160 + 4 × 16−1 + 𝐸 × 16−2

Decimal Number Binary Number Octal Number Hexadecimal

Number
System System System Number System
0 0 0 0 0
1 1 1 1 1
2 2 10 2 2
3 3 11 3 3
4 4 100 4 4
5 5 101 5 5
6 6 110 6 6
7 7 111 7 7
8 8 1000 10 8
9 9 1001 11 9
10 10 1010 12 A
11 11 1011 13 B
12 12 1100 14 C
13 13 1101 15 D
14 14 1110 16 E
15 15 1111 17 F
16 16 10000 20 10

Conversion of numbers:

Decimal to Binary Conversion:

A decimal number can be converted into a binary number by using Divide-by-2 or double
dabble method. For the integer part, the binary equivalent can be found by successively
dividing the integer part of the number by 2 and recording the remainders until the quotient
becomes „0‟. The remainders written in reverse order constitute the binary equivalent. For the
fractional part, it is found by successively multiplying the fractional part of the decimal
number by 2 and recording the carry until the result of multiplication is „0‟. The carry

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sequence written in forward order constitutes the binary equivalent of the fractional part of
the decimal number.

Example: Convert 152.49 10 to binary number.

152 ÷ 2 = 76 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 0

76 ÷ 2 = 38 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 0

38 ÷ 2 = 19 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 0

19 ÷ 2 = 9 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 1

9 ÷ 2 = 4 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 1

4 ÷ 2 = 2 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 0

2 ÷ 2 = 1 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 0

1 ÷ 2 = 0 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 1

The binary representation of integer part is (10011000)2

0.49 × 2 = 0.98 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 0

0.98 × 2 = 0.96 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 1

0.96 × 2 = 0.92 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 1

The binary representation of fractional part is (.011)2

∴ 152.49 10 = (10011000.011)2

Decimal to Octal Conversion:

The process of decimal-to-octal conversion is similar to that of decimal-to-binary conversion.

The progressive division in the case of the integer part and the progressive multiplication
while working on the fractional part here are by „8‟ which is the radix of the octal number
system. Again, the integer and fractional parts of the decimal number are treated separately.
This process of conversion is known as octal-dabble method.

Example: Convert 152.49 10 to octal number.

152 ÷ 8 = 19 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 0

19 ÷ 8 = 2 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 3

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Digital System Design

2 ÷ 8 = 0 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 2

The octal representation of integer part is (230)8

0.49 × 8 = 0.92 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 3

0.92 × 8 = 0.36 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 7

0.36 × 8 = 0.88 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 2

The octal representation of fractional part is (.372)8

∴ 152.49 10 = (230.372)8

Decimal-to-Hexadecimal Conversion:

The process of decimal-to-hexadecimal conversion is known as hex-dabble method. Since the

hexadecimal number system has a base of 16, the progressive division and multiplication
factor in this case is 16.

Example: Convert 1542.89 10 to hexadecimal number.

1542 ÷ 16 = 96 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 6

96 ÷ 16 = 6 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 0

6 ÷ 16 = 0 𝑤𝑖𝑡ℎ 𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟 6

The hexadecimal representation of integer part is (606)16

0.89 × 16 = 0.24 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 𝐸

0.24 × 16 = 0.84 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 3

0.84 × 16 = 0.44 𝑤𝑖𝑡ℎ 𝑐𝑎𝑟𝑟𝑦 𝐷

The hexadecimal representation of fractional part is (. 𝐸3𝐷)16

∴ 152.49 10 = (606. 𝐸3𝐷)16

Binary to Decimal Conversion:

A binary number is converted to a decimal number by expressing the number using positional
notation rule.

Example: 11.101 2 = (𝑋)10 , find 𝑋.

11.101 = 1 × 21 + 1 × 20 + 1 × 2−1 + 0 × 2−2 + 1 × 2−3 = 2 + 1 + 0.5 + 0.125 = 3.625

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Digital System Design

∴ 𝑋 = 3.625

Binary to Octal Conversion:

The octal number system contains 8 digits which can be expressed as a third power of the
base of binary system i.e., 2. Hence a binary number can be converted into an equivalent
octal number by splitting the integer and fractional parts into groups of three bits, starting
from the binary point on both sides. The 0s can be added to complete the outside groups if
needed.

Example: Convert 101001.001011 2 into octal number.

101001.001011 = 101 001 . 001 011 = 51.13

∴ The octal equivalent is (51.13)8

Binary to Hexadecimal Conversion:

The hexadecimal number system contains 16 digits which can be expressed as a fourth power
of the base of binary system i.e., 2. Hence a binary number can be converted into an
equivalent octal number by splitting the integer and fractional parts into groups of four bits,
starting from the binary point on both sides. The 0s can be added to complete the outside
groups if needed.

Example: Convert 101001.001011 2 into hexadecimal number.

101001.001011 = 0010 1001 . 0010 1100 = 29.2𝐶

∴ The hexadecimal equivalent is (29.2𝐶)16

Octal to Decimal Conversion:

An octal number is converted to a decimal number by expressing the number using positional
notation rule.

Example: 754.65 8 = (𝑋)10 , find 𝑋.

754.65 8 = 7 × 82 + 5 × 81 + 4 × 80 + 6 × 8−1 + 5 × 8−2 = 492.828

∴ 𝑋 = 492.828

Octal to Binary Conversion:

An octal number can be converted into its binary equivalent by replacing each octal digit with
its three-bit binary equivalent.

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Digital System Design

Example: Find the binary equivalent for 557.63 8 .

557.63 = 101101111.110011

Octal to Hexadecimal Conversion:

For octal to hexadecimal conversion, the octal number may first be converted into an
equivalent binary number and then the binary number transformed into its hex equivalent.

Example: Convert 557.63 8 into hexadecimal number.

557.63 = 101101111.110011 = 0001 0110 1111 . 1100 1100 = 16𝐹. 𝐶𝐶

∴ The hexadecimal equivalent is (16𝐹. 𝐶𝐶)16

Hexadecimal to Decimal Conversion:

A hexadecimal number is converted to a decimal number by expressing the number using

positional notation rule.

Example: Find the decimal equivalent for 3𝐶𝐷. 4𝐸 16 .

3𝐶𝐷. 4𝐸 16 = 3 × 162 + 𝐶 × 161 + 𝐷 × 160 + 4 × 16−1 + 𝐸 × 16−2 = 973.304

∴ The decimal equivalent is (973.304)10

Hexadecimal to Binary Conversion:

A hexadecimal number can be converted into its binary equivalent by replacing each digit
with its four-bit binary equivalent.

Example: Find the binary equivalent for 3𝐶𝐷. 4𝐸 16 .

3𝐶𝐷. 4𝐸 16 = 001111001101.01001110

Hexadecimal to Octal Conversion:

For hexadecimal–octal conversion, the given hex number is firstly converted into its binary
equivalent which is further converted into its octal equivalent.

Example: Find the octal equivalent for 3𝐶𝐷. 4𝐸 16 .

3𝐶𝐷. 4𝐸 16 = 001111001101.01001110 = 001 111 001 101 . 010 011 100

= 1715.234

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Digital System Design

∴ The octal equivalent is (1715.234)8

Representation of Negative numbers:

Signed magnitude Representation:

In this representation, a sign bit is used to represent the sign of the number; if sign bit is 0, the
number is positive and if the sign bit is 1, the number is negative. So in this form, the MSB
represents the sign bit and the remaining bits represent the magnitude. For example, -7 and
+5 is represented as 1111 and 0101 respectively. But it is not suitable for arithmetic
operations as it requires frequent conversion from signed magnitude to normal form.

Complements:

The method of complements is the efficient method for representing negative numbers which
eliminates the drawbacks of signed magnitude representation. There are two types of
complements namely r‟s and (r-1)‟s complement where r is the radix of the number system.

In binary number system, we have 1‟s and 2‟s complements. The 1‟s complement of an
unsigned binary number can be achieved by inverting each bit from 0 to 1 or 1 to 0.

Example: 1‟s complement of 1011011 is 0100100

2‟s complement is obtained just by adding 1 to 1‟s complement.

Example: 2‟s complement of 1011011 is 0100101

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Digital System Design

BINARY CODES

Digital circuits use binary signals but are required to handle data which may be alphabetic,
numeric, or special characters. Hence the signals available in some other form other than
binary have to be converted into suitable binary form before they can be processed further by
digital circuits. This means, in whatever format the information may be available it must be
converted into binary format. To achieve this, a process of coding is required where each
letter, special character, or numeral is coded in a unique combination of 0s and 1s using a
coding scheme known as code. In digital systems a variety of codes are used to serve
different purposes, such as data entry, arithmetic operation, error detection and correction,
etc. Selection of a particular code depends on the requirement. Even in a single digital system
a number of different codes may be used for different operations and it may even be
necessary to convert data from one type of code to another.

Codes can be broadly classified into five groups:

(i) Weighted Binary Codes (ii) Non-weighted Codes (iii) Error-detection Codes

(iv) Error-correcting Codes and (v) Alphanumeric Codes.

Weighted Codes:

If each position of a number represents a specific weight then the coding scheme is called
weighted binary code. In such coding the bits are multiplied by their corresponding individual
weight, and then the sum of these weighted bits gives the equivalent decimal digit.

Examples: Straight Binary code, Binary Coded Decimal code (BCD)

Straight Binary Code:

This code is used to represent numbers using natural binary form.

Example: Straight binary code for 17 is 10001

BCD Code:

It is difficult or time taking process to represent large numbers using straight binary code. A
BCD code is one in which the digits of a decimal number are encoded one at a time into
groups of four binary digits or bits. Hence decimal digits (0-9) are represented using 4 bits
each from 0000 to 1001. But using 4 bits 16 combinations are possible from 0000-1111.
Hence in BCD code, the combinations (1010-1111) are invalid. It is also known as 8421
code.

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Digital System Design

Example: BCD code for 214 is 001000010100

The disadvantage of BCD code is it is not suitable to perform subtraction using 9‟s
complement. This drawback can be avoided in Excess-3 code.

Non-weighted Codes:

Excess-3 Code:

The excess-3 code is another important BCD code which is used to overcome the problem of
8421 BCD code. The Excess-3 code can be formed by adding decimal 3 to the BCD code.

Decimal 8421 BCD code Excess-3 code

0 0000 0011

1 0001 0100

2 0010 0101

3 0011 0110

4 0100 0111

5 0101 1000

6 0110 1001

7 0111 1010

8 1000 1011

9 1001 1100

In Excess-3 code, the combinations 0000, 0001, 0010, 1101, 1110 and 1111 are invalid or
unused states. The complement of the excess-3 code of a given decimal number yields the
excess-3 code for 9‟s complement of the decimal number and hence the excess-3 code can be
used effectively for both addition and subtraction of decimal numbers, thus avoiding the
drawback of 8421 code. It is a self-complementing code. A code is said to be self-
complementing, if the code word of the 9‟s complement of 𝑁, can be obtained from the code
word of 𝑁 by interchanging all the 0s and 1s. In self-complementing codes, the sum of the
weights is equal to 9. The 2421, 5211, 642-3, 84-2-1 and Excess-3 codes are self-
complementing codes.

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Gray Code:

Gray Code is a unit distance code in which two successive values differ only by 1 bit. It is a
non-weighted code. The Gray code is used in applications where the normal sequence or
binary numbers may produce an error or ambiguity during the transition from one number to
the next. A typical application of the Gray code occurs when analog data are represented by
continuous change of a shaft position. The shaft is portioned into segments, and each segment
is assigned a number. If adjacent segments are made to correspond with the Gray code
sequence, ambiguity is eliminated when detection is sensed in the line that separates any two
segments. It is also known as reflective code or unit distance code or cyclic code. These
codes find great applications in Boolean function minimization using Karnaugh map.

Decimal Gray Decimal Gray

0 0000 8 1100

1 0001 9 1101

2 0011 10 1111

3 0010 11 1110

4 0110 12 1010

5 0111 13 1011

6 0101 14 1001

7 0100 15 1000

Error detecting Codes:

Binary information may be transmitted through some form of communication medium such
as wires or radio waves or fiber optic cables, etc. Any external noise introduced into a
physical communication medium changes bit values from 0 to 1 or vice versa. An error
detection code can be used to detect errors during transmission.

Parity: A parity bit is an extra bit included with a message to make the total number of 1s
either odd or even. In an odd parity, P is chosen so that the sum of all 1s is odd (including the
parity bit). In an even parity, P is chosen so that the sum of all 1s is even (including the parity
bit). In the sending end, the message (in this case the first four bits) is applied to a “parity
generation” circuit where the required P bit is generated. The message, including the parity
bit, is transferred to its destination. In the receiving end, all the incoming bits (in this case

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Digital System Design

five) are applied to a “parity check” circuit to check the proper parity adopted. An error is
detected if the checked parity does not correspond to the adopted one. The parity method
detects the presence of one, three, five, or any odd combination of errors. An even
combination of errors is undetectable since an even number of errors will not change the
parity of the bits. This is an error detecting code and it cannot correct the errors.

Message P (odd) P (even)

0000 1 0

0001 0 1

0010 0 1

0011 1 0

0100 0 1

0101 1 0

0110 1 0

0111 0 1

1000 0 1

1001 1 0

1010 1 0

1011 0 1

1100 1 0

1101 0 1

1110 0 1

1111 1 0

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Digital System Design

BOOLEAN ALGEBRA & LOGIC GATES

Logic gates are electronic circuits that can be used to implement the most elementary logic
expressions, also known as Boolean expressions. The logic gate is the most basic building
block of combinational logic. There are three basic logic gates, namely the OR gate, the AND
gate and the NOT gate. Other logic gates that are derived from these basic gates are the
NAND gate, the NOR gate, the EXCLUSIVEOR gate and the EXCLUSIVE-NOR gate. This
chapter deals with logic gates and implementations using NAND and NOR gates followed by
simplification of Boolean functions using Boolean Laws and theorems and using K-maps.

Positive and Negative Logic

The binary variables can have either of the two states, i.e. the logic „0‟ state or the logic „1‟
state. These logic states in digital systems such as computers, for instance, are represented by
two different voltage levels or two different current levels. If the more positive of the two
voltage or current levels represents a logic „1‟ and the less positive of the two levels
represents a logic „0‟, then the logic system is referred to as a positive logic system. If the
more positive of the two voltage or current levels represents a logic „0‟ and the less positive
of the two levels represents a logic „1‟, then the logic system is referred to as a negative logic
system.

If the two voltage levels are 0 V and +5 V, then in the positive logic system the 0 V
represents logic „0‟ and the +5 V represents logic „1‟. In the negative logic system, 0 V
represents logic „1‟ and 5 V represents logic „0‟.If the two voltage levels are 0 V and −5 V,
then in the positive logic system the 0 V represents a logic „1‟ and the −5 V represents a logic
„0‟. In the negative logic system, 0 V represents logic „0‟and −5 V represents logic „1‟.

Logic Gates

The logic gate is the most basic building block of any digital system, including computers.
Each one of the basic logic gates is a piece of hardware or an electronic circuit that can be
used to implement some basic logic expression. While laws of Boolean algebra could be used
to do manipulation with binary variables and simplify logic expressions, these are actually
implemented in a digital system with the help of electronic circuits called logic gates. The
three basic logic gates are the OR gate, the AND gate and the NOT gate.

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OR Gate

A logic gate used to perform the operation of logical addition is called an OR gate. An OR
gate performs an ORing operation on two or more than two logic variables. The OR operation
on two independent logic variables A and B is written as Y = A+B and reads as Y equals A
OR B. An OR gate is a logic circuit with two or more inputs and one output. The output of an
OR gate is LOW only when all of its inputs are LOW. For all other possible input
combinations, the output is HIGH.A truth table lists all possible combinations of input binary
variables and the corresponding outputs ofa logic system. Figure shows the circuit symbol
and the truth table of a two-input OR gate. The operation of a two-input OR gate is explained
by the logic expression

Y = A+B

Two input OR Gate

AND Gate

A logic gate used to perform logical multiplication is known as AND gate. An AND gate is a
logic circuit having two or more inputs and one output. The output of an AND gate is HIGH
only when all of its inputs are in the HIGH state. In all other cases, the output is LOW. The
logic symbol and truth table of a two-input AND gate is shown in figure. The AND operation
on two independent logic variables A and B is written as Y = A.B and reads as Y equals A
AND B. The operation of a two-input AND gate is explained by the logic expression

Y = A.B

Two input AND Gate

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NOT Gate

A logic gate used to perform logical inversion is known as a NOT gate. A NOT gate is a one
-input, one-output logic circuit whose output is always the complement of the input. That is, a
LOW input produces a HIGH output, and vice versa. If 𝑋 is the input to a NOT circuit, then
its output Y is given by Y = 𝑋 or 𝑋′and reads as Y equals NOT𝑋.The logic symbol and truth
table of a NOT gate is shown in figure. The operation of a NOT gate is explained by the logic
expression

Y=𝑋

NOT Gate

NAND Gate

NAND stands for NOT AND. An AND gate followed by a NOT circuit makes it a NAND
gate. The output of a NAND gate is logic „0‟ when all its inputs are logic „1‟. For all other
input combinations, the output is logic „1‟. The symbol and truth table of a NAND gate is as
shown. NAND gate operation is logically expressed as

𝑌 = 𝐴𝐵

Two input NAND Gate

NAND Gate is known as Universal gate as it can be used alone to implement any gate
operation. Hence it is said to be functionally complete.

NOR Gate

NOR stands for NOT OR. An OR gate followed by a NOT circuit makes it a NOR gate. The
output of a NOR gate is logic „1‟ when all its inputs are logic „0‟. For all other input
combinations, the output is logic „0‟. The symbol and truth table of a NOR gate is as shown.
The output of a two-input NOR gate is logically expressed as

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𝑌 = (𝐴 + 𝐵)

Two input NOR Gate

NOR gate is also known as Universal gate as it is used alone to implement any gate operation
and hence it is also functionally complete.

EXCLUSIVE-OR Gate

The EXCLUSIVE-OR gate, commonly written as EX-OR gate, is a two-input, one-output

gate. The output of an EX-OR gate is logic „1‟ when the inputs are unlike and logic „0‟ when
the inputs are like. Although EX-OR gates are available in integrated circuit form only as
two-input gates, unlike other gates which are available in multiple inputs also, multiple-
inputEX-OR logic functions can be implemented using more than one two-input gates. The
output of a multiple-input EX-OR logic function is logic „1‟ when the number of 1s in the
input sequence is odd and logic „0‟ when the number of 1s in the input sequence is even,
including zero. The symbol and truth table of an EX-OR gate is shown in figure. The output
of a two-input EX-OR gate is logically expressed as

𝑌 = 𝐴 ⊕ 𝐵 = 𝐴′ 𝐵 + 𝐴𝐵′

Two input EX-OR Gate

EXCLUSIVE-NOR Gate

EXCLUSIVE-NOR (commonly written as EX-NOR) means NOT of EX-OR, i.e. the logic
gate thatwe get by complementing the output of an EX-OR gate. The truth table of an EX-
NOR gate is obtained from the truth table of an EX-OR gate by complementing the output
entries as shown in figure. Logically,

𝑌 = 𝐴 ⊕ 𝐵 = 𝐴′ 𝐵 ′ + 𝐴𝐵

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Two input EX-NOR Gate

The output of a two-input EX-NOR gate is logic „1‟ when the inputs are like and logic
„0‟when they are unlike. In general, the output of a multiple-input EX-NOR logic function is
logic„0‟ when the number of 1s in the input sequence is odd and a logic „1‟ when the number
of 1s in the input sequence is even including zero.

Boolean algebra:

Boolean algebra is an algebraic structure defined on a set of elements B together with two
binary operators + and · provided the following postulates are satisfied:

1. a) Closure with respect to the operator +.

b) Closure with respect to the operator ·.

2. a) An identity element with respect to +, designated by 0: 𝑥 + 0 = 0 + 𝑥 = 𝑥.

b) An identity element with respect to ·, designated by 1:𝑥 ∙ 1 = 1 ∙ 𝑥 = 𝑥.

3. a) Commutative with respect to +: 𝑥 + 𝑦 = 𝑦 + 𝑥.

b) Commutative with respect to ·: 𝑥 ∙ 𝑦 = 𝑦 ∙ 𝑥.

4. a) · is distributive over +: 𝑥 ∙ 𝑦 + 𝑧 = 𝑥 ∙ 𝑦 + 𝑥 ∙ 𝑧 .

b) + is distributive over ·: 𝑥 + 𝑦 ∙ 𝑧 = 𝑥 + 𝑦 ∙ 𝑥 + 𝑧 .

5. For every element 𝑥 ∈ 𝐵, there exists an element 𝑥 ′ ∈ 𝐵 (complement of 𝑥 ) such that

𝑥 + 𝑥 ′ = 1 and 𝑥 ∙ 𝑥 ′ = 0.

Boolean Laws & Theorems:

Duality Principle:

It states that every algebraic expression deducible from the postulates of Boolean algebra
remains valid if the operators and identity elements are interchanged. If the dual of an
algebraic expression is desired, OR and AND operators are interchanged and 1‟s are replaced
by 0‟s and 0‟s by 1‟s.

1. 𝑎) 𝑥 + 0 = 𝑥 𝑏) 𝑥 ∙ 1 = 𝑥

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2. 𝑎) 𝑥 + 𝑥 ′ = 1 𝑏) 𝑥 ∙ 𝑥 ′ = 0

3. 𝑎) 𝑥 + 𝑥 = 𝑥 𝑏) 𝑥 ∙ 𝑥 = 𝑥

4. 𝑎) 𝑥 + 1 = 1 𝑏) 𝑥 ∙ 0 = 0
′
5. DeMorgan‟s Theorem: 𝑎) 𝑥 + 𝑦 = 𝑥′ 𝑦′ 𝑏) 𝑥𝑦 ′
= 𝑥 ′ + 𝑦′

6. Absorption Theorem: 𝑎) 𝑥 + 𝑥𝑦 = 𝑥 𝑏) 𝑥 𝑥 + 𝑦 = 𝑥

Simplification using Boolean Laws & Theorems:

The Boolean functions can be simplified by using appropriate Boolean laws and theorems.

Examples:

Simplify the following functions using Boolean laws and theorems:

1. 𝐹 = 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶 ′ 𝐷′ + 𝐴𝐵𝐶𝐷′ + 𝐴𝐵𝐶 ′ 𝐷 + 𝐴𝐵𝐶𝐷𝐸 + 𝐴𝐵𝐶 ′ 𝐷′ 𝐸 ′ + 𝐴𝐵𝐶′𝐷𝐸

Sol: 𝐹 = 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶 ′ 𝐷′ + 𝐴𝐵𝐶𝐷′ + 𝐴𝐵𝐶 ′ 𝐷 + 𝐴𝐵𝐶𝐷𝐸 + 𝐴𝐵𝐶 ′ 𝐷′ 𝐸 ′ + 𝐴𝐵𝐶′𝐷𝐸

= 𝐴𝐵𝐶 𝐷 + 𝐷′ + 𝐴𝐵𝐶 ′ 𝐷 + 𝐷′ + 𝐴𝐵𝐷𝐸 𝐶 + 𝐶 ′ + 𝐴𝐵𝐶 ′ 𝐷′ 𝐸 ′

= 𝐴𝐵 𝐶 + 𝐶 ′ + 𝐴𝐵𝐷𝐸 + 𝐴𝐵𝐶 ′ 𝐷′ 𝐸 ′ = 𝐴𝐵 1 + 𝐷𝐸 + 𝐶 ′ 𝐷′ 𝐸 ′ = 𝐴𝐵

2. 𝐹 = 𝑥𝑦 + 𝑥 ′ 𝑧 + 𝑦𝑧

Sol: 𝐹 = 𝑥𝑦 + 𝑥 ′ 𝑧 + 𝑦𝑧

= 𝑥𝑦 + 𝑥 ′ 𝑧 + 𝑦𝑧 𝑥 + 𝑥 ′ = 𝑥𝑦 1 + 𝑧 + 𝑥 ′ 𝑧 1 + 𝑦 = 𝑥𝑦 + 𝑥′𝑧

3. 𝐹 = 𝐴𝐵𝐶 + 𝐴′ 𝐵 ′ 𝐶 + 𝐴′ 𝐵𝐶 + 𝐴𝐵𝐶 ′ + 𝐴′𝐵′𝐶′

Sol: 𝐹 = 𝐴𝐵𝐶 + 𝐴′ 𝐵 ′ 𝐶 + 𝐴′ 𝐵𝐶 + 𝐴𝐵𝐶 ′ + 𝐴′𝐵′𝐶′

= 𝐵𝐶 + 𝐴′ 𝐵 ′ + 𝐴𝐵𝐶 ′ = 𝐵 𝐶 + 𝐴𝐶 ′ + 𝐴′ 𝐵 ′ = 𝐴𝐵 + 𝐵𝐶 + 𝐴′𝐵′

Universal Gates

OR, AND and NOT gates are the three basic logic gates as they together can be used to
construct the logic circuit for any given Boolean expression. NOR and NAND gates have the
property that they individually can be used to hardware-implement a logic circuit
corresponding to any given Boolean expression. That is, it is possible to use either only
NAND gates or only NOR gates to implement any Boolean expression. This is so because a
combination of NAND gates or a combination of NOR gates can be used to perform

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functions of any of the basic logic gates. It is for this reason that NAND and NOR gates are
universal gates.

Implementation of gates using NAND gates

a) NOT gate:

b) AND gate:

c) OR gate:

d) NOR gate:

e) Ex-OR gate:

f) Ex-NOR gate:

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Implementation of gates using NOR gates

a) NOT gate:

b) AND gate:

c) OR gate:

d) NAND gate:

e) Ex-OR gate:

f) Ex-NOR gate:

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Boolean Expressions:

A Boolean expression or a function is an expression which consists of binary variables joined

by the Boolean connectives AND and OR along with NOT operation.

Any Boolean expression can be expressed in two forms:

a) Canonical form

b) Standard form

Canonical Form:

An expanded form of Boolean expression, where each term contains all Boolean variables in
their true or complemented form, is known as the canonical form of the expression.

a) Sum of minterms: Any Boolean function can be expressed as a sum of minterms

expression. A minterm is a standard product which consists of all variables in either
complemented or un-complemented form for which the output is 1. For example,
𝑌 = 𝐴′ 𝐵𝐶 + 𝐴𝐵 ′ 𝐶 ′ + 𝐴𝐵𝐶
= 𝑚(3,4,7)
is a sum of minterms expression with three variables.

b) Product of maxterms: Any Boolean function can be expressed as a product of

maxterms expression. A maxterm is a standard sum which consists of all variables in
either complemented or un-complemented form for which the output is 0. For
example,

𝑌 = 𝐴′ + 𝐵 ′ + 𝐶 𝐴 + 𝐵 + 𝐶 ′ 𝐴 + 𝐵 + 𝐶

= 𝑀 (0,1,6)

is a product of maxterms expression with three variables.

Standard Form:

A simplified form of a Boolean expression which may consist of one or more number of
variables in each term in either complemented or un-complemented form, is known as
Standard form of the expression.

a) Sum of Products (SOP): The sum of products is a Boolean expression containing

AND terms, called Product terms, of one or more literals each; the sum denotes the
ORing of these terms. For example,

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𝑌 = 𝐴′ 𝐵 + 𝐵𝐶 ′ + 𝐴𝐶
is a SOP expression with three variables.
b) Product of Sums (POS): It is a Boolean expression containing OR terms called Sum
terms and the product denotes the ANDing of these terms.
𝑌 = 𝐴 𝐴 + 𝐵′ 𝐵 + 𝐶 ′
is a POS expression with three variables.

** Canonical form is obtained when a function is taken from a truth table. When

implementing a Boolean function with gates, standard form is preferred.

Simplification of Boolean expressions:

The primary objective of all simplification procedures is to obtain an expression that has the
minimum number of terms. Obtaining an expression with the minimum number of literals is
usually the secondary objective. The Boolean functions can be simplified by using

a) Boolean Laws and theorems

b) K maps

Simplification using K-maps:

A Karnaugh map is a graphical representation of the logic system. It can be drawn directly
from either minterm (sum-of-products) or maxterm (product-of-sums) Boolean expressions.
Drawing a Karnaugh map from the truth table involves an additional step of writing the
minterm or maxterm expression depending upon whether it is desired to have a minimized
sum-of-products or a minimized product of sums expression.

An n-variable Karnaugh map has 2nsquares, and each possible input is allotted a square. In
the case of a minterm Karnaugh map, „1‟ is placed in all those squares for which the output is
„1‟, and „0‟ is placed in all those squares for which the output is „0‟. 0s are omitted for
simplicity. An „X‟ is placed in squares corresponding to „don‟t care‟ conditions.

a) Two Variable K-map:

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i) Sum of minterms representation ii) Product of maxterms representation

b) Three Variable K-map:

i)
Sum of minterms representation ii) Product of maxterms representation

c) Four Variable K-map:

i) Sum of minterms representation ii) Product of maxterms representation

d) Five Variable K-map:

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Simplification Algorithm:

Simplification of logical functions using K-maps is based on the principle of combining

terms in adjacent cells. Two cells are said to be adjacent if they differ in only one variable.

1. Identify the ones which cannot be combined with any other ones and encircle them.
These are called essential prime implicants.

2. Identify the ones that can be combined in groups of two in only one way. Encircle
them.

3. Identify the ones that can be combined with three other ones, to make a group of four
adjacent ones, in only one way. Encircle such group of ones.

4. Identify the ones that can be combined with seven other ones, to make a group of
eight adjacent ones, in only one way. Encircle them.

5. After identifying the essential groups of 2, 4, and 8 ones, if there still remain some
ones which have not been encircled, then these are to be combined with each other or
with other already encircled ones.

Examples:

1. Simplify the Boolean function 𝐹 = 𝐴′ 𝐶 + 𝐴′ 𝐵 + 𝐴𝐵 ′ 𝐶 + 𝐵𝐶

Sol: 𝐹 = 𝐴′ 𝐶 + 𝐴′ 𝐵 + 𝐴𝐵 ′ 𝐶 + 𝐵𝐶 = 𝐴′ 𝐵 ′ 𝐶 + 𝐴′ 𝐵𝐶 ′ + 𝐴′ 𝐵𝐶 + 𝐴𝐵 ′ 𝐶 + 𝐴𝐵′𝐶

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𝐹 = 𝐶 + 𝐴′𝐵

2. 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝑚 (0, 1, 2, 3, 5, 7, 8, 9, 11, 14)

𝐹 = 𝐴′ 𝐵 ′ + 𝐴′ 𝐷 + 𝐴𝐵𝐶𝐷′ + 𝐵 ′ 𝐶 ′ + 𝐵′𝐷
3. 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝑚 (1, 2, 3, 5, 7, 8, 9, 10, 13)

𝐹 = 𝐴′ 𝐶𝐷 + 𝐴𝐶 ′ 𝐷 + 𝐴𝐵 ′ 𝐷′ + 𝐴′ 𝐵 ′ 𝐷 + 𝐴′𝐵′𝐶

4. 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝑀 (0, 1, 2, 3, 4, 10, 11)

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𝐹 = 𝐴 + 𝐵 𝐴 + 𝐶 + 𝐷 (𝐵 + 𝐶 ′ )

5. 𝐹 = 𝑚 1, 2,3, 5, 13 + 𝑑 (6, 7, 8, 9, 11, 15)

𝐹 = 𝐷 + 𝐴′𝐶

6. 𝐹 = 𝑚 0, 2, 4, 9, 12, 15 + ∅(1, 5, 7, 10)

𝐹 = 𝐴′ 𝐵 ′ 𝐷′ + 𝐵𝐶𝐷 + 𝐵𝐶 ′ 𝐷′ + 𝐵′𝐶′𝐷

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Two level Implementation:

Any logic circuit can be implemented in two levels by representing the Boolean function
either in SOP or POS form. Two level NAND and NOR circuits can be obtained by
representing the expression in SOP and POS form respectively. Minimum propagation delay
will be obtained by using two level implementation. But as the number of terms increases, the
number of inputs increases for the second level gate.

NAND Implementation:

By expressing the given function in SOP form, the logic circuit can be implemented using
two level NAND gates.

Example:

Implement 𝑌 = 𝐴 𝐴′ + 𝐵′ + 𝐵𝐶 ′ + 𝐴𝐶 using NAND gates.

Sol: 𝑌 = 𝐴 𝐴′ + 𝐵′ + 𝐵𝐶 ′ + 𝐴𝐶

= 𝐴𝐵′ + 𝐵𝐶 ′ + 𝐴𝐶 ----- SOP form

By using double complements we get,

𝑌 = 𝑌′ ′
= 𝐴𝐵′ + 𝐵𝐶 ′ + 𝐴𝐶 ′ ′
= 𝐴𝐵′ ′
𝐵𝐶 ′ ′ (𝐴𝐶)′

NOR Implementation:

By expressing the given function in POS form, the logic circuit can be implemented using
two level NOR gates.

Example:

Implement 𝑌 = 𝐴′ 𝐵 + 𝐵𝐶 ′ using NOR gates.

Sol: 𝑌 = 𝐴′ 𝐵 + 𝐵𝐶 ′

= 𝐴′ 𝐵 + 𝐵 𝐴′ 𝐵 + 𝐶 ′ ……. Distributive law

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𝑌 = 𝐵 𝐴′ + 𝐵 𝐴′ + 𝐶 ′ (𝐵 + 𝐶 ′ ) ……. Distributive law

and the expression is in POS form.

𝑌 = 𝑌′ ′
= 𝐵 𝐴′ + 𝐵 𝐴′ + 𝐶 ′ 𝐵 + 𝐶 ′ ′ ′
= [ 𝐵 ′ + 𝐴′ + 𝐵 ′ + 𝐴′ + 𝐶 ′ ′
+
(𝐵 + 𝐶 ′ )′]′

Multilevel Implementation:

Multi level NAND or NOR implementation of a Boolean circuit can be achieved by replacing
each gate in the circuit with the NAND or NOR equivalent circuits respectively. With this
type of implementation, very large propagation delay is achieved and only two input gates are
required.

NAND Implementation:

By replacing each gate in the circuit with the NAND equivalent, multi level NAND circuit is
achieved. When two single input NAND gates (inverters) are in series, they can be removed.

Example: 𝑌 = 𝐴 𝐵 + 𝐶𝐷 + 𝐵𝐶′

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NOR Implementation:

By replacing each gate in the circuit with the NOR equivalent, multi level NOR circuit is
achieved. When two single input NOR gates (inverters) are in series, they can be removed.

Example: 𝑌 = 𝐴 𝐵 + 𝐶𝐷 + 𝐵𝐶′

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