C.S.I.

THOOTHUKUDI - NAZARETH DIOCESE

JAYARAJ ANNAPACKIAM C.S.I. COLLEGE OF ENGINEERING

(Approved by AICTE, New Delhi & Affiliated to Anna University)

MARGOSCHIS NAGAR, NAZARETH – 628 617

Register Number :

Certified that this is the bonafide record of work done by Selvan/ Selvi
___________________________________________________________________________
of 05 Semester Electronics and Communication Engineering branch for the lab
CEC339 / FUNDAMENTALS OF NANOELECTRONICS during the year 2023-2024.

Staff In-charge H. O.D

Submitted for the university practical Examination held on _________________

Internal Examiner External Examiner

 INDEX

S.NO DATE EXPERIMENT TITLE MARKS SIGN

(10)
1 Field Effect Transistors

2 Single Electron Transistors

3 Tunneling devices
Ex. No: 1 Field Effect Transistors
Date:

Aim:

To simulate Field Effect Transistor (MOSFET) using ATLAS Silvaco TCAD.

Software used:

Silvaco Version 4.6.2.R – Deckbuild, Tonyplot

Procedure:

1. Open Deckbuild
2. Type the program in the Deck window.
3. Run simulation.
4. Open .str file in the output window and view the device structure.
5. Open .log file in the output window and plot the waveform using Tonyplot.

Theory:

The field-effect transistor (FET) is a type of transistor that uses an electric field to
control the flow of current in a semiconductor. It comes in two types: junction-gate FET
(JFET) and metal-oxide-semiconductor FET (MOSFET). FETs have three terminals: source,
gate, and drain. FETs control the flow of current by the application of a voltage to the gate,
which in turn alters the conductivity between the drain and source.

FETs are also known as unipolar transistors since they involve single-carrier-type
operation. That is, FETs use either electrons (n-channel) or holes (p-channel) as charge
carriers in their operation, but not both. Many different types of field effect transistors exist.
Field effect transistors generally display very high input impedance at low frequencies. The
most widely used field-effect transistor is the MOSFET (metal–oxide–semiconductor field-
effect transistor).

Program:

# (c) Silvaco Inc., 2019

go atlas
TITLE MOSFET
mesh space.mult=1

x.m l=0.0 spac=0.1

x.m l=1.5 spac=0.05
x.m l=6.5 spac=0.05
x.m l=8 spac=0.1

y.m l=0 spac=0.1

y.m l=0.2 spac=0.05
y.m l=0.45 spac=0.05
y.m l=4.2 spac=0.1

region num=1 material=air

region num=2 silicon x.min=0 x.max=8 y.min=0.2 y.max=4.2

region num=3 silicon x.min=0.6 x.max=1.6 y.min=0.2 y.max=0.45

region num=4 silicon x.min=6.4 x.max=7.4 y.min=0.2 y.max=0.45

region num=5 sio2 x.min=1.5 x.max=6.5 y.min=0.1 y.max=0.2

electrode num=1 name=source x.min=0.85 x.max=1.35 y.min=0.1 y.max=0.2

electrode num=2 name=drain x.min=6.65 x.max=7.15 y.min=0.1 y.max=0.2
electrode num=3 name=bulk x.min=0 x.max=8 y.min=4.2 y.max=4.2
electrode num=4 name=gate x.min=1.5 x.max=6.5 y.min=0 y.max=0.1

contact name= gate ALUMINUM

doping region=2 p.type uniform conc=1.0E15 x.min=0 x.max=8 y.min=0.2 y.max=4.2

doping region=3 n.type uniform conc=1.0E22 x.min=0.6 x.max=1.6 y.min=0.2 y.max=0.45
doping region=4 n.type uniform conc=1.0E22 x.min=6.4 x.max=7.4 y.min=0.2 y.max=0.45

model bipolar FLDMOB

method newton

solve init

save outf=transistor0.str

log outf=transistor1.log

solve v1=0 v3=0 v4=0 v2=0 vstep=0.5 vfinal=10 name=drain

log off

save outf=transistor1.str
solve init

log outf=transistor2.log

solve v1=0 v3=0 v4=1 v2=0 vstep=0.5 vfinal=10 name=drain

log off

save outf=transistor2.str
solve init

log outf=transistor3.log

solve v1=0 v3=0 v4=2 v2=0 vstep=0.5 vfinal=10 name=drain

log off

save outf=transistor3.str
solve init

log outf=transistor4.log

solve v1=0 v3=0 v4=3 v2=0 vstep=0.5 vfinal=10 name=drain

log off

save outf=transistor4.str
solve init

log outf=transistor5.log

solve v1=0 v3=0 v4=4 v2=0 vstep=0.5 vfinal=10 name=drain

log off

save outf=transistor5.str
solve init

quit

Device Structure:
Output Waveform:

Result:

FET was designed using Silvaco ATLAS and the output waveform was viewed using
TONYPLOT.
Ex. No: 2 Single Electron Transistors
Date:

Aim:

To simulate Single Electron Transistor (SET) using ATLAS Silvaco TCAD.

Software used:

Silvaco Version 4.6.2.R – Deckbuild, Tonyplot

Procedure:

1. Open Deckbuild
2. Type the program in the Deck window.
3. Run simulation.
4. Open .str file in the output window and view the device structure.
5. Open .log file in the output window and plot the waveform using Tonyplot.

Theory:

Solid state quantum effect devices exploit the benefits of quantum effects. An
essential common feature of all these devices is a small island confining the conductive
charge in the form of electrons. This island is analogous to the channel of a MOSFET. These
devices based on electron confinement are bifurcated into two categories: Single electron and
Quantum dots. The composition and device dimensions of islands give the device its
distinctive properties. Strategically controlling these parameters allows the device designer to
flexibly employ quantum effects in a variety of styles to manage passage of electrons on to
and off to the islands.

The Single Electron Transistors (SET) is a unique type of switching device that
follows the phenomenon of regulated electron tunneling in order to amplify the current. A
nano device can transfers a single electron at a time. The transfer of electrons is governed by
Coulomb interaction and occurs on a minute conductive layer termed as island. SETs are
considered to be the elements of the future. SETs will be used to produce highly dense and
low powered integrated circuits, which will be able to detect the motion of individual
electrons. During the discovery of single electronic tunneling and coulomb blockade
mechanism, many researchers predicted that on shrinking the dimensions of quantum dots to
nanometer range it is quite possible to manufacture applicable SETs. SET is a three-terminal
Single Electron Device (SED) which offers low power consumption and high Operating
speed. In addition, as the size reaches to nano, quantum mechanical effects are came into
action, which makes SETs to work more efficiently.
Program:

go atlas

mesh three.d

x.m l=0.0 s=0.002

x.m l=0.05 s=0.002

y.m l=-0.01 s=0.001

y.m l=-0.004 s=0.0003
y.m l= 0.003 s=0.0003
y.m l= 0.004 s=0.0005
y.m l= 0.005 s=0.0005
y.m l= 0.006 s=0.0005

z.m l= -0.006 s=0.0005

z.m l= -0.005 s=0.0005
z.m l= -0.004 s=0.0005
z.m l=-0.003 s=0.0003
z.m l= 0.003 s=0.0003
z.m l= 0.004 s=0.0005
z.m l= 0.005 s=0.0005
z.m l= 0.006 s=0.0005

region num=3 material=air

region num=2 sio2 x.min=0.01 x.max=0.04 y.min=-0.004 y.max=0.004 z.min=-0.004
z.max=0.004
region num=2 sio2 x.min=0.0 x.max=0.05 z.min=-0.006 z.max=0.006 y.min=-0.01 y.max=-
0.004
region num=1 silicon x.min=0.0 x.max=0.05 y.min=-0.004 y.max=0.003 z.min=-0.003
z.max=0.003

electrode num=2 name= source x.max=0 y.min=-0.004 y.max=0.004 z.min=-0.004

z.max=0.004
electrode num=3 name= drain x.min=0.05 y.min=-0.004 y.max=0.004 z.min=-0.004
z.max=0.004

electrode num=1 name= gate x.min=0.01 x.max=0.04 z.min=-0.006 z.max=-0.004 y.min=-0.004

y.max=0.006
electrode num=1 name= gate x.min=0.01 x.max=0.04 z.min= 0.004 z.max= 0.006 y.min=-0.004
y.max=0.006
electrode num=1 name= gate x.min=0.01 x.max=0.04 y.min= 0.004 y.max= 0.006 z.min=-0.006
z.max=0.006

contact name= source reflect

contact name= drain reflect
contact name= gate workfun=4.8

doping region=1 n.type uniform conc=1.0E20 x.min=0.0 x.max=0.01

doping region=1 n.type uniform conc=1.0E20 x.min=0.04 x.max=0.05

spx.m l=0.0 s=0.0002

spx.m l=0.05 s=0.0002

spy.m l=-0.01 s=0.001

spy.m l=-0.004 s=0.0003
spy.m l= 0.003 s=0.0003
spy.m l= 0.004 s=0.0003
spy.m l= 0.005 s=0.0005
spy.m l= 0.006 s=0.0005

spz.m l= -0.006 s=0.0005

spz.m l= -0.005 s=0.0005
spz.m l= -0.004 s=0.0005
spz.m l=-0.003 s=0.0003
spz.m l= 0.003 s=0.0003
spz.m l= 0.004 s=0.0005
spz.m l= 0.005 s=0.0005
spz.m l= 0.006 s=0.0005

output band.par con.band val.band eigens=8 impact

models schrodinger ^p.schro negf_ms ^Ox.Schro sp.fast sp.geom=2dyz

method carriers=0

solve init

solve v3=1.0
save outf=quantumex16_negf_vg00_vd10.str negf.log

log outf=quantumex16_negf_IVg_vd10.log
solve v3=1.0 v1=0.0 vstep=0.05 vfinal=1.2 name=gate
log off
save outf=quantumex16_negf_vg12_vd10.str negf.log

quit
Device Structure:

Output Waveform:

Result:
SET was designed using Silvaco ATLAS and the output waveform was viewed using
TONYPLOT.
Ex. No: 3 Tunneling devices
Date:

Aim:

To simulate Tunneling Diode using ATLAS Silvaco TCAD.

Software used:

Silvaco Version 4.6.2.R – Deckbuild, Tonyplot

Procedure:

1. Open Deckbuild
2. Type the program in the Deck window.
3. Run simulation.
4. Open .str file in the output window and view the device structure.
5. Open .log file in the output window and plot the waveform using Tonyplot.

Theory:

Tunnel diodes are one of the most significant solid-state electronic devices which
have made their appearance in the last decade. Tunnel diode was invented in 1958 by Leo
Esaki. Leo Esaki observed that if a semiconductor diode is heavily doped with impurities, it
will exhibit negative resistance. Negative resistance means the current across the tunnel diode
decreases when the voltage increases. In 1973 Leo Esaki received the Nobel Prize in physics
for discovering the electron tunneling effect used in these diodes.

A tunnel diode is also known as Esaki diode which is named after Leo Esaki for his
work on the tunneling effect. The operation of tunnel diode depends on the quantum
mechanics principle known as “Tunneling”. In electronics, tunneling means a direct flow of
electrons across the small depletion region from n-side conduction band into the p-side
valence band.

The germanium material is commonly used to make the tunnel diodes. They are also
made from other types of materials such as gallium arsenide, gallium antimonide, and silicon.

Program:

go atlas
mesh width=1e7
#x-mesh
x.mesh loc=0 spac=1
x.mesh loc=10 spac=1

y.mesh loc=0.0 spac=0.01

y.mesh loc=0.25 spac=0.001
y.mesh loc=0.75 spac=0.001
y.mesh loc=1.0 spac=0.01
region num=1 material=InGaP x.min=0 x.max=10 y.min=0.5 y.max=1
region num=2 material=InGaP x.min=0 x.max=10 y.min=0 y.max=0.5

elec name=anode top

elec name=cathode bottom

doping uniform p.type conc=2e20 y.max=0.5

doping uniform n.type conc=2e19 y.min=0.5

qtx.mesh loc=0 spac=1

qtx.mesh loc=10 spac=1
qty.mesh loc=0.35 spac=0.01
qty.mesh loc=0.5 spac=0.0005
qty.mesh loc=0.65 spac=0.01

models temperature=300 srh fermi ni.fermi print \

qtunn.dir=0 bbt.nonlocal bbt.forward bbt.nlderivs
output band.temp traps u.srh taurn taurp band.param con.band val.band \
qfn qfp
log outfile=tjInGaP.str
solve init
save outfile=tjInGaP.str
tonyplot tjInGaP.str
method climit=1.0 dvmax=0.05
solve init
solve prev
log outfile=tjInGaP.log

solve name=anode vanode =-1 vstep=0.1 vfinal=0.0

solve name=anode vanode =0.0 vstep=0.01 vfinal=0.2
solve name=anode vanode =0.2 vstep=0.1 vfinal=1.1
tonyplot tjInGaP.log

save outfile=tjInGaP.str
tonyplot tjInGaP.str

quit

Device Structure:
Output Waveform:

Result:

Tunneling Diode was designed using Silvaco ATLAS and the output waveform was
viewed using TONYPLOT.