SAVEETHA ENGINEERING COLLEGE (AUTONOMOUS)

ELECTRONICS AND COMMUNICATION ENGINEERING

REGULATION 2019
II YEAR/IV SEMESTER

19EC405
LINEAR INTEGRATED CIRCUITS LABORATORY
LAB MANUAL

PREPARED BY

HEMA MALINI.A- AP (SG)/ECE

ARCHANA.T – AP (SG)/ECE

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DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

VISION
To develop the department in to a State of Art, with Centre of Excellence in Electronics and
Communication Engineering education, on par with global standards.
MISSION
M1- To provide education to students to enable them to compete internationally, produce creative
solutions to the society's needs.
M2- To make students conscious to the universal moral values, adherent to the professional ethical
M3- To generate and disseminate knowledge and technologies essentials to meet the local and global
needs in the fields of Electronics and Communication Engineering.

PROGRAMME EDUCATIONAL OBJECTIVES (PEOs)

1. To prepare students for successful careers in industry that meet the needs of Indian and
multinational companies.
2. To develop the ability among students to synthesize data and technical concepts for application to
product design.
3. To provide opportunity for students to work as part of teams on multidisciplinary projects
4. To provide students with a sound foundation in the mathematical, scientific and engineering
fundamentals necessary to formulate, solve and analyze engineering problems and to prepare them
for graduate studies.
5. To promote student awareness of the life-long learning and to introduce them to professional
ethics and codes of professional practice.

PROGRAMME OUTCOMES (POs)

Engineering Graduates will be able to,

1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of mathematics,
natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and design
system components or processes that meet the specified needs with appropriate consideration for the
public health and safety, and the cultural, societal, and environmental considerations.

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4. Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis of the
information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities with an
understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the
professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering solutions
in societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable
development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms
of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader in
diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive clear
instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as member and leader in
a team, to manage projects and in multidisciplinary environments.
12. Life- long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.

PROGRAM SPECIFIC OUTCOMES (PSOs)

1. Design and develop electronic circuits, equipment and systems
2. Apply hardware and software programming skills for implementing Electronics and
Communication Systems
3. Provide real time solutions using existing and emerging technologies in the field of Electronics
and Communication Engineering

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COURSE OUTCOMES

MAPPING OF COs WITH POs AND PSOs

1. LOW 2. MODERATE 3. SUBSTANTIAL

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LIST OF EXPERIMENTS

DESIGN AND TESTING OF

1. Inverting, Non inverting and Differential amplifiers.
2. Integrator and Differentiator.
3. Instrumentation amplifier
4. Active low-pass, High-pass and band-pass filters.
5. Schmitt Trigger using op-amp.
6. PLL characteristics and its use as Frequency Multiplier.
7. Astable & Monostable Multivibrators using op-amp.
8. Phase shift and Wien bridge oscillators using op-amp.
9. Astable and Monostable Multivibrators using NE555 Timer.
10. DC power supply using LM317 and LM723.

SIMULATION USING SPICE

1. Instrumentation Amplifier.
2. Active low-pass, High-pass and band-pass filters.
3. Schmitt Trigger using op-amp.
4. Analog Multiplier.
4. D/A and A/D converters.

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LIST OF EQUIPMENTS AND COMPONENTS

1. Dual ,(0-30V) variable Power Supply

2. CRO 30MHz
3. Digital Multimeter
4. Function Generator 1 MHz
5. IC Tester Bread board
6. Computer (PSPICE installed)
Consumables
1. IC 741
2. IC NE555 ,NE565
3. IC7490
4. LED
5. LM317
6. LM723
7. Transistor – 2N2222
8. Diode IN4001
9. Potentiometer
10. Step-down transformer 230V/12-0-12V
11. Capacitor
12. Resistors 1/4 Watt Assorted
13. Single Strand Wire

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 STUDENTS GUIDELINES

There are 3 hours allocated to a laboratory session in LIC lab. It is a necessary part of the course
at which attendance is compulsory. Here are some guidelines to help you perform the
experiments and to submit the reports:

1. Read all instructions carefully and carry them all out.

2. Ask a demonstrator if you are unsure of anything.
3. Record actual results (comment on them if they are unexpected!)
4. Write up full and suitable conclusions for each experiment.
5. If you have any doubt about the safety of any procedure, contact the demonstrator beforehand.
6. Think about what you are doing!

THE BREADBOARD

The breadboard consists of two terminal strips and two bus strips (often broken in the
centre). Each bus strip has two rows of contacts. Each of the two rows of contacts are a node.
That is, each contact along a row on a bus strip is connected together (inside the breadboard).
Bus strips are used primarily for power supply connections, but are also used for any node
requiring a large number of connections. Each terminal strip has 60 rows and 5 columns of
contacts on each side of the centre gap. Each row of 5 contacts is a node. You will build your
circuits on the terminal strips by inserting the leads of circuit components into the contact
receptacles and making connections with

Incorrect connection of power to the ICs could result in them exploding or becoming very
hot with the possible serious injury occurring to the people working on the experiment! Ensure
that the power supply polarity and all components and connections are correct before switching
on power .

The breadboard. The lines indicate connected holes.

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 BUILDING THE CIRCUIT

The steps for wiring a circuit should be completed in the order described below:

1. Turn the power off before you build anything!

2. Make sure the power is off before you build anything!
3. Connect the supply and ground (GND) leads of the power supply to the power and ground bus
strips on your breadboard.
4. Plug the chips you will be using into the breadboard. Point all the chips in the same direction
with pin 1 at the upper-left corner. (Pin 1 is often identified by a dot or a notch next to it on the
chip package)
5. Connect supply and GND pins of each chip to the power and ground bus
strips on the breadboard.
6. Select a connection on your schematic and place a piece of hook-up wire between
corresponding pins of the chips on your breadboard. It is better to make the short connections
before the longer ones. Mark each connection on your schematic as you go, so as not to try to
make the same connection again at a later stage.
7. Get one of your group members to check the connections, before you turn the power on.
8. If an error is made and is not spotted before you turn the power on. Turn the power off
immediately before you begin to rewire the circuit.
9. At the end of the laboratory session, collect you hook-up wires, chips and all equipment and
return them to the demonstrator.
10. Tidy the area that you were working in and leave it in the same condition as it was before
you started.

Common Causes of Problems:

1. Not connecting the ground and/or power pins for all chips.
2. Not turning on the power supply before checking the operation of the circuit.
3. Leaving out wires.
4. Plugging wires into the wrong holes.
5. Driving a single gate input with the outputs of two or more gates
6. Modifying the circuit with the power on.

In all experiments, you will be expected to obtain all instruments, leads, components at
the start of the experiment and return them to their proper place after you have finished the
experiment. Please inform the demonstrator or technician if you locate faulty equipment. If you
damage a chip, inform a demonstrator, don't put it back in the box of chips for somebody else to
use.

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 INDEX

EX.
DATE NAME OF THE EXPERIMENT MARKS SIGNATURE
NO

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PIN DIAGRAM

CIRCUIT DIAGRAM:

INVERTING AMPLIFIER:

TABULATION:

Vo = Vin(-Rf/R1)(volts)
S.NO Vin(volts) Time (ms)
Theoretical Practical

1.

2.

3.

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 DESIGN OF INVERTING, NON INVERTING AND DIFFERENTIAL AMPLIFIERS

EX.NO: 1 DATE:

AIM:
To design and construct a inverting, non- inverting and differential amplifiers.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 1
4. Op-Amp µA741 1
5. Bread Board 1
6. Resistors 1K,10K 2
7. Connecting wires and probes As required

THEORY:

Op-amp in open-loop configuration has a very few application because of its enormous open-
loop gain. Controlled gain can be can be achieved by taking a part of output signal to the input
with the help of feedback. This is called as Closed- Loop Configuration. The three basic types
of closed-loop amplifier configuration are:
1. Inverting amplifier.
2. Non-inverting amplifier.
3. Differential amplifier.
The entire configuration can be operated with either AC or DC input.

INVERTING AMPLIFIER:

This is the most widely used op-amp. Here, the output voltage Vo is feedback to the
inverting input terminal through the Rf – R1 network. The negative sign in gain indicates the
phase shift of 180ο.

The circuit closed-loop voltage gain is Avcl= -RF / R1

NON - INVERTING AMPLIFIER:

If signal is applied to the non-inverting input terminal of op-amp without inverting the
input signal such a circuit is called non-inverting amplifier. Here the output is feedback to the
inverting input terminal. The phase shift of input signal does not occur in non-inverting terminal.

The circuit closed-loop voltage gain is ACL = 1 + ( RF / R1)

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MODEL GRAPH:

CIRCUIT DIAGRAM:

NON-INVERTING AMPLIFIER:

TABULATION:

Vo = Vin[1 + ( RF / R1)] (volts)

S.NO Vin(volts) Time (ms)
Theoretical Practical

1.

2.

3.

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DIFFERENTIAL AMPLIFIER

A circuit that amplifies that amplifies the difference between two input signals is called
as differential amplifier. It is useful in instrumentation amplifier. If the two input signals are the
same, the output should be zero. Differential amplifier with a single op-amp has the exact gain of
an inverting amplifier and it is given as

𝑉𝑜 𝑅𝑓
𝐴𝑉 = =−
𝑉2− V1 𝑅1

DESIGN:
Inverting amplifier:
A = -Rf/R1
Take A = 10
Rf =10 R1
Choose R1 = 1kΩ, Rf=10kΩ
Non inverting amplifier:
A = 1+ Rf/R1
Take A = 2
Rf = R1
Choose Rf = 10kΩ, R1=10kΩ
Differential amplifier
Therefore overall gain is
𝑉𝑜 𝑅𝑓
𝐴𝑉 = =−
𝑉1 − V2 𝑅1

Take A = 10
Rf =10 R1
Choose R1 = 1kΩ, Rf=10kΩ

PROCEDURE:
Inverting and Non-inverting amplifier:

1. Select R1 as a constant value and choose a value of Rf.

2. Connect the circuit as per as the circuit diagram.
3. Apply the constant amplitude input voltage to the circuit.
4. Measure the output voltage amplitude for different value of V1 from DSO.
5. Calculate the practical Voltage for different value of V1& compare it with theoretical output.
6. Practical gain & theoretical voltage should be approximately equal.
7. Plot the graph of the input wave versus output wave for any one practical case .

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MODEL GRAPH:

NON-INVERTING AMPLIFIER

CIRCUIT DIAGRAM:

DIFFERENTIAL AMPLIFIER

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PROCEDURE:
Differential amplifier

1. Select the value of R1, R2, R3 & Rf such that R1=R2 and R3=Rf.
2. Connect the circuit as per as the circuit diagram.
3. Provide constant input voltage Vin1 to Non-inverting terminal of op-amp through R1 &
constant input voltage Vin2 to inverting terminal of op-amp through R2.
4. Measure the output voltage using DSO.
5. Calculate the theoretical Vo and compare it with practical Vo.
6. Practical output & theoretical calculation should be approximately equal.
7. Plot the graph of the input wave versus output wave for any one practical case.

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MODEL GRAPH:

TABULATION:

DIFFERENTIAL AMPLIFIER

Vo = (-Rf/R1)(V1-V2)(volts)
S.NO V1(volts) V2(volts)
Theoretical practical
1.

2.

3.

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RESULT:
Thus the Inverting, Non-Inverting and Differential Amplifiers are designed and their
performance was successfully tested using op-amp IC 741.

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 INTEGRATOR CIRCUIT DIAGRAM

TABULATION:

INPUT OUTPUT
Amplitude(V) Time Frequency(Hz) Amplitude(V) Time Frequency(Hz)
Period(ms) Period(ms)
Sine
Wave

Square
Wave

MODEL GRAPH:
i) SINE WAVE INPUT:

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 INTEGRATOR AND DIFFERENTIATOR USING OP-AMP
EX.NO: 2 DATE:
AIM:

To design and test the performance of integrator and differentiator circuits using
Op-amp.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Signal Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 1
4. Op-Amp µA741 1
5. Bread Board 1
6. Resistors 1K,10K,100K, 2
7. Capacitors 0.1µF,0.01µF 1
8. Connecting wires and probes As required

THEORY:
INTEGRATOR

A circuit in which the output voltage waveform is the integral of the input voltage
waveform is the integrator. Such a circuit is obtained by using a basic inverting amplifier
configuration if the feedback resistor Rf is replaced by a capacitor Cf . The expression for the
output voltage is given as,
Vo = - (1/Rf C1 ) ∫ Vi dt

Here the negative sign indicates that the output voltage is 180 0 out of phase with the
input signal. Normally between fa and fb the circuit acts as an integrator. Generally, the value of
fa < fb . The input signal will be integrated properly if the Time period T of the signal is larger
than or equal to Rf Cf . That is,
T ≥ Rf Cf

The integrator is most commonly used in analog computers and ADC and signal-wave
shaping circuits.

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ii) SQUARE WAVE INPUT

DIFFERENTIATOR CIRCUIT DIAGRAM

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DESIGN:

To obtain the output of an Integrator circuit with component values R1Cf = 0.1ms , Rf = 10
R1 and Cf = 0.01 µF and also if 1 V peak square wave at 1000Hz is applied as input.
We know the frequency at which the gain is 0 dB, fb = 1 / (2π R1 Cf) Therefore fb =
Since fb = 10 fa , and also the gain limiting frequency fa = 1 / (2π Rf Cf)
We get , R1 = and hence Rf =

THEORY:
DIFFEERENTIATOR:
The differentiator circuit performs the mathematical operation of differentiation; that is, the
output waveform is the derivative of the input waveform. The differentiator may be
constructed from a basic inverting amplifier if an input resistor R 1 is replaced by a capacitor
C1 . The expression for the output voltage is given as,

Vo = - Rf C1 ( dVi /dt )

Here the negative sign indicates that the output voltage is 180 0 out of phase with the input
signal. A resistor Rcomp = Rf is normally connected to the non-inverting input terminal of
the op-amp to compensate for the input bias current. A workable differentiator can be
designed by implementing the following steps:

1. Select fa equal to the highest frequency of the input signal to be differentiated. Then,
assuming a value of C1 < 1 µF, calculate the value of Rf.
2. Choose fb = 20 fa and calculate the values of R1 and Cf so that R1C1 = Rf Cf.

The differentiator is most commonly used in wave shaping circuits to detect high
frequency components in an input signal and also as a rate–of–change detector in FM
modulators.

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 TABULATION:

INPUT OUTPUT
Amplitude(V) Time Frequency(Hz) Amplitude(V) Time Frequency(Hz)
Period(ms) Period(ms)
Sine
Wave

Square
Wave

MODEL GRAPH: DIFFERENTIATOR

(i) SINE WAVE INPUT

(ii) SQUARE WAVE INPUT

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DESIGN (DIFFERENTIATOR):

Design an op-amp differentiator that will differentiate an input signal with fmax = 100HZ
Select fa = fmax = 100 HZ = 1 / 2πRFC1
Let C1 = 0.1μF
Then RF = 1 / 2π(102)(10-7)
= 15.9KΩ
Now choose fb = 10fa = 1 / 2πR1C1
Therefore, R1 = 1 / 2π(103)(10-7)
= 1.59KΩ
Since RFCF = R1C1
We get, CF = (1.59*103*10-7) / 15.9*103
= 0.01μF

PROCEDURE:

1. Connections are given as per the circuit diagram

2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator, appropriate
input voltage is applied to the inverting input terminal of the Op- Amp.
4. The output voltage is obtained in the CRO and the input and output voltage waveforms
are plotted in a graph sheet.

RESULT:
Thus an Integrator and Differentiator using op-amp are designed and their
performance was successfully tested using op-amp IC 741.

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CIRCUIT DIAGRAM:

INSTRUMENTATION AMPLIFIER

TABULATION:

Vo = RF/R1[1+ 2R’/R][V2-V1]
S.NO V1(volts) V2(volts) (volts)
Theoretical practical
1.

2.

3.

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 INSTRUMENTATION AMPLIFIER
EX.NO: 3 DATE:
AIM:
To construct and test the CMRR of an instrumentation amplifier using op-amp
IC741.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 2
4. Op-Amp µA741 3
5. Bread Board 1
6. Resistors 1K,10K,2.2K 1,4,2
7. Connecting wires and probes As required

THEORY:

An instrumentation amplifier is the intermediate stage of a instrumentation system. The

signal source of the instrumentation amplifier is the output of the transducer. Many
transducers output do not have the ability or sufficient strength to drive the next following
stages. Therefore, instrumentation amplifiers are used to amplify the low-level output signal of
the transducer so that it can drive the following stages such as indicator or displays.

The major requirements of a instrumentation amplifier are precise, low-level

signal amplification where low-noise, low thermal and time drifts, high input resistance &
accurate closed-loop gain, low power consumption, high CMRR & high slew rate for superior
performance.

The output of Instumentation amplifier is given by

Vo = RF/R1[1+ 2R’/R][V2-V1]

25
MODEL GRAPH:

26
PROCEDURE:

1. Select the entire resistor with the same value. Let R be the gain varying resistor with
different values of resistance for simplicity let R be a constant value.
2. Connect the circuit as shown in the circuit diagram.
3. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
4. Give the input V1 and V2 to the non-inverting terminals of first & second op-amp
respectively.
5. By varying the value of RG, measure the output voltage for common mode and
differential mode operation. Since RG is selected as constant value, provide different
input value of V1 and V2.
6. Check the theoretical value with the experimental value.
7. The output voltage is obtained in the Multimeter and the input and output voltage
waveforms are plotted in a graph sheet.

RESULT:
Thus an instrumentation amplifier was constructed and tested using op-
amp IC 741.

27
CIRCUIT DIAGRAM:
LOW PASS
FILTER

MODEL GRAPH:

28
 DESIGN OF ACTIVE LOW PASS,HIGH PASS AND BAND PASS FILTERS

USING OP-AMP

EX.NO: 4 DATE:
AIM:

To design and obtain the frequency response of

i) First order Low Pass Filter (LPF)

ii) First order High Pass Filter (HPF)
iii) Band pass filter

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 2
4. Op-Amp µA741 2
5. Bread Board 1
6. Resistors 1.6K,10K,5.86K,38.8K,7.9K
7. Connecting wires and probes As required

THEORY:
LOW PASS FILTER
A LPF allows frequencies from 0 to higher cut of frequency, fH. At fH the gain is 0.707
Amax, and after fH gain decreases at a constant rate with an increase in frequency. The gain
decreases 20dB each time the frequency is increased by 10. Hence the rate at which the gain
rolls off after fH is 20dB/decade or 6 dB/ octave, where octave signifies a two fold increase in
frequency. The frequency f=fH is called the cut off frequency because the gain of the filter at this
frequency is down by 3 dB from 0 Hz. Other equivalent terms for cut-off frequency are -3dB
frequency, break frequency, or corner frequency.

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TABULATION:

Vi=________volts
Output Voltage Gain =20 log (Vo/Vi)
S.NO Frequency (HZ)
(VOLTS) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.

CIRCUIT DIAGRAM:
HIGH PASS FILTER

30
HIGH PASS FILTER
The frequency at which the magnitude of the gain is 0.707 times the maximum value of
gain is called low cut off frequency. Obviously, all frequencies higher than fL are pass band
frequencies with the highest frequency determined by the closed –loop band width all of the op-
amp.

BAND PASS FILTER

A band pass filter has a pass band between two cutoff frequencies fH and fL such that fH >
fL. Any input frequency outside this pass band is attenuated. There are two types of band-pass
filters. Wide band pass and Narrow band pass filters. We can define a filter as wide band pass if
its quality factor Q <10. If Q>10, then we call the filter a narrow band pass filter. A wide band
pass filter can be formed by simply cascading high-pass and low-pass sections. The order of
band pass filter depends on the order of high pass and low pass sections.

DESIGN:LPF & HPF

Given: fH = 1 KHz = 1/ (2πRC)

Let C = 0.1 µF, R = 1.6 KΩ

For n = 2, α (damping factor) = 1.414,

Passband gain = Ao = 3 - α =3 – 1.414 = 1.586.

Transfer function of second order butterworth LPF as:

1.586
H(s) = ---------------------------
S2 + 1.414 s + 1

Now Ao = 1 + (Rf / R1) = 1.586 = 1 + 0.586

Let Ri = 10 KΩ, then Rf = 5.86 KΩ

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MODEL GRAPH:

TABULATION:

Vi=________volts
Output Voltage Gain =20 log (Vo/Vi)
S.NO Frequency (HZ)
(VOLTS) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.

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DESIGN: BAND PASS FILTER

Design a BPF to pass a band of 400Hz to 2KHz with a pass band gain of 4.
1. Select the highest cut-off frequency of LPF as fH = 10 KHz and the lowest cut-off frequency
of HPF as fL = 1 KHz.
2. Design the HPF first by taking fL = 1KHz. Assume the value of C < 1μf.
Let C = 0.1μf.
3. Calculate R from the expression.
Given: fH = 2KHz = 1/ (2πR1C1)
Let C1 = 0.1 µF, R1 = 7.9 KΩ
Given: fL = 400Hz = 1/ (2πR2C2)
Let C2 = 0.1 µF, R2 = 39.8 KΩ
Pass band Gain=4
Now Ao = 1 + (Rf / R1)
2-1=(Rf / Ri)
Ri = Rf
Let Ri = Rf = 10 KΩ

PROCEDURE - (LPF & HPF):

1. Connect the circuit as shown in the circuit diagram.
2. Select the corresponding cut-off frequency (higher or lower) and determine the value of C&R.
select the value of R1 & Rf depending on desired passband gain Af..
3. Apply a constant voltage input sinusoidal signal to the non-inverting terminal of op-amp.
4. Tabulate the output voltage Vo with respect to different values of input frequency.
5. Calculate passband gain and plot the graph of frequency versus voltage gain & check the
graph to get approximately the same characteristic as shown in the model graph.

33
CIRCUIT DIAGRAM:
BANDPASS FILTER

MODEL GRAPH:

34
PROCEDURE:BAND PASS FILTER
1. Select the lower and higher cut-off frequency and calculate the value of R & C for the given
frequencies.
2. Design for LPF & HPF separately and then combine the circuit by first placing the HPF
followed by a LPF (i.e) HPF in series with LPF.
3. Connect the circuit as shown in the circuit diagram.
4. Apply a constant voltage input sinusoidal signal to the non-inverting terminal of op-amp.
5. Tabulate the output voltage Vo with respect to different values of input frequency.
6. Calculate passband gain and plot the graph of frequency versus voltage gain & check the
graph to get approximately the same characteristic as shown in the model graph.

35
TABULATION:

Vi=________volts
Output Voltage Gain =20 log (Vo/Vi)
S.NO Frequency (HZ)
(VOLTS) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.

36
RESULT:
Thus an Active Low pass, High pass and Band Pass Filters are designed and
tested using op-amp IC 741.

37
CIRCUIT DIAGRAM:
SCHMITT TRIGGER

TABULATION:

INPUT/OUTPUT
Amplitude(V) Time Period(ms) Frequency(Hz)

Sine Wave
Input

Square Wave
output

MODEL GRAPH:

38
 SCHMITT TRIGGER CIRCUITS- USING OP-AMP

EX.NO: 5 DATE:

AIM:

To design the Schmitt trigger circuit using Op-amp IC 741.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 2
4. Op-Amp µA741 1
5. Bread Board 1
6. Resistors 1K,27K,39K,33K 1
7. Connecting wires and probes As required

THEORY:

The circuit shows an inverting comparator with positive feedback. This circuit converts
irregular shaped wave forms to a square wave or pulse. The circuit is known as the Schmitt
trigger (or) squaring circuit. The input voltage Vin changes the state of the output Vo every time
it exceeds certain voltage levels called the upper threshold voltage V UT and lower threshold
voltage VLT.

When Vo= - Vsat, the voltage across R1 is referred to as lower threshold voltage, VLT.
When Vo=+Vsat, the voltage across R1 is referred to as upper threshold voltage VUT. The
comparator with positive feedback is said to exhibit hysteresis, a dead band condition.

39
DESIGN:

1. Select the desire value of Vut & Vlt with same magnitude & opposite polarity.
Let VUT = 0.3V & VLT = -0.3V.
2. For Op-amp 741C ± Vsat ≡ ±12V. And assume Vref = 0, Since the another end of R1 is
grounded.
3. If Vo = +Vsat the voltage at the positive terminal will be (voltage from potential divider R1 &
R2).
VUTP = [R1/(R1+R2 )](+Vsat)
VLTP = [R1/(R1+R2 )](-Vsat)
0.3=[R1/(R1+R2 )](+12)
0.3/12=[R1/(R1+R2 )]
0.025(R1+R2)=R1
0.025R2=(1-0.025)R1
R2=(0.975/0.025)R1
R2 = 39 R1
Assume R1=1KΩ
R2=39 KΩ
PROCEDURE:

1. Design the value of circuit components and select VUT & VLT as given in the design
procedure.
2. Connect the circuit as shown in the circuit diagram.
3. Apply the input signal to the input terminal of op-amp & set VUT & VLT values.
4. Note down the readings from the output waveform.
5. Plot the graph & show the relationship between Input sine wave & Output

RESULT:
Thus a Schmitt trigger is designed and tested using op-amp IC 741.

40
PIN DIAGRAM:

CIRCUIT DIAGRAM OF PHASE LOCK LOOP:

TABULATION:

Amplitude(Volts) Frequency(Hz)
Input
Output

41
 DESIGN AND TESTING OF PLL CHARACTERISTICS AND FREQUENCY
MULTIPLIER
EX.NO: 6 DATE:

AIM:

To construct and study the operation of frequency multiplier using IC 565.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 1
4. PLL NE565,IC 7490 Each 1
5. Transistor 2N2222 1
6. Bread Board 1
7. Resistors 2K,10K,4.7K 2
8. Capacitor 0.01µF,10 µF
7. Connecting wires and probes As required

THEORY:
The frequency divider is inserted between the VCO and the phase comparator of PLL. Since the
output of the divider is locked to the input frequency Fin, the VCO is actually running at a
multiple of the input frequency .The desired amount of multiplication can be obtained by
selecting a proper divide– by – N network , where N is an integer. To obtain the output
frequency Fout=2Fin, N = 2 is chosen. One must determine the input frequency range and then
adjust the free running frequency Fout of the VCO by means of R1 and C1 so that the output
frequency of the divider is midway within the predetermined input frequency range. The output
of the VCO now should be 2Fin . The output of the VCO should be adjusted by varying
potentiometer R1. A small capacitor is connected between pin7 and pin8 to eliminate possible
oscillations. Also, capacitor C2 should be large enough to stabilize the VCO frequency.

42
FREQUENCY MULTIPLIER:

MODEL GRAPH:

43
PROCEDURE:

1. Make connections of the PLL as shown in the circuit diagram.

2. Measure the free running frequency of VCO at pin4, with the input signal Vin set equal to
zero. Compare it with the calculated value = 0.25/RTCT.
3. Now apply the input signal 1 Vpp square wave at pin2. Connect one channel of the scope to
pin2 and display this signal on the scope.
4. Gradually increase the input frequency till the PLL is locked to the input frequency. This
frequency f1 gives the lower end of the capture range. Go on increasing the input frequency, till
PLL tracks the input signal, say, if input frequency is increased further, the loop will get
unlocked.
5. Now gradually decrease the input frequency till the PLL is again locked. This is the frequency
f3, the upper end of the capture range. Keep on decreasing the input frequency until the loop is
unlocked. This frequency f4 gives the lower end of the lock range.
6. The lock range ΔfL = (f2-f4). Compare it with the calculated value of •±7.8fo/12. Also
capture range is Δfc = (f3-f1). Compare it with the calculated value of capture range.
Δfc = •±[ΔfL/(2π)(3.6)(103)C]1/2
7. To use PLL as multiplier, make connections as shown in the figure. The circuit uses a 4-bit
binary counter 7490 used as a divide by 5 circuit.
8. Set the input signal at 1 Vpp square wave at 1000 HZ.
9. Vary the VCO frequency by adjusting the 10K potentiometer till the PLL is locked. Measure
the output frequency. It should be 5 times the input frequency.

RESULT:

Thus the PLL characteristics and Frequency Multiplier using IC 565 is constructed and
tested.

44
CIRCUIT DIAGRAM:

ASTABLE MULTIVIBRATOR:

MODEL GRAPH:

TABULATION:

Waveform Amplitude(Volts) TH(ms) TL(ms) T=TH+TL(ms) Frequency(Hz)

Output
waveform
Capacitor
output

45
 DESIGN AND TESTING OF MONOSTABLE MULTIVIBRATOR AND
ASTABLE MULTIVIBRATOR USING OP-AMP

EX.NO: 7 DATE:
AIM:

To design a square wave generator circuit using Astable and Monostable Multivibrator
using op-amp IC741.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 1
4. Op-amp µA741 1
5. Bread Board 1
6. Resistors 10K,100K 2
7. Capacitor 0.01µF,0.1 µF Each 2
8. Diode 1N4007 2
9. Connecting wires and probes As required

THEORY:

ASTABLE MULTIVIBRATOR:

A simple op-Amp square wave generator is also called as free running oscillator, the
principle of generation of square wave output is to force an op-amp to operate in the saturation
region . A fraction =R2/(R1+R2) of the output is fed back to the (+) input terminal. The output
is also fed to the (-) terminal after integrating by means of a low pass Rc combination in astable
multivibrator both the states are quasi stables. The frequency is determined by the time taken by
the capacitor to charge from- Vsat to+Vsat.

MONOSTABLE MUTIVIBRATOR:

It is also known as one shot multivibrator. It generates a single pulse of specified duration
in response to each external trigger signal. A monostable multivibrator exits only one stable
state. Application of a trigger causes a change to the quasi stable state. The circuit remains in a
quasi stable state for a fixed interval of time and then reverts to its original stable state. An
internal trigger signal is generated which produces the transition to the stable state. Usually, the
charging and discharging of a capacitor provides this internal trigger signal.

46
CIRCUIT DIAGRAM:
MONOSTABLE MULTIVIBRATOR

MODEL GRAPH:

TABULATION:

Waveform Amplitude(Volts) Time Period(ms) Frequency(Hz)

Input
Triggering
Pulse
Output
waveform
Capacitor
output

47
DESIGN:

ASTABLE MULTIVIBRATOR

F=1KHZ =T=1ms

R2=1K,C=0.1F

R1=1.16R2=1.16K1K+100

T=2RC

R=T/2C =5K

4.7K

MONOSTABLE MULTIVIBRATOR:

Vcc = 10V,Vsat = 10V,pulse width T= 1ms

1. To find R1 and R2
𝑅2
= 0.86 choose R1 = 10KΩ
𝑅1
𝑅2
𝛽=
𝑅1+ 𝑅2

Assume R1= R2, 𝛽 = 0.5

2. To find charging period of capacitor

𝑉𝑠𝑎𝑡
T = R * C ln ( )
𝑉𝑠𝑎𝑡 −𝑉𝑡
We know that
𝑅2
Vt = Vsat* where Vsat = 12V and substitute Vt in T , we get
𝑅1 + 𝑅2
𝑅2
T = R * C ln (1 + ) take R2 = R1
𝑅1
T = 0.69 R * C
Choose T = 1 ms, C = 0.1μF
Find out the value of R

48
PROCEDURE:
ASTABLE MULTIVIBRATOR

1. Calculate the value of components using the design procedure given.

2. Connect the circuit as per as the circuit diagram.
3. As there is no specific input signal for this circuit switch ON the power supply.
4. Note down the reading for output square wave (i.e) time & amplitude and tabulate it.
5. Note down the reading for capacitor voltage & tabulate it.
6. Plot the reading in the graph and compare it with model graph.

MONOSTABLE MULTIVIBRATOR

1. Calculate the value of components using the design procedure given.

2. Connect the circuit as per as the circuit diagram.
3. Apply the negative trigger voltage to the non-inverting terminal.
4. Note down the reading for output voltage Vo & ON & OFF time period & tabulate it.
5. Note down the reading for capacitor voltage & tabulate it.
6. Plot the reading in the graph and compare it with model graph.

RESULT:
Thus an Astable, Monostable multivibrator are designed and tested using op-amp IC 741.

49
CIRCUIT DIAGRAM:
RC PHASE SHIFT OSCILLATOR

MODEL GRAPH:

TABULATION:

S.NO Amplitude(Volts) Time Period(ms) Frequency(Hz)

50
 RC PHASE SHIFT AND WIEN BRIDGE OSCILLATOR
EX.NO: 8 DATE:
AIM:

To construct a RC phase shift and Wien bridge oscillator to generate sine wave using op-
amp.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 1
4. Op-amp µA741 1
5. Bread Board 1
6. Resistors 1K,3.3K,1.5K,33K,15K,1MΩ 2
7. Capacitor 0.1 µF 3
8. Connecting wires and probes As required

THEORY:
RC PHASE SHIFT OSCILLATOR

RC phase shift oscillator produces 360° of phase shift in two parts. Firstly,each and every
RC pair in the feedback network produces 60° phase shift and totally there were three pairs, thus
producing 180° Phase shift and secondly, the feedback input is given to the inverting terminal of
op-amp to produce another 180° phase shift and a total phase shift of 360°.
The frequency of oscillation is given by fo = 1 /  6 (2RC ).If an inverting amplifier is used,
the gain must be atleast equal to 29 to ensure the oscillations with constant .

WIEN BRIDGE

A bridge circuit with two components connected in series and parallel combination is
used to archived the required of phase shift of 0o. When the bridge is balanced the phase shift of
0o is achieved and the feedback signal is connected to the positive terminal; of Op-amp. So the
Op-amp is acting as a non-inverting amplifier and the feedback network do not provide any
phase shift.
The frequency of oscillation is given by fo = 1/2πRC

51
CIRCUIT DIAGRAM:
WIEN BRIDGE OSCILLATOR

MODEL GRAPH:

TABULATION:

S.NO Amplitude(Volts) Time Period(ms) Frequency(Hz)

52
DESIGN:
RC PHASE SHIFT OSCILLATOR

fo = 1 /  6 (2RC)
Rf  29 R1
C = 0.01F, fo = 200 Hz.
R = 1 /  6 (2  f C ) = 3.3 k
Therefore, Choose R = 3.3k
To prevent loading,
R1  10 R
R1 =10 R = 33 k.
Rf = 29R1=1MΩ

WIEN BRIDGE OSCILLATOR

Select frequency f0 = 1KHz

fo = 1/2πRC
A = 1+(Rf / R1) = 3.
To find R & Rf.
Therefore Rf = 2R1 & assume C = 0.1μf & find R from
R=1/2πfC
=1/2*3.14*1*103*0.1*10-6
= 1.59KΩ.
Assume R1 = 10R & find Rf from Rf = 2R1
Therefore R1 = 1.5K *10=15KΩ
Rf = 15K *2=30KΩ

PROCEDURE:

1. Connect the circuit as shown in fig. With the design values.

2. Observe the output waveforms using a DSO.For obtaining sine wave adjust Rf.
3. Measure the output wave frequency and amplitude.

RESULT:

Thus the RC Phase Shift and Wien Bridge oscillators are designed and tested
using op-amp IC 741.

53
PIN DIAGRAM:

CIRCUIT DIAGRAM:
MONOSTABLE MULTIVIBRATOR:

TABULATION:

Waveform Amplitude(Volts) Time Period(ms) Frequency(Hz)

Input
Triggering
Pulse
Output
waveform
Capacitor
output

54
 DESIGN AND TESTING OF MONOSTABLE MULTIVIBRATOR AND
ASTABLE MULTIVIBRATOR USING NE555 TIMER

EX.NO: 9 DATE:
AIM:

To design a square wave generator circuit using Astable and Monostable Multivibrator
using NE555 timer IC.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. DSO 30 MHz 1
3. Dual RPS (0 – 30) V 1
4. Op-amp µA741 1
5. Bread Board 1
6. Resistors 10K,100K 2
7. Capacitor 0.01µF,0.1 µF Each 2
8. Diode 1N4007 2
9. Connecting wires and probes As required

THEORY:

MONOSTABLE MULTIVIBRATOR
A Monostable Multivibrator, often called a one-shot Multivibrator, is a pulse-generating
circuit in which the duration of the pulse is determined by the RC network connected externally
to the 555 timer. In a stable or stand by mode the output of the circuit is approximately Zero or
at logic-low level. When an external trigger pulse is obtained, the output is forced to go high ( 
VCC). The time for which the output remains high is determined by the external RC network
connected to the timer. At the end of the timing interval, the output automatically reverts back to
its logic-low stable state. The output stays low until the trigger pulse is again applied. Then the
cycle repeats. The Monostable circuit has only one stable state (output low), hence the name
monostable. Normally the output of the Monostable Multivibrator is low.

55
MODEL GRAPH:

CIRCUIT DIAGRAM:
ASTABLE MULTIVIBRATOR:

TABULATION:

Waveform Amplitude(Volts) TH(ms) TL(ms) T=TH+TL(ms) Frequency(Hz)

Output
waveform
Capacitor
output

56
THEORY:

ASTABLE MULTIVIBRATOR

When the power supply VCC is connected, the external timing capacitor ‘C” charges
towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high (≈VCC) as Reset
R=0, Set S=1 and this combination makes Q =0 which has unclamped the timing capacitor ‘C’.

When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the control flip
flop on that Q =1. It makes Q1 ON and capacitor ‘C’ starts discharging towards ground through
RB and transistor Q1 with a time constant RBC. Current also flows into Q1 through RA.
Resistors RA and RB must be large enough to limit this current and prevent damage to the
discharge transistor Q1. The minimum value of RA is approximately equal to VCC/0.2 where
0.2A is the maximum current through the ON transistor Q1.

During the discharge of the timing capacitor C, as it reaches V CC/3, the lower comparator
is triggered and at this stage S=1, R=0 which turns Q =0. Now Q =0 unclamps the external
timing capacitor C. The capacitor C is thus periodically charged and discharged between 2/3
VCC and 1/3 VCC respectively. The length of time that the output remains HIGH is the time for
the capacitor to charge from 1/3 VCC to 2/3 VCC.

The capacitor voltage for a low pass RC circuit subjected to a step input of V CC volts is
given by VC = VCC [1- exp (-t/RC)]

Total time period T = 0.69 (RA + 2 RB) C

f= 1/T = 1.44/ (RA + 2RB) C

DESIGN: MONOSTABLE MULTIVIBRATOR

Given Frequency F=1K Hz, T=1/F=1ms

T=1.1RAC

Assume C=0.1µf, Find RA

RA = T/1.1 C=10K

57
MODEL GRAPH:

TABULATION:

Waveform Amplitude(Volts) TH(ms) TL(ms) T=TH+TL(ms) Frequency(Hz)

Output
waveform
Capacitor
output

DESIGN:

Design of Astable multivibrator of operation frequency = 1 KHz & duty cycle of 25%
using 555 timer IC.
Given Frequency=1000Hz
Duty cycle=25%
D= T low/T = RB/RA+2RB*100
100RB = 25(RA+2RB)
50RB – 25RA = 0 -----------------------------------(1)
Given f=1KHz we know that T=1/f
T=1ms
T= T high + T low
0.69(RA+2RB)C = 1*10-3
0.69(RA+2RB) = 1*10-3/C
Let C=0.1μF
0.69RA+1.38RB = 1*10-3/0.1*10-6
0.69RA+1.38RB = 10 4 ------------------------------------(2)
Solving equation 1 & 2 we get
RA=7.2KΩ, RB= 3.6KΩ

58
PROCEDURE:

MONOSTABLE MULTIVIBRATOR:

1. Connect the circuit as shown in the circuit diagram.

2. Apply Negative triggering pulses at pin 2 of frequency 1 KHz.
3. Observe the output waveform and measure the pulse duration.
4. Theoretically calculate the pulse duration as T high=1.1. RAC
5. Compare it with experimental values.

ASTABLE MULTIVIBRATOR:

1. Calculate the value of R & C using design procedure.

2. Connect the circuit as shown in the circuit diagram.
3. Apply Negative triggering pulses at pin 2 of frequency 1 KHz.
4. Observe the output waveform and measure the pulse duration.
5. Theoretically calculate the pulse duration as T=1.1 RAC

RESULT:
Thus the Astable and Monostable multivibrator is designed and tested using 555 timer IC.

59
PIN DIAGRAM:

CIRCUIT DIAGRAM - (LM723 ):

60
 DC POWER SUPPLY USING LM723 AND LM317

EX.NO: 10 DATE:
AIM:

To design a low voltage variable regulator of 2 to 7V using IC 723 and IC317.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity

1. DSO 30 MHz 1
2. Dual RPS (0 – 30) V 1
3. LM723,LM317 - 1
4. Bread Board - 1
5. Resistors 1.5K,2.2K,5.1K,10Ω,220Ω, Each 1
1KΩ
6. Capacitor 0.01µF,0.1 µF Each 2
7. Connecting wires and probes As required

THEORY:
A voltage regulator is a circuit that supplies a constant voltage regardless of changes in
load current and input voltage variations. Using LM723, we can design both low voltage and
high voltage regulators with adjustable voltages. For a low voltage regulator, the output VO can
be varied in the range of voltages Vo < Vref, where as for high voltage regulator, it is VO> Vref.
The voltage Vref is generally about 7.5V. Although voltage regulators can be designed using Op-
amps, it is quicker and easier to use IC voltage Regulators.
LM723 is a general purpose regulator and is a 14-pin IC with internal short circuit current
limiting, thermal shutdown, current/voltage boosting etc. Furthermore it is an adjustable voltage
regulator which can be varied over both positive and negative voltage ranges. By simply varying
the connections made externally, we can operate the IC in the required mode of operation.
Typical performance parameters are line and load regulations which determine the precise
characteristics of a regulator
DESIGN PROCEDURE:
Assume R1 = 2.2K, R2 = 5.1K, RSC = 10Ω
R3 = R1 // R2
VO = Vref . R2 / (R1+R2)
For LM723 Vref = 7.15V
VO = 4.99V

61
TABULATION: (LM723)

LINE REGULATION: R=

S.No Input Voltage(Volts) Output Voltage (Volts)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.

LOAD REGUALTION:

Vin=

S.No Resistance(Ω) Output Voltage (Volts)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.

62
CHARACTERISTICS OF THE LM 317:

The LM317 will provide a regulated output current of upto 1.5A, Provided that if is not
subjected to a power dissipation of more than about 15W.This means it should be electrically
isolated from, and fastened to, a large heat sink such as the metal chassis of the power supply.
The LM317 requires a minimum “dropout” voltage of 3v across its input and output terminals or
it will drop out of regulation. Thus the upper limit of V o is 3Vbelow the minimum input voltage
from the unregulated supply. It is good practice to connect bypass capacitors .This reduces the
ripple voltage from the rectifier.
The LM317 protects itself against overheating, too much internal power dissipation and
too much current. When the chip temperature reaches 175 degrees, the LM317 shuts down. If the
product of output current and input-to-output voltage exceeds 15 to 20W, or if currents greater
than about 1.5A are required the LM317 also shuts down. When the overload condition is
removed the Operation is resumed. All these features are made possible by the remarkable
internal circuitry of LM 317. Along with the simple 3 pin fixed regulators; a number of
adjustable or programmable devices are available. Some devices also include features such as
programmable current limiting. It is also possible to configure multiple regulators so that they
track or follow each other.

DESIGN PROCEDURE:

Assume R1 = 220Ω, R2 = 1K
VO = 1.25(1+ (R2/R1))
VO = 6.93V

63
PIN DIAGRAM:

CIRCUIT DIAGRAM - (LM317):

TABULATION: (LM317)

LINE REGULATION: R=

S.No Input Voltage(Volts) Output Voltage (Volts)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.

64
PROCEDURE:

a) Line Regulation:
1. Connect the circuit as shown in Fig 1.
2. Obtain R1 and R2 for Vo=5V
3. By varying Vin from 2 to 10V, measure the output voltage Vo.
4. Draw the graph between Vin and Vo as shown in model graph (a)
5. Repeat the above steps for Vo=3V

65
LOAD REGUALTION:

Vin=

S.No Resistance(Ω) Output Voltage (Volts)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.

MODEL GRAPH: (LM317 & LM723)

66
PROCEDURE:

b) Load Regulation: For Vo=5V

1. Set Vin such that VO= 5 V
2. By varying RL, measure Vo
3. Plot the graph between R and Vo as shown in model graph (b)
4. Repeat above steps 1 to 3 for Vo=3V.

RESULT:
The LM723 & LM317 voltage regulators are designed and the regulation of supply voltage
was tested.

67
INSTRUMENTATION AMPLIFIER CIRCUIT DIAGRAM

OUTPUT:

68
 SIMULATION OF INSTRUMENTATION AMPLIFIER

EX.NO: 11 DATE:
AIM : To Design and simulate the Instrumentation amplifier circuit using LT-Spice

SOFTWARE REQUIRED: LT-Spice

PROCEDURE:
 Double click on LT-Spice icon.
 New schematic window open.
 Pick and paste the required component from the library and draw the circuit diagram .
 Complete the connection.
 Save the file by giving file name.
 Click on the run option ->click advanced open ->select Ac analysis->enter the amplitude
time delay stop time value.
 Click on the run option ->simulation window opens->place the probe ->output graph is
obtained.

RESULT :

Thus the LT-SPICE tool has been studied and Instrumentation amplifier circuit is
simulated.

69
SCHMITT TRIGGER CIRCUIT DIAGRAM

OUTPUT:

70
 SIMULATION OF SCHMITT TRIGGER USING OP-AMP

EX.NO: 12 DATE:
AIM : To Design and simulate the Schmitt trigger circuit using LT-Spice

SOFTWARE REQUIRED: LT-Spice

PROCEDURE:
 Double click on LT-Spice icon.
 New schematic window open.
 Pick and paste the required component from the library and draw the circuit diagram .
 Complete the connection.
 Save the file by giving file name.
 Click on the run option ->click advanced open ->select Ac analysis->enter the amplitude
time delay stop time value.
 Click on the run option ->simulation window opens->place the probe ->output graph is
obtained.

RESULT :

Thus the LT-SPICE tool has been studied and Schmitt trigger circuit is simulated.

71
LOWPASS FILTER CIRCUIT DIAGRAM

OUTPUT

72
 SIMULATION OF ACTIVE LOWPASS, HIGH PASS AND BANDPASS FILTERS

EX.NO: 13 DATE:
AIM : To Design and simulate the following circuits using LT-Spice
a. Active low pass filter
b. Active high pass filter
c. Active band pass filter

SOFTWARE REQUIRED: LT-Spice

PROCEDURE:
 Double click on LT-Spice icon.
 New schematic window open.
 Pick and paste the required component from the library and draw the circuit diagram .
 Complete the connection.
 Save the file by giving file name.
 Click on the run option ->click advanced open ->select Ac analysis->enter the amplitude
time delay stop time value.
 Click on the run option ->simulation window opens->place the probe ->output graph is
obtained.

73
HIGHPASS FILTER CIRCUIT DIAGRAM

OUTPUT:

74
75
BANDPASS FILTER CIRCUIT DIAGRAM

OUTPUT:

76
RESULT :

Thus the LT-SPICE tool has been studied and active low pass filter, high pass and band
pass filter is simulated.

77
ANALOG MULTIPLIER CIRCUIT DIAGRAM

OUTPUT:

78
 SIMULATION OF ANALOG MULTIPLIER

EX.NO: 14 DATE:
AIM : To Design and simulate the Analog Multiplier circuit using LT-Spice

SOFTWARE REQUIRED: LT-Spice

PROCEDURE:
 Double click on LT-Spice icon.
 New schematic window open.
 Pick and paste the required component from the library and draw the circuit diagram .
 Complete the connection.
 Save the file by giving file name.
 Click on the run option ->click advanced open ->select Ac analysis->enter the amplitude
time delay stop time value.
 Click on the run option ->simulation window opens->place the probe ->output graph is
obtained.

RESULT :

Thus the LT-SPICE tool has been studied and Analog Multiplier circuit is simulated.

79
ANALOG TO DIGITAL CONVERTER CIRCUIT DIAGRAM

OUTPUT:

80
 SIMULATION OF ANALOG TO DIGITTAL AND DIGITAL TO ANALOG
CONVERTERS

EX.NO: 15 DATE:
AIM : To Design the following circuits using LT-Spice
 Analog to Digital Converter
 Digital to Analog Converter

SOFTWARE REQUIRED: LT-Spice

PROCEDURE:
 Double click on LT-Spice icon.
 New schematic window open.
 Pick and paste the required component from the library and draw the circuit diagram .
 Complete the connection.
 Save the file by giving file name.
 Click on the run option ->click advanced open ->select Ac analysis->enter the amplitude
time delay stop time value.
 Click on the run option ->simulation window opens->place the probe ->output graph is
obtained.

81
DIGITAL TO ANALOG CONVERTER CIRCUIT DIAGRAM

OUTPUT:

82
RESULT:
Thus the LT-SPICE Tool has been studied and Analog to Digital converter & Digital to
Analog circuit is simulated.

83
ASTABLE MULTIVIBRATOR CIRCUIT USING OP-AMP

OUTPUT:

84
 SIMULATION OF ASTABLE MULTIVIBRATOR AND MONOSTABLE
MULTIVIBRATOR USING OP-AMP

EX.NO: 16 DATE:
AIM : To Design the following circuits using LT-Spice
 Astable Multivibrator
 Monostable Multivibrator

SOFTWARE REQUIRED: LT-Spice

PROCEDURE:
 Double click on LT-Spice icon.
 New schematic window open.
 Pick and paste the required component from the library and draw the circuit diagram .
 Complete the connection.
 Save the file by giving file name.
 Click on the run option ->click advanced open ->select Ac analysis->enter the amplitude
time delay stop time value.
 Click on the run option ->simulation window opens->place the probe ->output graph is
obtained.

85
MONOSTABLE MULTIVIBRATOR CIRCUIT USING OP-AMP

OUTPUT:

86
RESULT :

Thus the LT-SPICE tool has been studied and Astable Multivibrator and Monostable
Multivibrator circuit using Op-amp is simulated.

87
ASTABLE MULTIVIBIRATOR USING NE555 CIRCUIT DIAGRAM

OUTPUT:

88
 SIMULATION OF ASTABLEMULTIVIBIRATOR AND MONOSTABLE
MULTIVIBRATOR USING NE555

EX.NO: 17 DATE:
AIM : To Design the following circuits using LT-Spice
 Astable Multivibrator
 Monostable Multivibrator

SOFTWARE REQUIRED: LT-Spice

PROCEDURE:
 Double click on LT-Spice icon.
 New schematic window open.
 Pick and paste the required component from the library and draw the circuit diagram .
 Complete the connection.
 Save the file by giving file name.
 Click on the run option ->click advanced open ->select Ac analysis->enter the amplitude
time delay stop time value.
 Click on the run option ->simulation window opens->place the probe ->output graph is
obtained.

89
MONOSTABLE MULTIVIBIRATOR USING NE555

OUTPUT:

90
RESULT :

Thus the LT-SPICE tool has been studied and Astable Multivibrator and Monostable
Multivibrator circuit using NE555 is simulated.

91