SEEU2012

Electronics
20212022/2
Dr. Nur Najahatul Huda Saris
School of Electrical Engineering,
Faculty of Engineering
UNIVERSITI TEKNOLOGI MALAYSIA
[email protected]
Course Learning Outcomes

1 Apply the basic law and theorems of electronic devices to describe

their basic operation.

2 Apply the basic law, theorems and methods of analysis to solve

complex problem related to circuitry.

3
Work in a team and communicate effectively.

2
Learning Outcomes

i. Describe the basic structure of a BJT.

ii. Explain and analyze basic BJT bias and operation.
iii. Discuss on the function of a BJT as an amplifier.
iv. Discuss the parameters and characteristic of a BJT and its application
in electrical circuit.

3
What is Transistor?
❑Transistors are solid state devices that is used for amplifying,
controlling and generating electrical signal.

❑Transistors are used widely in electronic equipment such as computers,

calculators, radios and communication satellite.

4
What is Transistor?
❑ Two basic types of transistor is bipolar junction transistor (BJT) and
Field Effect Transistor (FET).
❑ Transistor is like 2 diodes connected.

P - TYPE N - TYPE P - TYPE N - TYPE P - TYPE N - TYPE

❑ Each region have different doping concentration.

❑ Transistor is widely been used as switch and amplifier.
5
Introduction to BJT
❑ BJT is bipolar because both majority and minority carriers take part
in the current flow. (a) N-type - electrons as majority carrier
(b) P-type – holes as majority carrier.
❑2 types of BJT: (a) NPN and (b) PNP
❑BJT regions are:
▪ Emitter (E) – send the carries into the base region and then into
the collector.
▪ Base (B)act as control region. Carriers flow depending on the
biased voltage.
▪ Collector (C) – collects the carries.

6
Structure & Symbol of BJT
PNP TYPE NPN TYPE
Base Collector Base
Emitter Collector
Emitter

N P N
P N P

IC(mA) IE(mA)
IB(µA)
B
C E
E C
B
IB(µA)
IE(mA) IC(mA)
IE = IC + IB IE = IC + IB
7
 NPN Transistor Structure
• Very lightly doped.
• Collect the current carriers
collector N
junction
• Very lightly doped.
base P • Control the flow of currents
junction

emitter N • Very heavily doped.

• emit the current carriers

❑ The emitter is rich in current carriers. It send the carriers into the base region and on to the
collector.
❑ The collector collect the carriers.
❑ The emitter emits the carriers.
❑ The base act as a control region. It can allow none, some or many carriers to flow from emitter to
collector.
8
BJT Characteristic & Parameters
❑ βDC – is the ratio of the DC collector current, IC to the DC base
current, (IB)
❑Typical value range from less than 20 to 200 or higher.
IC
β DC =
IB
❑ α DC – is the ratio of the DC emitter current, IE to the DC collector
current, (IC).
❑The value range from 0.95 to 0.99 but always less than 1.
IC  α 
α DC = β= 
IE 1− α  9
BJT Behavior:
Current-Voltage Characteristics
❑The behaviour of the transistor can be represented by current-
voltage (I-V) curves (called the characteristic curves of the device).
❑Input Characteristics
▪ The relation between input current and input voltage for different
values of output voltage
❑Output Characteristics
▪ The relation between output current and output voltage for
different values of input current

10
BJT Basic Operation Region
❑To produce a desired mode of operation, the two P-N junctions must
be correctly biased
❑NPN transistor will be used for illustrationThe operation of the PNP is
the same as for the NPN except that
▪ the roles of the electrons and holes
▪ the bias voltage polarities
▪ the current directions - are all reversed
❑ A single PN junction has two different types of bias: forward and
reverse.
❑ Thus, a 2 PN junction device has four types of bias.

11
BJT Mode of Operation for NPN and PNP
VBC

REVERSE SATURATION
ACTIVE
VE < VB
VC < VB < VE VC < VB

VBE
FORWARD
CUT -OFF
ACTIVE
VE > VB
VC > VB VC > VB > VE

❑Saturation and cut-off operations are important for digital circuits like
switching.
❑Active region are important for amplifier application.
12
Cut-off region

Saturation region

Active region

13
Example – NPN Transistor
Base -Emitter Base - Collector
Operating Region
Junction Junction

Reverse biased Reverse biased

Forward biased Reverse biased

Forward biased Forward biased

❑What are the two (2) main applications of BJT?

14
Exercise -
https://padlet.com/nurnajahatulhuda/hba67po8p9ok
8oun
Figure below illustrate a structure of NPN transistor contain collector (C),
base (B) and emitter (E). Fill in the blank.

❑The base (B) to emitter (E) junction is normally ___________ biased and
the resistance at the junction is __________________.
❑The collector (C) to base (B) junction is normally ____________ biased
and the resistance at the junction is ________________.
❑The smallest current in NPN bipolar junction transistor is the
____________ current.

15
Collector - Base Characteristic Curve Input
Characteristic
❑The characteristic resembles a family of forward biased diode curves
❑IB increases as VCE decreases for a fixed value of VBE

16
Collector Characteristic Curve Output Characteristic

17
 BJT Region Comparison

Active Region Saturation Region Cut – Off Region

❑ B-E junction forward ❑ B-E and C-E junction ❑ B-E and C-E junction
biased are forward biased. are reverse biased.
❑ C- B junction reverse ❑ IB and IC are too big ❑ IB < µA but IC is not
biased but VCE is very small. zero. Avoid this
region for
undistorted signal.
❑ Can be employed to ❑ Suitable region to ❑ Suitable region to
used as voltage and used as logic switch. used as logic switch.
current amplification

18
What is Q – Point? (DC Operating Point)
❑ When the BJT only have DC input (no ac input) it will have specific
value of IC and VCE.
❑ It correspond on the specific point on the DC load line. This point is
called Q – point.
❑ It’s a point on the collector characteristic curve (IC – VCE) with
constant IB.

19
Purpose of BJT Biasing

BJT should be biased to determine its operating

point or Q point.

To ensure whether it is in active region to be

used as amplifier or in saturation or cut-off
region to be used as switch.

A good biasing circuit must have Q – point at

the center of the DC load line to obtain
maximum symmetrical output swing.

20
Q – Point at the center of DC Load line

21
Q – Point NOT at the center of DC Load line

22
 BJT DC Load Line
❑ A straight line intersecting the vertical Saturation Region

axis at approximately IC(sat) and the Q-Point

horizontal axis at VCE(off).
❑ IC(sat) occurs when transistor operating DC Load Line

in saturation region
VCC
I Csat =
RC VCE = 0

❑ VCE(off) occurs when transistor operating

in cut-off region Cutoff Region

VCE( off ) = VCC − I C RC I C =0

23
 BJT DC Load Line .

To make sure that the chosen Q –point is useful for amplifier application, the
Q-point, it is best located at the canter of the DC load line where:
1 1
ICQ = IC(SAT ) and VCEQ = VCC
2 2 24
Exercise

25
Main Types of BJT Biasing Circuit

Fixed Base Bias Circuit

Fixed Base Bias with emitter resistor

(Emitter stabilized bias circuit)

Voltage-Divider Bias Circuit

26
BJT Circuit Analysis: Fixed Bias Circuit

❑ This is common emitter (CE)

configuration
❑ Solve the circuit using HVK
❑ 1st step: Locate capacitors and
replace them with an open circuit
❑ 2nd step: Locate 2 main loops
which;
▪ BE loop
▪ CE loop

27
1st step: Locate capacitors and replace them with
an open circuit

28
2nd step: Locate 2 main loops
Fixed Base Bias Circuit

BE Loop CE Loop

2
1 2

29
BE Loop Analysis Fixed Base Bias Circuit

❑ From HVK;
VCC − I B R B − VBE = 0
1
A

VCC − VBE
IB

 IB =
RB

30
CE Loop Analysis

■ From HVK;
VCC − I C R C − VCE = 0
 VCE = VCC − I C R C
IC ■ As we known;

2 ■ Substituting A with B
I C = I B B

 V − VBE 
I C =  DC  CC 
 RB 

31
BJT Circuit Analysis: Fixed Bias Circuit
VCC
• Taking the Kirchhoff voltage law (KVL) around
IB IC
the B – E loop yield the following equation:
RC
VC VO VCC − I B R B − VBE = 0
RB +
Vi VCE • Solving for IB
VB + VCC − VBE
-
VBE
- IE IB =
RB
VE
• The collector current IC is then given by
 V − VBE 
IC = βI B = β  CC 
 RB 
• The voltage at the base, collector and emitter can be
calculated using V = V − I R
C CC C C

VB = VCC − I B R B
• IC is directly dependent on β. This is unfavourable since β varies with temperature and IC.
When IC is changing, it cause VCE to change. This will change the Q – point of the transistor
and make the fixed base biasing circuit very unstable.
32
Example : Fixed Biasing Circuit
Draw the DC load line and find IBQ , ICQ , VCEQ , VCQ , VEQ and VBQ.
Comment on the location of the Q – point.
Using C - E Loop:
VCC = 8 V VCC − I B R B − VBE = 0
IB
IC VCC − VBE 8 − 0.7
RB RC I B = I BQ = = = 20.28 μA
360 k 2k RB 360k
IC = ICQ = βI B = (100 ) 20.28μ = 2.03mA
+
VCE Using C - E Loop:
+
VBE -
- IE VCC − IC R C − VCE = 0 ................. ( A )
VCE = VCEQ = VCC − ICQ R C = 8 − ( 2.03m  2k ) = 3.94 V
IC (mA)
when IC = 0, VCE = VCE(CUT-OFF) = VCC = 8V
4 VCC 8
when VCE = 0, IC = IC(SAT ) = = = 4 mA
R C + R E 2k
Q - point
2
** The Q – point is in the active
region. Therefore this biasing circuit
VCE(V)
3.94 8 is suitable to be used in amplifier.
33
Example : Fixed Bias CircuitFixed Base Bias Circuit
■ Find IC, IB, VCE, VB, VC, VBC? (Silicon
transistor) Construct the DC load line
then determine the operation region
of the Q – point.
■ Answers;
IC = 2.35 mA
IB = 47.08 μA
VCE = 6.83V
VB = 0.7V
VC = 6.83V
VBC = -6.13V
34
step 1 : open all capacitors and redraw the circuit.
step 2 :
B - E Loop KVL
12 - I B R B - VBE = 0
12 - VBE 12 - 0.7
IB = = = 47.1 μA
RB 240k √
using relation I E = (1 + β ) I B and I E  I C
I E  I C = (1 + 50 ) 47.1 μ = 2.40 mA
√
step 3
C - E Loop KVL
12 - I C R C - VCE = 0
VCE = 12 - I C R C = 12 − (2.40 m  2.2k ) = 6.72V
√

35
 From the circuit, VE = 0V. √
it is known that VBE = 0.7V
VBE = VB − VE
√
VB = VBE = 0.7 V
VC
VB at the collector (C) terminal :
VCE = VC - VE and VE = 0V
VE VC = VCE = 6.72 V
at the base (B) terminal :
VBC = VB - VC
VBC = VB - VC = 0.7 − 6.72 = − 6.02 V √

36
Exercise : Fixed Bias Circuit
For the biasing circuit shown, determine the Q – point (ICQ , VCEQ) and
confirm its operation region. Construct the DC load line and evaluate the
location of the Q – point. Given β = 100. Redo if β is changed to 129.

VCC = 12 V
IB
IC
RB RC
75 k 1k
+
VCE
+
VBE -
- IE

37
 Load Line Analysis – Fixed Bias Circuit

• We investigate how the actual Q-point is determined.

• Referring to the figure below (output loop), a straight line can be drawn at
the output characteristics curve. This line is called the load line.
• This line connects each separate Q-point.
• At any point along the load line,
values of IB, IC and VCE can be picked
from the graph.
• The process to plot the load line
are as follows:
38
 Load Line Analysis – Fixed Bias Circuit
 Step 1:
Apply KVL at output loop, VCE = VCC – ICRC (1)
Choose IC = 0 mA. Substitute into (1), we get
VCE = VCC (2) → intersects the x-axis
 Step 2:
Choose VCE= 0V and substitute into (1), we get
IC = VCC/RC (3) → intersects the y-axis
 Step 3:
Joining these two points defined by step (2) & (3), we get a
straight line that can be drawn as in the next figure.

39
Load Line Analysis – Fixed Bias Circuit

40
 Example
Given the load line in the figure below, define the Q-point & determine
the required values of VCC, RC and RB for a fixed bias configuration.
(Given IBQ at 17 A)
VCC = 40 V
V
IC = cc
R
c
RC = 2.67 k

at Q - point; I B = 17 A
RB = 2311 k

41
Disadvantages of Fixed Biasing
Fixed Base Bias Circuit
❑ Unstable – because it is too dependent on β and produce change of Q-
point
❑For improved bias stability , add emitter resistor to dc bias.

42
Fixed Bias with emitter resistor (Emitter
Stabilized Bias)
• An emitter resistor, RE is added to
improve stability
• Solve the circuit using HVK
• 1st step: Locate capacitors and replace
them with an open circuit
• 2nd step: Locate 2 main loops which;
➢BE loop
Resistor, RE added ➢CE loop

43
1st step: Locate capacitors and replace them
with an open circuit

44
2nd step: Locate 2 main loops
Fixed Base Bias with Emitter Resister

BE Loop CE Loop
1

2
1 2

45
BE Loop Analysis Fixed Base Bias with Emitter Resister

1 ■ From HVK;
VCC − I B RB − VBE − I E RE = 0

Recall; I E = (  + 1) I B
Substitute for IE
VCC − I B RB − VBE − (  + 1) I B RE = 0
VCC − VBE
 IB =
RB + (  + 1) RE

46
CE Loop Analysis Fixed Base Bias with Emitter Resister

■ From HVK;
VCC − I C RC − VCE − I E RE = 0
■ Assume;
2 I E  IC
■ Therefore;
VCE = VCC − I C ( RC + RE )

47
Example Emitter Stabilized Bias
■ Find ICQ, IBQ, VCEQ, VBQ, VCQ, VEQ
& VBCQ? (Silicon transistor);

■ Answers;
ICQ = 2.01 mA
IBQ = 40.1 μA
VCEQ = 13.97V
VBQ = 2.71V
VEQ = 2.01V
VCQ = 15.98V
VBCQ = -13.27V 48
step 1 : open all capacitors and redraw the circuit.
step 2 :
B - E Loop KVL
20 - I B R B - VBE - I E R E = 0
using relation I E = (1 + β ) I B
20 - I B R B - VBE - R E (1 + β ) I B = 0 √
20 - VBE 20 - 0.7
IB = = = 40.1 μA
R B + R E (1 + β ) 430k + 1k (1 + 50)
using relation I E = (1 + β ) I B and I E  I C
√
I E  I C = (1 + 50) 40.1 μ = 2.05 mA
step 3
C - E Loop KVL
20 - I C R C - I E R E VCE = 0
VCE = 20 - I C R C - I E R E √
= 20 − (2.05 m  2k ) − (2.05 m 1k ) = 13.85V 49
it is known that VBE = 0.7V
and VBE = VB - VE and VE = I E R E
 VE = I E R E = 2.05m 1k = 2.05 V
 VB = VBE + VE = 0.7 + 2.05 = 2.75 V
from VCE = VC - VE
 VC = VCE + VE = 13.85 + 2.05 = 15.9 V
VBC = VB - VC = 2.75 − 15.9 = − 13.15V
this BJT is biased in FORWARD ACTIVE

50
Load Line Analysis – Emitter (Stabilized Bias) Circuit

• For VCE = 0, the transistor will be in saturation region

• Taking the transistor’s saturation equation: I C = VCC
sat
RC + RE

• For IC = 0: I C  I E
VCC − VCE
IC = =0
RC + RE
VCE = VCC

51
Load Line Analysis – Emitter (Stabilized Bias) Circuit
So, the load-line becomes:

52
Exercise : Emitter Stabilized Bias
Find ICQ, IBQ, VCEQ, VBQ, VCQ, VEQ & VBCQ? (Silicon transistor). Construct
the DC load line and determine the transistor operation region
VCC = 20 V
IB
IC
RB RC
2.7 M 10 k
+
VCE
+
VBE -
- IE

RE
3.3 k
53
Exercise Test 2 2013/2014/2
A BJT amplifier circuit in Figure Q2(a) has the following specifications: IBQ = 30µA and VBE = 0.7V.
(i) Determine Q-point (ICQ , VCEQ) of the circuit using the output characteristic graph in Figure Q2(b)
[Ans: ICQ = 4.2mA : VCEQ = 11.5V]
(ii) Calculate β at the Q-point [Ans: β=140]
(iii) Calculate RB [Ans: 692kΩ]
(iv) What is the effect on the Q-point of the circuit, when RB is decreased?
[Ans: IB will increase Vand thus the Q-point will move upwards]
CC
12V

RC C2
RB 2.4kΩ 20 µF
RS
10 kΩ
C3 RL
C1 IBQ = 30µA 50 µF 100Ω
10µF
Vin
15 mV RE RE2
600Ω 2 kΩ

VEE
-12V

54
55
Exercise
Determine IBQ , ICQ , VCEQ , VB, VC, VE. Given β= hFE= 100 and VBE= 0.7V.
Sketch the DC load line of the circuit.
[Ans: IBQ =29.18uA, ICQ =2.92 mA, VCEQ=8.61V, VB=5.12V, VC=12.99V, VE =
4.38V] V
CC
20V

RC C2
RB 20 µF
2.4kΩ
510 kΩ
RS
10 kΩ
C3 RL
C1 50 µF 100Ω
10µF
Vin
15 mV RE RE2
1.5kΩ 2 kΩ

56
Voltage Divider Bias Circuit
❑ Provides good Q-point stability with a
single polarity supply voltage
❑Solve the circuit using HVK
❑ 1st step: Locate capacitors and replace
them with an open circuit
❑ 2nd step: Simplified circuit using
Thevenin Theorem
❑3rd step: Locate 2 main loops which;
▪BE loop
▪CE loop

57
Voltage Divider Bias Approximation Analysis

For approximation analysis we can assume

VTH=VB
but the following condition must satisfy:

βRE ≥ 10R2

58
1st step: Locate capacitors and replace them with
Voltage Divider Bias Circuit
an open circuit

59
2nd step: : Simplified circuit using Thevenin Theorem
Voltage Divider Bias Circuit

From Thevenin Theorem;

Thevenin Theorem;
R1  R2
RTH = R1 // R2 =
R1 + R2
R2
VTH = VCC
R1 + R2

Simplified Circuit

60
3rd step: Locate 2 main loops

BE Loop CE Loop

2
2

1 1

61
BE Loop Analysis

■ From HVK;
VTH − I B RTH − VBE − I E RE = 0

Recall; I E = (  + 1) I B
Subtitute for IE
1 VTH − I B RTH − VBE − (  + 1) I B RE = 0
VTH − VBE
 IB =
RRTH + (  + 1) RE

62
CE Loop Analysis
Voltage Divider Bias Circuit

■ From HVK;
VCC − I C RC − VCE − I E RE = 0
■ Assume;
2
I E  IC
■ Therefore;
VCE = VCC − I C ( RC + RE )

63
Example Voltage Divider Bias Circuit: Single Supply
■ Find RTH, VTH, ICQ, IBQ, VCEQ, VBQ, VCQ, VEQ & VBCQ? (Silicon transistor).
Construct the DC load line
■ Answers;
RTH = 3.55 kΩ
VTH = 2V
ICQ = 0.85 mA
IBQ = 6.05 μA
VCEQ = 12.9V
VBQ = 1.978V
VEQ = 1.275V
VCQ = 13.5V
VBC = -12.81V 64
step 1 : open all capacitors and redraw the circuit.
step 2 : calculate Vth and R th
3.9k
Vth =  22 = 2V
3.9k + 39k
3.9k  39k
R th = = 3.55 kΩ
3.9k + 39k
then redraw the circuit.
step 3 :
B - E Loop KVL
VTH - I B R TH - VBE - I E R E = 0
2 - I B (3.55 k ) - 0.7 - I E (1.5k ) = 0
using relation I E = (1 + β ) I B
2 - I B (3.55 k ) - 0.7 - I B (1 + β )(1.5k ) = 0
2 - 0.7
IB = = 6.05 μA
3.55k + 1.5k (1 + 140 )
using relation I E = (1 + β ) I B and I E  I C
I E  I C = (1 + 140 ) 6.05 μ = 0.85 mA 65
C - E Loop KVL
VCC - I C R C - VCE - I E R E = 0
assume I C  I E
VCE = VCC - I C R C - I E R E = 22 − 10k (0.85m ) − 1.5k (0.85m )
VCE = 12.19V
it is known that VBE = 0.7V
and VBE = VB - VE and VE = I E R E
 VE = I E R E = 0.85m 1.5k = 1.28 V
 VB = VBE + VE = 0.7 + 1.28 = 1.98 V  VTH
from VCE = VC - VE
 VC = VCE + VE = 12.19 + 1.28 = 13.51 V
VBC = VB - VC = 0.7 − 13.51 = − 12.81V
this BJT is biased in FORWARD ACTIVE
66
Example Voltage Divider Bias with 2 supply
Determine IBQ , ICQ , VCEQ , VBQ , VCQ , VEQ. Given β= hFE= 120 and VBE= 0.7V.
[Ans: IBQ = 35.35µA, ICQ = 4.24 mA, VCEQ = 20.92 V, VBQ = –11.6 V,
VCQ=8.55V, VEQ=-12.37V]

67
 step 1 : open all capacitors and draw the DC equivalent circuit
Solution step 2 : calculate Vth and R th

 (+ VCC ) +  (− VCC )
R2 R1
Vth =
R1 + R 2 R1 + R 2

 (+ 20 ) +  (− 20 ) = − 11.54V
2.2k 8.2k
Vth =
2.2k + 8.2k 2.2k + 8.2k
2.2k  8.2k
R th = = 1.73kΩ
2.2k + 8.2k
step 3 :
B - E Loop KVL
VTH - I B R TH - VBE - I E R E + VEE = 0
using relation I E = (1 + β ) I B
VTH - I B R TH - VBE - (1 + β ) I B R E + VEE = 0
- 11.54 - I B (1.73k ) - 0.7 - (1 + 120 ) I B (1.8k ) + 20 = 0
20 - 11.54 - 0.7
I B = I BQ = = 35.35 μA
1.73 k + 1.8k (1 + 120 )
using relation I E = (1 + β ) I B and I E  I C
I E  I C  I CQ = (1 + 120 ) 35.35 μ = 4.28 mA

68
C - E Loop KVL
VCC - I C R C - VCE - I E R E + VEE = 0
assume I C  I E
VCE = VCC - I C R C - I E R E + VEE = 20 − 2.7k (4.28m ) − 1.8k (4.28m ) + 20
VCE = VCEQ = 20.74V
It is known that VBE = 0.7V
and VBE = VB - VE and VE = I E R E − VEE
 VE = I E R E − VEE = 1.8k (4.28m ) − 20 = - 12.3 V
 VB = VBE + VE = 0.7 − 12.3 = - 11.6V  VTH
from VCE = VC - VE
 VC = VCE + VE = 20.74 − 12.3 = 8.44 V

69
Exercise FINAL SEU 2012 2010/2011/2
Refer to a small signal amplifier circuit in Figure Q3. The transistor’s parameter are:
DC = AC = 100, VBE = 0.7V, VT = 26mV
I. Draw the DC equivalent circuit.
II. Calculate the base and collector current, IBQ and ICQ. [Ans: IBQ=18.7µA,
ICQ=1.87mA]
III. Calculate the collector to emitter voltage, VCEQ. [Ans=VCE=6.3V]
IV. Calculate new Q-point (IBQ and ICQ) if R2 is halved [Ans: IB=7.7µA, IC=0.77mA]
VCC
+12V

RC CC
R1 2k 10 uF
17.8k ICQ

Rs
IBQ
VCEQ
RL
VO
VS 2k
CE
Vin R2 100 uF
5.1k RE
1k

70
Load Line Analysis - Voltage Divider Bias
❑For the load-line analysis, the cutoff region still results the same as the
fixed bias and emitter bias configuration:

VCE = VCC I C =0

❑And for the saturation region:

VCC
I Csat =
RC + RE VCE = 0

71
Exercise Final Exam 2013/2014/2
The dc load line of the circuit and the characteristic is as shown. Based on the
figures,
(i) Determine the common emitter current gain, β, and the emitter current, IE.
[Ans: β = 75, IE= 5.71mA]
(ii) Determine RB and RC such that the circuit yields the given Q-point. Given VBE =
0.7 V, VBB = 6 V, and RE = 600 Ω. [Ans: RB=25kΩ, RC=400Ω]

RC

RB
VCC

VBB RE

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DC Biasing Circuit for PNP BJT
❑All the previous analysis and technique used in NPN BJT can be applied
to PNP BJT.
❑This is because the amount of current is the same; IE=IB+IC
❑ The major different is the direction of current flowing.
❑ PNP BJT current flow from emitter to collector.

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 Example Voltage Divider PNP
Determine IBQ , ICQ , VCEQ ,VB,VC and VE. Given β = 120 and VEB = 0.7.
[Ans: IBQ =17.4uA, ICQ=2.09 mA ,VCEQ=-10.68, VB =-3V, VC =-12.98V and VE = -
2.32V]

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 step 1 : open all capacitors and draw the DC equivalent circuit.
Solution
step 2 : calculate Vth and R th
10k
Vth =  −18 = -3.16V
10k + 47k
10k  47k
R th = = 8.25 kΩ -
10k + 47k VEC
then redraw the circuit. +
step 3 :
E - B Loop KVL
I E R E - VEB VTH - I B R TH + VTH = 0
using relation I E = (1 + β ) I B
I B (1 + β ) R E - VEB - I B R TH + VTH = 0
I B (1 + 120 )(1.1k ) − 0.7 − I B (8.25 k ) + 3.16 = 0
3.16 - 0.7
I B = I BQ = = 17.4 μA
8.25 k + 1.1k (1 + 120 )
using relation I E = (1 + β ) I B and I E  I C
I E  I C  I CQ = (1 + 120 )17.4 μ = 2.09 mA
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E - C Loop KVL
- I E R E − VEC − I C R C + VCC = 0
assume I C  I E
VEC = I E R E − I C R C + VCC = −1.1k (2.09m ) − 2.4k (2.09m ) + 18
VEC = VECQ = 10.69V  VCE = VCEQ = - 10.69V
it is known that VEB = 0.7V
and VEB = VE - VB and VE = - I E R E
 VE = −I E R E = −2.09m 1.1k = −2.3 V
 VB = VE − VEB = −2.3 − 0.7 = - 3 V
from VEC = VE - VC
 VC = VE − VEC = −2.3 − 10.69 = −12.99 V

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Example Fixed Bias with 2 supply
Determine IBQ , ICQ , VCEQ , VB, VC, VE. Given β= hFE= 100and VEB= 0.7V.
[Ans: IBQ=10.49uA, ICQ=1.05mA, VCEQ=-13.96V, VB=0.2V VC=-12.86V and
VE =0.93V]

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Solution
step 1 : open all capacitors and draw the DC equivalent circuit.
step 2 :
E - B Loop KVL
20 - I E R E - VEB - I B R B = 0
using relation I E = (1 + β ) I B
20 - (1 + β ) I B R E - VEB - I B R B = 0
20 - VEB 20 - 0.7
IB = = = 10.49 μA
R B + R E (1 + β ) 22k + 18k (1 + 100 )
using relation I E  I C
I E  I C = (1 + 100 )10.49 μ = 1.06 mA

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step 3
E - C Loop KVL
VEE - I E R E - VEC - I C R C + VCC = 0
20 - 18k (1.06 ) - VEC - 6.8k (1.06 ) + 20 = 0
VEC = 20 - 18k (1.06 ) - 6.8k (1.06 ) + 20
VEC = VECQ = 13.73V
 VCE = VCEQ = - 13.73V
We know  VEB = VE - VB and VE = −I E R E + VEE
Therefore VE = −I E R E + VEE = (- 1.06m )18k + 20 = 0.92V
 VB = VE − VEB = 0.92 − 0.7 = 0.22V
and VC = VE − VEC = 0.92 − 13.73 = − 12.81V

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Exercise : Design
Determine all the resistors RE, RC, R2 and R1 values in designing the fixed
bias with emitter-stabilized circuit as below. Given βmin= hFE(min)= 80 and
VBE= 0.7 V, VCEQ= 8 V and ICQ= 10 mA. Assume VE= (1/10)VCC and βRE =10R2.
[Ans: RE= 197.53Ω,RC =1kΩ,R1 = 10.12 kΩ, R2=1.58kΩ]

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Exercise
Calculate the value for RC, RB, VCE and β for a fixed bias circuit if VCC= 24V, IB
= 20µA dan IC = 3mA. Transistor must properly biased to achieve maximum
symmetrical output swing for the voltage and current. Given VBE = 0.7V.

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Example
Transistor Specification & Data Sheet
Answer the following questions by referring to the partial transistor data
sheet for transistor 2N3904.
a) What is the maximum collector to emitter voltage?
b) How much continuous collector current can the 2N3904 handle?
c) How much power can 2N3904 dissipate if the ambient temperature is
25° C?
d) What is the minimum and maximum β?

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Data Sheet for BJT

83
Data Sheet for BJT

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