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Converter Utilization Ratio Enhancement in The THD Optimization of Cascaded H-Bridge 7-Level Inverters

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0% found this document useful (0 votes)
35 views9 pages

Converter Utilization Ratio Enhancement in The THD Optimization of Cascaded H-Bridge 7-Level Inverters

Uploaded by

Masudur Rahman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Journal of Power Electronics, Vol. 16, No. 1, pp.

173-181, January 2016 173

http://dx.doi.org/10.6113/JPE.2016.16.1.173
JPE 16-1-19 ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Converter Utilization Ratio Enhancement in the THD


Optimization of Cascaded H-Bridge 7-level Inverters
Reza Khamooshi†, Alireza Namadmalan*, and Javad Shokrollahi Moghani**
†,**
Department of Electrical and Electronics Engineering, Amirkabir University of Technology, Tehran, Iran
*
Department of Electrical and Computer Engineering, Jundi-Shapur University of Technology, Dezful, Iran

Abstract
In this paper, a new technique for harmonic optimization in cascaded H-bridge 7-level inverters is proposed. The suggested
strategy is based on minimizing an objective function which simultaneously optimizes the converter utilization and Total
Harmonic Distortion (THD). The Switch Utilization Ratio (SUR) is formulized for both the phase and line-line voltages of a
7-level inverter and is considered in the final objective functions. Based upon the SUR formula, utilization ratio enhancement
will reduce the value of feeding DC links, which improves the efficiency and lifetime of the circuit components due to lower
voltage stresses and losses. In order to achieve more effective solution in different modulation indices, it is assumed that the DC
sources can be altered. Experimental validation is presented based on a three-phase 7-level inverter prototype.

Key words: Cascaded H-bridge multi-level inverter, Optimization Methods, Switch Utilization Ratio, Total Harmonic Distortion

THD calculation, line-line harmonic minimization is


I. INTRODUCTION
presented in [16].
Multi-level inverters are widely utilized in various areas DC sources operation, play an important role in efficiency
like STATCOM (Static Compensators) [1], [2], machine and operation of multi-level converters. As a result, many
drives [3], [4], Flexible AC Transmission Systems (FACTS) studies revolve around efficient control of DC links. By
[5], and photovoltaic and wind energy applications [6], [7]. cascading a flying capacitor and an H-bridge inverter, a five
Among the different topologies and structures, owing to some level inverter with a single DC source is proposed in [17].
characteristics like modular structure, extendibility and Furthermore, by using switched DC sources, a multi-level
electromagnetic compatibility, cascaded H-bridge inverters structure with reduced number of components is designed in
are the most popular [8]. Different switching techniques and [18]. The voltage control of capacitors by phase shift
control algorithms are employed to control these inverters modulations in configurations which use a single DC source
[9]-[12]. In most of these methods, the main purpose is is discussed in [19]. Owing to the high penetration of energy
harmonic reduction in generated output voltage. A noticeable conversion in renewable systems, inverters are increasingly
portion of research on multi-level inverters has focused on employed as interfaces between customers and renewable
THD minimization or improving previous harmonic rejection energy resources. Hence, the operation and design of
techniques. The adaptive harmonic elimination technique in inverters can greatly affect the performance and cost of a
[13] and the harmonic mitigation method for inverters with system. An inappropriate design will have an adverse effect
unequal DC links in [14] are among instances in this area. on the switch rating, DC links performance, component
Based on the repetitive control algorithm, harmonic rejection expenses, etc.
in circulating current for multi-level converters is In this paper, a novel method for THD minimization in
investigated in [15]. Furthermore, based on the line voltage cascaded H-bridge inverters is presented. For a
semiconductor switch, the ratio of the output transferred
Manuscript received Jul. 12, 2015; accepted Sep. 8, 2015
Recommended for publication by Associate Editor Liqiang Yuan. power to the power rating of the switch indicates how much

Corresponding Author: [email protected] of the switch’s capability is exploited and in a typical design,
Tel: +98-913356-0929, Amirkabir University of Technology. the switches rating are designed conservatively for safety
*
Dept. of Electrical &Computer Eng., Jundi-Shapur Univ. of Tech., Iran
**
Dept. of Electrical &Electron. Eng., Amirkabir Univ. of Tech., Iran purposes. In this study, the SUR is defined and enhanced in

© 2016 KIPE
174 Journal of Power Electronics, Vol. 16, No. 1, January 2016

terms of harmonic optimization for phase and line-line


operations. This enhancement in the utilization ratio will V DC 1
reduce the DC sources. As a result, the voltage stresses,
V Phase
losses and lifetime of the switches will be improved. In order
to attain a more effective solution for different modulation
indices, alterable DC sources are utilized.
This paper is organized as follows. In Section II, the   V DC 3
topology and switching strategies of H-bridge inverters are V DC 2  
V DC 2
reviewed. SUR and THD definitions and expressions are
 
V DC 1
presented in Sections III and IV. The proposed technique is
explained in Section V. Simulation and experimental results
are presented in Sections VI and VII. Finally, section 8
concludes the paper.
V DC 3
II. CASCADED H-BRIDGE MULTI-LEVEL INVERTERS
Fig. 1 shows a 7-level cascaded inverter, which is formed
by series connection of H-bridges, alongside its output
waveform. The output staircase voltage is generated by
synthesizing the DC source voltages which feed each cell. In Fig. 1. 7-level cascaded H-bridge inverter configuration.
the first half cycle, the ith cell generates one voltage level
maximum loading is Vfund×Imax in the SUR formula which is
which rises at θi and goes down at π-θi with a magnitude of
defined in (1).
VDCi. There are various methods for harmonic reduction in the
output voltage of these inverters. The Optimized V  I m ax
SUR  f un d

Minimization of THD (OMTHD) and Selective Harmonic N


(1)
4 V Ti I Ti
Elimination (SHE) are examples of these methods. The i 1

OMTHD method minimizes the THD by using different Here Vfund is the rms voltage, and Imax is the rms current both
optimization algorithms. On the other hand, a set of nonlinear at a 50 Hz frequency and maximum rated output. N is the cell
equations, which contain lower order harmonics are solved in numbers, and VTi and ITi are the rating voltage and current
the SHE method to eliminate harmonics in the output of the ith cell. It should be noted that for safe operation of the
waveform. Efficient operation of the inverters is not inverter, overdesign coefficients are considered for the rating
considered in the discussed methods which can degrade the
voltage and current. In this paper, these coefficients are set to
performance of the system. In addition, the DC link
1.25. However, they are not shown for the sake of simplicity.
converters, switch ratings, and cost of the system can be
affected by inefficient control and operation of the inverters A. Phase Operation Utilization Ratio
in the above mentioned methods. In this section, the SUR formula is defined for single phase
operation. Expression (2) is written for the output voltage of a
III. SWITCH UTILIZATION RATIO IN H-BRIDGE 7-level inverter according to the Fourier expansion. The
INVERTERS fundamental rms phase voltage is also expressed in (3).
4
Intermediate converters play a major role in the Vn  Vdc1 cos n1   Vdc 2 cosn2   Vdc3 cos n3  (2)
performance of energy systems and the cost of produced n
energy. The SUR in a converter represents the ratio of the
2 2
delivered energy and the power rating of the utilized V dc1 cos 1  V dc 2 cos 2  V dc 3 cos 3 
V rmsp 1  (3)
semiconductor switches. In order to efficiently exploit the 
power handling capability of switches and to enhance the In equation (4), the per unit value for the phase voltage
amount of delivered energy in a typical converter, utilization main component is obtained.
ratio optimization must be considered. Furthermore according p1
V rms V dc 1 cos 1  V dc 2 cos  2  V dc 3 cos 3 
to the SUR formula, SUR enhancement diminishes the DC V pp.u1.  
6 2 3 (4)
links which in turn lowers the voltage stresses and losses and
improves the lifetime of an inverter. 
In order to define a formula for the SUR, it is assumed that The value of VTi in each H-bridge is equal to its feeding
the load is inductive enough and that its current is sinusoidal. source and is based upon each cell’s DC link. The value of ITi
The output rms volt-ampere at the fundamental frequency and is also defined as:
Converter Utilization Ratio Enhancement … 175

I Ti  2I max (5) THDphase 



Where Imax is the maximum rms current at the fundamental
Vdc1 2  1  Vdc1  Vdc2  3  2   Vdc1  Vdc2  Vdc3   3 
2 2 2 
frequency. Finally, by substituting (3) and (5) into equation    2  1
(1), the phase SUR is obtained (6). 
Vdc1 cos1  Vdc2 cos2   Vdc3 cos3 
2
4 
V dc 1 cos 1  V dc 2 cos  2  V dc 3 cos  3   
SUR phase  (6)  
2 V dc 1 V dc 2 V dc 3  (13)

B. Line operation utilization ratio B. Line Operation THD


The line voltage rms value is expressed in (7) and is The line voltage of an H-bridge inverter, equation (14),
does not have a constant form at different switching angles.
different from the phase voltage in a 3 coefficient. The per
However, it is possible to integrate its waveform and obtain
unit value of the line voltage is also defined in (8).
an rms value similar to [16], which can be expressed by (15).
2 6 Va and Vb are the phase voltages with a 120o phase difference.
l1
Vrms  3Vrms
p1
 Vdc1 cos1 Vdc2 cos2 Vdc3 cos3  (7)
 By substituting (7) and (15) into (11), the THD of the line
voltage is calculated and expressed in (16).
Vrms
l1
Vdc1 cos1   Vdc 2 cos2   Vdc 3 cos3 
l1
Vp.u.   (8) V line
   V a phase   V b phase   (14)
6 6 3
The VTi in the line SUR is similar to the phase section and 2
1
   d 
line 2
is equal to its feeding DC link. In addition, ITi is 2 times V rms V line (15)
2 0
greater than Imax. Finally, the line SUR is expressed in
equation (9).
 V rms
2
V rms
2

THD line 
,line ,L 1
l1
3Vrms   (16)
SURline  (9) 
2
V rms ,L 1 
12 2 Vdc1  Vdc 2  Vdc 3 
By substituting (7) into (9), the line SUR is obtained which
according to (10) is equal to the phase SUR.
V. PROPOSED TECHNIQUE FOR SUR
SURline 1 ,2 ,3   SUR phase 1 ,2 ,3  (10)
CONSIDERATION IN HARMONIC OPTIMIZATION
In this section, the proposed technique for utilization ratio
IV. TOTAL HARMONIC DISTORTION enhancement is investigated. This method is based on
minimizing an objective function which simultaneously
The phase and line voltage THD of a 7-level inverter is optimizes the THD and the SUR. To achieve this goal, two
formulized in this section. According to (11), the THD for a approaches are proposed in this paper. In the first approach,
waveform is defined as the ratio of all of the harmonic an objective function that contains the fundamental
components and the fundamental rms value. component adjustment, the THD, and the SUR inverse
formula is minimized for each modulation index. This
 V rms
2
V 1 ,rms
2

THD   2  (11) approach is called the Variable Modulation (VM) index
 V 1 ,rms  method. On the other hand, in the second technique, the
objective function considers only the THD and SUR inverse
A. Phase Operation THD formula, and the optimal index is obtained as a result of the
The phase voltage rms can be obtained by taking the optimization. In this method, which is called the Constant
integral of the output voltage as expressed in (12). Modulation (CM) index technique, the obtained results are
applied for the entire range of the output voltage.
Vdc1  2  1   Vdc1  Vdc2  3  2   Vdc1  Vdc2  Vdc3    3 
2 2 2 

2  A. Variable Modulation (VM) Index Method


phase
Vrms 
 As mentioned before, the objective function in this method
2
contains three main parts. The first one is the fundamental
(12) component adjustment formula in which the subtraction of
By substituting (3) and (12) into formula (11), the phase the desired modulation index from the fundamental voltage
voltage THD is obtained (13). component is considered. The THD and the inverse value of
the SUR are the 2nd and 3rd part of this objective function,
176 Journal of Power Electronics, Vol. 16, No. 1, January 2016

respectively. This formula is expressed as follows: VI. SIMULATION RESULTS


O bj . Function  10  M  V 1 In this section, a simulation is performed based on the
1 (17) suggested algorithms. Due to the non-linear nature of the
 T HD  suggested functions, the Genetic Algorithm (GA) which is a
SUR
powerful evolutionary optimization method is employed. The
The 10 coefficient in (17) is for emphasizing the GA method produces a solution for optimization problems by
fundamental component adjustment versus the THD and SUR using techniques, which are inspired by natural evolution. In
optimizations. The following constraint must be satisfied by this method, a population of initial solutions to a problem
the obtained switching angles. (usually a target function) is evolved and eventually the best
 solution is achieved. In this paper, the population size is equal
0  1   2   3  (18) to 20 and the number of generations is set to 1000. In order to
2
get a better comparison, the CM algorithm is also performed
Where θi denotes the switching angles in radians. In this
without SUR consideration and results obtained by the
method, the objective function must be minimized in each
OMTHD with constant DC links are presented. The
predefined M. Furthermore, based on the operation of the
mentioned techniques are thoroughly compared in terms of
inverter, a suitable formula for the THD (single phase or
the phase and line operations of the inverter to demonstrate
three-phase) must be replaced in (17). Finally, after achieving
the effectiveness of the suggested schemes.
results, in order to obtain different output voltages, the values
of the switching angles and DC sources, which are between 0 A. Single Phase Operation
and 1p.u. must be altered according to the obtained results.
1) Variable Modulation (VM) Technique: In the suggested
B. Constant Modulation (CM) Index Method objective function (17), the values of V1, SUR, and THD are
replaced with (4), (6) and (13) respectively. The value of M
In the CM approach, the proposed objective function
can vary from 0 to 1 and the objective function is minimized
considers the THD and the inverse value of the SUR. The
over the all of the values of M. The obtained optimum
main difference between this method and the first proposed
switching angles, DC sources and output voltage adjustments
approach is that in the first one, the minimization is applied to
are depicted in Fig. 2(a), (b) and (c), respectively. The
the objective function for each predefined M while in this
utilization ratio versus the output per unit voltage is plotted in
technique, the minimization is executed one time and the
Fig. 4. The utilization factor is between 0.09 and 0.101 over
obtained optimum DC source values and switching angles are
the entire range of the output voltage. According to Fig. 3(a),
utilized for the all values of the output voltage. The suggested
the harmonic level is lower than 15% for voltages from0.1 to
objective function for this technique is expressed in (19).
0.9, and it reaches higher values at the unity voltage.
1 2) Constant Modulation (CM) Technique: In this scheme, the
O bj . Function  T H D  (19) SUR is maximized in the harmonic optimization. The main
S UR
component adjustment is not considered in the objective
Like the first approach, the constraint for the switching function and the optimum modulation index is one of the
angles presented in (18) must be satisfied. After optimization, obtained solutions. By substituting (6) and (13) into equation
the results can only be used in a certain M which is obtained (19), the optimum switching angles, DC sources, THD, SUR
by optimization. In order to operate at a different output
and modulation indexes are tabulated in Table. I.
voltage, the DC sources must be altered according to 3) Analysis and Comparison: A comparison of the results
expression (20). obtained by four methods is presented in this section
o ld new including; 1) the standard OMTHD with constant DC sources,
V M
V d c in e w  i 3
dc i
 o ld 2) the CM method without SUR consideration, 3) the
M (20)
V o ld
dc i
proposed CM technique and 4)the proposed VM technique.
i 1 The THD and SUR values obtained by these methods are
depicted in Fig. 3(a) and (b). Comparing these results
is the updated value for the ith DC source,
new
Where V dc i
indicates that standard OMTHD produces higher THD in
old
V dc i is the value of the ith DC source obtained by comparison with the other approaches. The SUR values
obtained with this method are also lower than the other
new old
minimization, and M and M are the desired and the approaches for voltages under 0.8 and the difference is
old modulation indices, respectively. The generated switching significant at lower p.u. voltages. The two proposed SUR
angles remain unchanged which produces constant THD and optimization techniques (CM and VM) produce same THD
SUR in different output voltages. and SUR for lower output voltages. Meanwhile at higher
Converter Utilization Ratio Enhancement … 177

DC source 1
DC source 2
Tetta3 DC source 3

Modulation index
DC sources values
Switching angles

Tetta2

Tetta1

Output voltage (p.u.) Output voltage (p.u.) Output voltage (p.u.)


(a) obtained by VM method for phase operation:
Fig. 2. Simulation results (b) (c) sources; (c) Voltage
(a) Switching angles (degree); (b) DC
adjustment.

Fig. 3. Comparison between the results obtained by 4 techniques for phase operation: (a) THD; (b) SUR; (c) Summation of DC sources.

TABLE I TABLE II
OPTIMUM PARAMETERS OBTAINED BY CM METHOD COMPARISON BETWEEN OBTAINED RESULTS BY PROPOSED CM
(PHASE OPERATION) METHOD AND CM METHOD WITHOUT SUR CONSIDERATION
Optimum Modulation Index= 0.53 (PHASE OPERATION)
Switching angles DC sources Methods THD% SUR DC sum
THD% SUR
(degree) (p.u.) Proposed CM method 13.91 0.0908 2.356
θ1 θ2 θ3 VDC1 VDC2 VDC3 CM method without SUR 11.47 0.0851 2.513
13.91 0.0908
7.73 23.60 40.88 0.62 0.60 0.57

voltages, the CM method is more effective from the harmonic


point of view. Finally, a summation of the DC source values
is plotted in Fig. 3(c), which is constant in the standard
SUR (Phase operation)

OMTHD and higher in the other methods at all voltages


under 0.8. At lower voltage levels, the two proposed
approaches show the same performance while at higher
voltages, the proposed VM is preferred. The DC source
summation of the CM method without SUR optimization is
always higher than the two proposed methods.
The THD, SUR, and DC link summations obtained by the
CM method are presented in Table. II for both with and
without the SUR cases. An increase in the THD (2.44%) is
observed when the SUR is considered and it can be seen that Output voltage (p.u.)
the SUR is enhanced about 6.69% and the DC sum is Fig. 4. SUR obtained by proposed VM method for phase
decreased 6.37% at an output voltage of 0.7. operation.

B. Line-Line Operation with (8), (9), and (16), respectively. Having M varied
1) Variable Modulation (VM) Technique: Like the phase between 0 and 1, the function is minimized. The optimum
section, theV1, SUR, and THD in function (17) are substituted switching angles, DC sources, and output voltage adjustments
178 Journal of Power Electronics, Vol. 16, No. 1, January 2016

Fig. 5. Simulation results obtained by VM method for line operation: (a) Switching angles (degree);(b) DC sources;(c) Voltage
adjustment.

Fig. 6. Comparison between the results obtained by 4 techniques for line operation: (a) THD; (b) SUR; (c) Summation of the DC
sources.

are shown in Fig. 5(a), (b), and (c), respectively. The SUR
values are plotted in Fig. 7.Regarding the figures, the
obtained SUR is between 0.0950 and 0.101 and the THD is
below 14% for most of the output voltages.
SUR (Line operation)

2) Constant Modulation (CM) Technique: By replacing the


SUR and THD expressions in (19) by (9) and (16), the
appropriate switching angles and DC sources are achieved.
These values, along with the obtained results, are expressed
in Table. III.
3) Analysis and Comparison: In order to get a better
understanding of the obtained results, in the same manner as
the phase section, the four methods are compared. The
harmonics and SUR obtained by the four methods are
depicted in Fig. 6(a) and (b).It can be seen that the OMTHD Output voltage (p.u.)
technique is less effective compared to the other approaches. Fig. 7. SUR obtained by proposed VM method for line operation.
Between the two suggested schemes, the CM method has
lower harmonic levels than the VM method, while the SUR
has greater values in the VM. According to the harmonic and TABLE III
SUR diagram, by adding a utilization ratio to the objective OPTIMUM PARAMETERS OBTAINED BY CM METHOD
function, the harmonics are not affected while the SUR is (LINE OPERATION)
Optimum Modulation Index = 0.61
enhanced strikingly. In Table IV, the obtained results in the
Switching angles DC sources
presence and absence of the SUR constraint are presented. It (degree) (p.u.)
THD% SUR
can be seen from Table 4 that by considering the utilization θ1 θ2 θ3 VDC1 VDC2 VDC3
ratio, there is a negligible increase (0.67%) in the line THD. 6.19 0.0949
5.55 16.89 33.55 0.69 0.68 0.60
Meanwhile, this method enhances the SUR by at least 19.3%.
Converter Utilization Ratio Enhancement … 179

(a) (b) (c)


Fig. 8. Experimental results for 7-level inverter based on Table V: (a) Phase voltage obtained by CM method implemented in phase
operation (Time/Div: 2.5 ms, Volt/Div: 20 Volts); (b) Phase voltage obtained by CM method implemented in phase operation (Time/Div:
5 ms, Volt/Div: 10 Volts); (c) Line voltage obtained by CM method implemented in line operation (Time/Div: 5 ms, Volt/Div: 20 Volts).

smaller values. The difference in the DC sources obtained by


the CM techniques with and without SUR consideration is
more noticeable at higher output voltages. According to
Table IV, the DC links are decreased more than 16% at an
output voltage of 0.7. This has a strong effect on reducing the
voltage stress and losses and in improving the components
lifetime.

VII. EXPERIMENTAL RESULTS


Fig. 9. Experimental setup of the cascaded H-bridge inverter. In order to verify the obtained results, experimental tests
are performed on a cascaded H-bridge 7-level inverter. The
TABLE IV experimental setup is depicted in Fig. 9. An ATMEGA-8 is
COMPARISON BETWEEN OBTAINED RESULTS BY PROPOSED CM utilized as a controller to generate the gating signals. In order
METHOD AND CM METHOD WITHOUT SUR CONSIDERATION to convert the control signals into higher current and voltage
(LINE OPERATION) levels, dual power MOSFET drivers are utilized. A 6N137
Methods THD% SUR DC sum
optocoupler is also employed in this design. The maximum
Proposed CM method 6.19 0.0950 2.252 voltage of each cell is 75 Volts, which is specified based on
CM method without the maximum stress of the switches. The CM method is
5.52 0.0796 2.689
SUR performed for phase and line-line operations of the inverter,
and the measured THDs are presented in Table 5. Fig. 8(a)
shows the voltage of the inverter in single phase operation
TABLE V
with the dc levels presented in Table 5. Fig. 8(b) shows the
SWITCHING ANGLES, DC SOURCES VALUES AND EXPERIMENTAL
THD OBTAINED BY PROPOSED CM METHOD voltage of the inverter with a 20% reduction in the levels
Switching THD presented in Fig. 8(a). Fig. 8(c) shows the line voltage of the
DC Sources(p.u.)
Angles(degree) % inverter in line operation. As can be seen, the line voltage
V DC V DC V DC (Fig. 8(c)) reaches 13 levels which implies that the harmonics
Case θ1 θ2 θ3
1 2 3 are effectively eliminated. Based upon the obtained harmonic
Phas 7.7 40.8
23.60 16.5 16 15 13.97 values, which are presented in simulation section (Table I and
e 3 8
5.5 33.5 III), the measured harmonics in the experiments show little
Line 16.89 13.3 13.2 11.6 6.22 deviation from the calculated THDs. According to the
5 5
obtained results, the proposed technique for SUR
This noticeable utilization ratio enhancement improves the enhancement does not degrade the harmonic minimization,
converters performance in an economic manner and shows specifically in 3 phase applications. In addition, it noticeably
that the method is effective. The total values of the DC links improves the utilization ratio and DC source values, which
are also shown in Fig. 6(c). The DC sources in the OMTHD has a great effect on switch losses and stresses as well as the
are constant. Meanwhile, in the proposed methods, it has inverter performance.
180 Journal of Power Electronics, Vol. 16, No. 1, January 2016

VIII. CONCLUSION using genetic algorithm,” Journal of Power Electronics,


Vol. 11, No. 2, pp. 132-139, Mar. 2011.
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[6] L. Yushan, B. Ge, H. Abu-Rub, and F. Peng, “An effective Reza Khamooshi was born in Yazd, Iran, in
control method for three-phase quasi-z-source cascaded 1990. He received his B.S. and M.S. degrees
multilevel inverter based grid-tie photovoltaic power in Electrical Engineering from the Amirkabir
system,” IEEE Trans. Ind. Electron., Vol. 61, No.12, pp. University of Technology (Tehran
6794-6802, Dec. 2014. Polytechnic), Tehran, Iran, in 2012 and 2014,
[7] C. Gu, H. S. Krishnamoorthy, P. N. Enjeti, Z. Zheng, and Y. respectively. He is presently working in the
Li, “A medium-voltage matrix converter topology for wind Power Electronic and Drives
power conversion with medium frequency Laboratory, Amirkabir University of
transformers,” Journal of Power Electronics, Vol.14, No.6, Technology. His current research interests include power
pp. 1166-1177, Nov. 2014. electronics, multilevel inverters, FACTS devices, and distributed
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[9] C. Buccella, C. Cecati, M. G. Cimoroni, and K. Razi, degree from the Isfahan University of
“Analytical method for pattern generation in five-level Technology, Isfahan, Iran, in 2009; and his
cascaded H-bridge inverter using selective harmonic M.S. and Ph.D. degrees (with honors) in
elimination,” IEEE Trans. Ind. Electron., Vol. 61, No. 11, Electrical Engineering from the Amirkabir
pp. 5811-5819, Nov. 2014. University of Technology, Tehran, Iran, in
[10] R. Salehi, N. Farokhnia, M. Abedi, and S. H. Fathi, 2011 and 2014, respectively. From 2012 to
“Elimination of low order harmonics in multilevel inverters 2014, he worked in the Research and
Converter Utilization Ratio Enhancement … 181

Development Center, Damavand Induction Furnace Company,


Damavand, Iran, where he was working on industrial induction
heating systems. He has been working as an Assistant Professor
in the Department of Electrical and Computer Engineering,
Jundi-Shapur University of Technology, Dezful, Iran, since
September 2014. His current research interests include power
electronics, induction heating, inductive power transfer, and
renewable energy.

Javad Shokrollahi Moghani was born in


Tabriz, Iran, in 1956. He received his B.S.
and M.S. degrees in Electrical Engineering
from South Bank Polytechnic, London,
England, UK, and the Loughborough
University of Technology, Loughborough,
England, UK, in 1982 and 1984, respectively.
From 1984 to 1991, he was with the
Department of Electrical Engineering, Amirkabir University of
Technology, Tehran, Iran. He received his Ph.D. degree in
Electrical Engineering from Bath University, Bath, England, in
1995. After graduating, he returned to the Amirkabir University
of Technology where he has been ever since. His current
research interests include DC-DC converters, electric drives, and
electromagnetic system modeling and design using FEM.

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