STGIPS10K60T

SLLIMM™ small low-loss intelligent molded module

IPM, 3-phase inverter, 10 A, 600 V short-circuit rugged IGBT
Datasheet - production data

Applications
• 3-phase inverters for motor drives
• Home appliances, such as washing machines,
refrigerators, air conditioners and sewing
machines

Description
This intelligent power module provides a
compact, high performance AC motor drive in a
simple, rugged design. Combining ST proprietary
control ICs with the most advanced short-circuit-
SDIP-25L rugged IGBT system technology, this device is
ideal for 3-phase inverters in applications such as
home appliances and air conditioners. SLLIMM™
Features is a trademark of STMicroelectronics.

• IPM 10 A, 600 V 3-phase IGBT inverter bridge

including control ICs for gate driving and free-
wheeling diodes
• Short-circuit rugged IGBTs
• VCE(sat) negative temperature coefficient
• 3.3 V, 5 V, 15 V CMOS/TTL inputs
comparators with hysteresis and pull-down /
pull-up resistors
• Undervoltage lockout
• Internal bootstrap diode
• Interlocking function
• Shut down function
• DBC substrate leading to low thermal
resistance
• Isolation rating of 2500 Vrms/min
• 4.7 kΩ NTC for temperature control
• UL recognized: UL1557 file E81734

Table 1. Device summary

Order code Marking Package Packing

STGIPS10K60T GIPS10K60T SDIP-25L Tube

April 2015 DocID018533 Rev 5 1/19

This is information on a product in full production. www.st.com
Contents STGIPS10K60T

Contents

1 Internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3

2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1.1 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Waveforms definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 SDIP-25L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

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STGIPS10K60T Internal block diagram and pin configuration

1 Internal block diagram and pin configuration

Figure 1. Internal block diagram

AM09320v2

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Internal block diagram and pin configuration STGIPS10K60T

Table 2. Pin description

Pin n° Symbol Description

1 OUTU High side reference output for U phase

2 Vboot U Bootstrap voltage for U phase
3 LINU Low side logic input for U phase
4 HINU High side logic input for U phase
5 VCC Low voltage power supply
6 OUTV High side reference output for V phase
7 Vboot V Bootstrap voltage for V phase
8 GND Ground
9 LINV Low side logic input for V phase
10 HINV High side logic input for V phase
11 OUTW High side reference output for W phase
12 Vboot W Bootstrap voltage for W phase
13 LINW Low side logic input for W phase
14 HINW High side logic input for W phase
15 SD Shut down logic input (active low)
16 T1 NTC thermistor terminal
17 NW Negative DC input for W phase
18 W W phase output
19 P Positive DC input
20 NV Negative DC input for V phase
21 V V phase output
22 P Positive DC input
23 NU Negative DC input for U phase
24 U U phase output
25 P Positive DC input

Figure 2. Pin layout (bottom view)

               

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STGIPS10K60T Electrical ratings

2 Electrical ratings

2.1 Absolute maximum ratings

Table 3. Inverter part
Symbol Parameter Value Unit

VPN Supply voltage applied between P - NU, NV, NW 450 V

Supply voltage (surge) applied between P - NU,
VPN(surge) 500 V
NV, NW
VCES Each IGBT collector emitter voltage (VIN(1) = 0) 600 V
Each IGBT continuous collector current at
± IC(2) 10 A
TC = 25°C
± ICP (3) Each IGBT pulsed collector current 20 A
PTOT Each IGBT total dissipation at TC = 25°C 33 W
Short-circuit withstand time, VCE = 0.5 V(BR)CES
tscw 5 µs
Tj = 125 °C, VCC = Vboot= 15 V, VIN (1)= 5 V
1. Applied between HINi, LINi and GND for i = U, V, W.
2. Calculated according to the iterative formula:

Tj ( max ) – TC
IC ( T C ) = -------------------------------------------------------------------------------------------------------
R thj – c × V CE ( sat ) ( max ) ( T j ( max ), I C ( T C ) )

3. Pulse width limited by max junction temperature.

Table 4. Control part

Symbol Parameter Min. Max. Unit

Output voltage applied between OUTU, OUTV,

VOUT Vboot - 21 Vboot + 0.3 V
OUTW - GND
VCC Low voltage power supply - 0.3 21 V
Vboot Bootstrap voltage - 0.3 620 V
Logic input voltage applied between HIN, LIN and
VIN - 0.3 15 V
GND
VSD SD voltage - 0.3 15 V
dVOUT/dt Allowed output slew rate 50 V/ns

Table 5. Total system

Symbol Parameter Value Unit

Isolation withstand voltage applied between each

VISO 2500 V
pin and heatsink plate (AC voltage, t = 60 sec.)
TC Module case operation temperature -40 to 125 °C
TJ Power chips operating junction temperature -40 to 150 °C

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Electrical ratings STGIPS10K60T

2.2 Thermal data

Table 6. Thermal data

Symbol Parameter Value Unit

Thermal resistance junction-case single IGBT max. 3.8 °C/W

RthJC
Thermal resistance junction-case single diode max. 5.5 °C/W

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STGIPS10K60T Electrical characteristics

3 Electrical characteristics

TJ = 25 °C unless otherwise specified.

Table 7. Inverter part

Value
Symbol Parameter Test conditions Unit
Min. Typ. Max.

VCC = Vboot = 15 V,
VIN(1)= 5 V, - 2.1 2.5
Collector-emitter IC = 5 A
VCE(sat) V
saturation voltage VCC = Vboot = 15 V,
VIN(1)= 5 V, - 1.8
IC = 5 A, Tj = 125 °C
Collector-cut off current VCE = 550 V
ICES - 150 µA
(VIN(1) = 0 “logic state”) VCC = Vboot = 15 V
(VIN(1) = 0 “logic state”), IC =
VF Diode forward voltage - 1.9 V
5A

Inductive load switching time and energy

ton Turn-on time - 320 -

tc(on) Crossover time (on) - 70 -
toff Turn-off time VDD = 300 V, - 430 - ns
VCC = Vboot = 15 V,
tc(off) Crossover time (off) - 135 -
VIN(1)= 0 ÷ 5 V,
trr Reverse recovery time IC = 5 A (see Figure 4) - 130 -
Eon Turn-on switching losses - 65 -
µJ
Eoff Turn-off switching losses - 75 -
1. Applied between HINi, LINi and GND for i = U, V, W (LIN inputs are active-low).

Note: tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are
the switching time of IGBT itself under the internally given gate driving condition.

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Electrical characteristics STGIPS10K60T

Figure 3. Switching time test circuit

INPUT

BOOT BUS
/Lin
+5V VBOOT>VCC

/SD
RSD HVG
Hin L
VCC OUT
Vcc IC

DT LVG

VCE
GND CP+

0
1 AM17167v1

Figure 4. Switching time definition

100% IC 100% IC

t rr

VCE IC IC VCE

VIN VIN

t ON t OFF
t C(ON) t C(OFF)
VIN(ON) 10% IC 90% IC 10% VCE VIN(OFF) 10% VCE 10% IC

(a) turn-on (b) turn-off AM09223V1

Note: Figure 4 "Switching time definition" refers to HIN inputs (active high). For LIN inputs (active
low), VIN polarity must be inverted for turn-on and turn-off.

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STGIPS10K60T Electrical characteristics

3.1 Control part

Table 8. Low voltage power supply (VCC = 15 V unless otherwise specified)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Vcc_hys Vcc UV hysteresis 1.2 1.5 1.8 V

Vcc_thON Vcc UV turn ON threshold 11.5 12 12.5 V
Vcc_thOFF Vcc UV turn OFF threshold 10 10.5 11 V
VCC = 10 V
Undervoltage quiescent
Iqccu SD = 5 V; LIN = 5 V; 450 µA
supply current
HIN = 0
Vcc = 15 V
Iqcc Quiescent current SD = 5 V; LIN = 5 V 3.5 mA
HIN = 0

Table 9. Bootstrapped voltage (VCC = 15 V unless otherwise specified)

Symbol Parameter Test conditions Min. Typ. Max. Unit

VBS_hys VBS UV hysteresis 1.2 1.5 1.8 V

VBS_thON VBS UV turn ON threshold 11.1 11.5 12.1 V
VBS_thOFF VBS UV turn OFF threshold 9.8 10 10.6 V
VBS < 9 V
Undervoltage VBS quiescent
IQBSU SD = 5 V; LIN and 70 110 µA
current
HIN = 5 V
VBS = 15 V
IQBS VBS quiescent current SD = 5 V; LIN and 200 300 µA
HIN = 5 V
RDS(on) Bootstrap driver on resistance LVG ON 120 W

Table 10. Logic inputs (VCC = 15 V unless otherwise specified)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Vil Low logic level voltage 0.8 1.1 V

Vih High logic level voltage 1.9 2.25 V
IHINh HIN logic “1” input bias current HIN = 15 V 110 175 260 µA
IHINl HIN logic “0” input bias current HIN = 0 V 1 µA
ILINl LIN logic “1” input bias current LIN = 0 V 3 6 20 µA
ILINh LIN logic “0” input bias current LIN = 15 V 1 µA
ISDh SD logic “0” input bias current SD = 15 V 30 120 300 µA
ISDl SD logic “1” input bias current SD = 0 V 3 µA
Dt Dead time see Figure 9 600 ns

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Electrical characteristics STGIPS10K60T

Table 11. Shut down characteristics (VCC = 15 V unless otherwise specified)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Shut down to high / low side VOUT = 0, Vboot = VCC,

tsd 50 125 200 ns
driver propagation delay VIN = 0 to 3.3 V

Table 12. Truth table

Logic input (VI) Output
Condition
SD LIN HIN LVG HVG

Shutdown enable
L X X L L
half-bridge tri-state
Interlocking
H L H L L
half-bridge tri-state
0 ‘’logic state”
H H L L L
half-bridge tri-state
1 “logic state”
H L L H L
low side direct driving
1 “logic state”
H H H L H
high side direct driving

Note: X: don’t care

Figure 5. Maximum IC(RMS) current vs. switching Figure 6. Maximum IC(RMS) current vs. fSINE (1)
frequency (1)
AM03801v1 AM03802v1
IC (RMS) IC (RMS)
(A) (A) VPN = 300 V, Modulation index = 0.8,
VPN = 300 V, Modulation index = 0.8, PF = 0.6, Tj = 150°C, Tc = 100 °C
PF = 0.6, Tj= 150 °C, f SINE = 60 Hz 8
12

7
10 TC = 80°C
fsw = 12 kHz
6

8 fsw = 16 kHz
TC = 100°C 5
fsw = 20 kHz

6 4
4 6 8 10 12 14 16 fsw(kHz) 1 10 fSINE(Hz)
1. Simulated curves refer to typical IGBT parameters and maximum RthJC.

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STGIPS10K60T Electrical characteristics

3.1.1 NTC thermistor

Table 13. NTC thermistor

Symbol Parameter Test conditions Min. Typ. Max. Unit.

R25 Resistance T = 25 °C 4.7 kΩ

R125 Resistance T = 125 °C 160 Ω
B B-constant T = 25 °C to 85 °C 3950 K
T Operating temperature -40 150 °C

Equation 1: resistance variation vs. temperature

1 1
B  --- – ----------
T 298
R ( T ) = R 25 ⋅ e
Where T are temperatures in Kelvins

Figure 7. NTC resistance vs. temperature

AM17168v1
NTC [kΩ]

180

160

140

120

100

80
MAX.
60
CENTER
40

20
MIN.
0
-40 -20 0 20 40 60 80 100 120 140 (°C)

Figure 8. NTC resistance vs. temperature (zoom)

AM17169v1
NTC [kΩ]

1.8

1.6

1.4

1.2

1.0

0.8
MAX.
0.6
CENTER
0.4
MIN.
0.2

0.0
50 60 70 80 90 100 110 120 130 140 (°C)

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Electrical characteristics STGIPS10K60T

3.2 Waveforms definitions

Figure 9. Dead time and interlocking waveforms definitions

LIN

G
ING

CKIN
CONTROL SIGNAL EDGES HIN

K
LOC

RLO
OVERLAPPED:

INTE
INTE
INTERLOCKING + DEAD TIME LVG

DTLH DTHL
HVG
gate driver outputs OFF gate driver outputs OFF
(HALF-BRIDGE TRI-STATE) (HALF-BRIDGE TRI-STATE)

LIN

CONTROL SIGNALS EDGES HIN

SYNCHRONOUS (*):
DEAD TIME
LVG

DTLH DTHL
HVG
gate driver outputs OFF gate driver outputs OFF
(HALF-BRIDGE TRI-STATE) (HALF-BRIDGE TRI-STATE)

LIN

CONTROL SIGNALS EDGES HIN

NOT OVERLAPPED,
BUT INSIDE THE DEAD TIME: LVG
DEAD TIME
DTLH DTHL
HVG

gate driver outputs OFF gate driver outputs OFF

(HALF-BRIDGE TRI-STATE) (HALF-BRIDGE TRI-STATE)

LIN
CONTROL SIGNALS EDGES
NOT OVERLAPPED, HIN
OUTSIDE THE DEAD TIME:
DIRECT DRIVING
LVG
DTLH DTHL
HVG

gate driver outputs OFF gate driver outputs OFF

(HALF-BRIDGE TRI-STATE) (HALF-BRIDGE TRI-STATE)

(*) HIN and LIN can be connected together and driven by just one control signal

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STGIPS10K60T Applications information

4 Applications information

Figure 10. Typical application circuit

AM09321v2

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Applications information STGIPS10K60T

4.1 Recommendations
• Input signal HIN is active high logic. A 85 kΩ (typ.) pull down resistor is built-in for each
high side input. If an external RC filter is used, for noise immunity, pay attention to the
variation of the input signal level.
• Input signal /LIN is active low logic. A 720 kΩ (typ.) pull-up resistor, connected to an
internal 5 V regulator through a diode, is built-in for each low side input.
• To prevent the input signals oscillation, the wiring of each input should be as short as
possible.
• By integrating an application specific type HVIC inside the module, direct coupling to
MCU terminals without any opto-coupler is possible.
• Each capacitor should be located as nearby the pins of IPM as possible.
• Low inductance shunt resistors should be used for phase leg current sensing.
• Electrolytic bus capacitors should be mounted as close to the module bus terminals as
possible. Additional high frequency ceramic capacitor mounted close to the module
pins will further improve performance.
• The SD signal should be pulled up to 5 V / 3.3 V with an external resistor.

Table 14. Recommended operating conditions

Value
Symbol Parameter Conditions Unit
Min. Typ. Max.

VPN Supply voltage Applied between P-Nu, Nv, Nw 300 400 V

VCC Control supply voltage Applied between VCC-GND 13.5 15 18 V
Applied between VBOOTi-OUTi for
VBS High side bias voltage 13 18 V
i = U, V, W
Blanking time to
tdead For each input signal 1 µs
prevent arm-short
-40°C < Tc < 100°C
fPWM Pwm input signal 20 kHz
-40°C < Tj < 125°C
Case operation
TC 100 °C
temperature

For further details, refer to AN3338.

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STGIPS10K60T Package information

5 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Please refer to dedicated technical note TN0107 for mounting instructions.

5.1 SDIP-25L package information

Figure 11. SDIP-25L package outline

B

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Package information STGIPS10K60T

Table 15. SDIP-25L mechanical data

mm
Dim.
Min. Typ. Max.

A 43.90 44.40 44.90

A1 1.15 1.35 1.55
A2 1.40 1.60 1.80
A3 38.90 39.40 39.90
B 21.50 22.00 22.50
B1 11.25 11.85 12.45
B2 24.83 25.23 25.63
C 5.00 5.40 6.00
C1 6.50 7.00 7.50
C2 11.20 11.70 12.20
C3 2.90 3.00 3.10
e 2.15 2.35 2.55
e1 3.40 3.60 3.80
e2 4.50 4.70 4.90
e3 6.30 6.50 6.70
D 33.30
D1 5.55
E 11.20
E1 1.40
F 0.85 1.00 1.15
F1 0.35 0.50 0.65
R 1.55 1.75 1.95
T 0.45 0.55 0.65
V 0° 6°

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STGIPS10K60T Package information

5.2 Packing information

Figure 12. SDIP-25L packing information

AM10488v1
8123127_E
Bulk quantity: 132 pcs
Base quantity: 11 pcs

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Revision history STGIPS10K60T

6 Revision history

Table 16. Document revision history

Date Revision Changes

07-Mar-2011 1 Initial release.

14-Sep-2011 2 Modified Section 3.1.1 on page 11.
Modified: Min. and Max. value Table 4 on page 5.
Updated: Table 15 on page 15, Figure 11 on page 15 and
28-Aug-2012 3
Figure 12 on page 17.
Added: Figure 13 on page 18.
Modified:
– description pin 15 Table 2 on page 4,
VSD parameter Table 4 on page 5.
30-Apr-2013 4
– Figure 3 on page 8 and Figure 7 on page 11.
Added:
– Figure 8 on page 11.
Text edits and formatting changes throughout document
14-Apr-2015 5 Updated Figure 2: Pin layout (bottom view)
Updated Section 5: Package information

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STGIPS10K60T

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© 2015 STMicroelectronics – All rights reserved

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