I2C Protocol
I2C Protocol
I2C PROTOCOL
ADDRESSING:After the start condition the Master sends a 7 bit address to the target slave
device(8th bit used to indicate read/write operation).
The slave then compares its own address with this address.
If the address matches,the corresponding slave device acknowledge the master.
DATA TRANSFER:Once the slave acknowledge the address,data can be transferred between
Master and Slave.
Read/write =1 Master sending data to slave
Read/write=0 Master receiving data from the slave
ACKNOWLEDGMENT: If the data frame is received successfully the ACK bit sent to the
Master by the slave.
STOP CONDITION: When the communication Is complete,the master sends a stop condition
by releasing SDA line from low to high by keeping SCL high.
Reduces complexity
Cost efficient
I2C allows multiple master communicates with multiple slave device on the same bus.
CLOCK Synchronization:
The master generates the clock signal,ensuring synchronized data transfer between devices
ADDRESSING:
I2C support 7 bit and 10 bit addressing allowing communication with a large no of devices
Acknowledgment:
The protocol uses acknowledgment bits confirm the successful reception of data.
The I²C (Inter-Integrated Circuit) protocol is a widely used serial communication protocol
that allows multiple devices to communicate with each other using a two-wire interface.
Que 5) What are the two lines in the I²C protocol and their functions?
Que 6) How does the I²C protocol handle multiple devices on the bus?
The I²C protocol uses a master/slave relationship, where one device acts as the
master and initiates communication, while the other devices act as slaves and
respond to commands from the master.
Start is signaled by a high-to-low transition on the SDA line while SCL is high,
and Stop is signaled by a low-to-high transition on the SDA line while SCL is high.
I²C bus arbitration is a mechanism used to resolve conflicts when multiple devices
attempt to transmit data simultaneously.
It uses an addressing scheme where devices with lower addresses have higher
priority.
If two devices start transmitting simultaneously, the device with the lower address
wins the arbitration and continues transmitting while the other device becomes a
receiver.
Clock stretching is a mechanism used by slave devices to slow down the clocks rising
edges in certain condition,allowing them to gain more time for data processing
Que 10) What are the data transmission modes supported by I²C?
I²C supports two data transmission modes:
o Standard Mode: It operates at a clock speed of up to 100 kHz.
After receiving a byte of data, the receiver (either master or slave) sends an
acknowledgment (ACK) bit.
If the ACK bit is low, it indicates that the byte was successfully received.
If the ACK bit is high, it signifies an error or that the receiver is not ready.
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I²C addresses are typically 7 bits long, allowing for a total of 128 possible addresses.
However,
there is also a 10-bit addressing mode available for devices that require a larger
address space.
Que 13) What is the maximum number of devices that can be connected on an I²C
bus?
In the I²C protocol, the maximum number of devices that can be connected on a bus
depends on the addressing scheme used.
With the 7-bit addressing scheme, there can be up to 128 devices on the bus.
With the 10-bit addressing scheme, the number of devices can be significantly
higher.
The master generates clock pulses on the SCL line, and all devices on the bus
synchronize their data transfers based on these clock pulses.
No,I2c requires pull-up resistors on both SDA line and SCL line lines to maintain the
high voltages level when the bus is idle
It allows the master to continue communication with the same slave device after a
previous transfer, without releasing the bus.
Level shifters or voltage translators are used to adapt the voltage levels between
devices with different operating voltages.
Que 18) What are the differences between I²C and SPI protocols?
Some key differences between I²C and SPI protocols include:
o I²C uses a two-wire interface (SDA and SCL),
while SPI typically uses four wires (MOSI, MISO, SCK, and SS).
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For longer distances, I²C can be used with the help of signal repeaters or bus
extenders to overcome limitations in signal integrity and reach.
Que 20) How does clock synchronization change in multi-master I²C systems?
In multi-master I²C systems, clock synchronization becomes more challenging.
Each master device generates its own clock pulses, and conflicts can arise if multiple
masters try to transmit simultaneously.
Que 21) How can you increase the data transfer speed in I2C?
To increase data transfer speed,you can use a higher clock frequency(up to the
maximum supported by the devices)
Device addresses are assigned by the device manufacturer and typically consist of a
fixed part (device type) and variable part (selectable by the user).
The general call address (0000000) allows the master to broadcast commands to all
devices on the bus.
Que 24) Explain the purpose of the ACK (acknowledge) and NACK (not
acknowledge) signals.
NACK (not acknowledge) is a signal used when the receiver does not wish to
acknowledge data reception.
Multi-byte data transfer involves the master sending or receiving multiple bytes of
data sequentially without releasing the bus between bytes.
Que 26) Describe the start condition in I2C, including the sequence of signal
changes.
The start condition is when the SDA line transitions from high to low while the SCL
line is high.
Que 27) Describe the stop condition in I2C, including the sequence of signal
changes.
The stop condition is when the SDA line transitions from low to high while the SCL
line is high.
Que 28) What is the purpose of the start and stop conditions in I2C
communication?
Start and stop conditions mark the beginning and end of a data transfer transaction,
respectively.
The clock signal (SCL) is generated by the master and used to synchronize data
transfer.
Que 30) What is the clock speed (frequency) range typically used in I2C?
The clock speed in I2C communication is typically categorized into standard mode
(100 kHz), fast mode (400 kHz), fast mode plus (1 MHz), and high-speed mode (3.4
MHz).
Que 31) How can you calculate the bit rate in I2C communication?
The bit rate can be calculated using the formula: Bit Rate = Clock Speed / (SCL Low
Period + SCL High Period).
Que 32) What happens if pull-up resistors are too weak or too strong in an I2C bus?
Weak pull-up resistors can lead to slow signal transitions, while strong pull-up
resistors can result in excessive current consumption and slower rise times.
7|Page @shraddha_pawankar Date:19/08/23
Que 33) What are some common sources of errors in I2C communication?
Common sources of errors include bus collisions, incorrect addressing, and signal
integrity issues.
Interfacing sensors
Tempreture sensors