2.

1 Combinational Logic representation

 Combinational circuits
 Digital circuits are divided into two broad categories:
 Combinational circuits
 Sequential circuits
1.In combinational circuits, outputs at any instant of
time depend upon the inputs present at that instant of
time. So no memory in these circuits
2. In sequential circuits, outputs at any instant of time
depend upon the present inputs as well as past
inputs/outputs
So memory elements are required to store past
information
Design requirements
 Design requirements of combinational circuits:
 A set of statements
 Boolean expression
 Truth table
 In circuit design aims should be:
 Use of minimum number of components to ensure low
cost
 Saving in space
 Power requirements
Methods to simplify Boolean functions
 Algebraic method
 Karnaugh-map technique
 Quine-McCluskey method
 Variable entered mapping (VEM) technique
 K-map- simplest and most commonly used manual
method. Convenient upto 6 variables. Beyond that it is
very cumbersome
 Quine-McClusky- Suitable for computer
mechanisation
 Standard representations for logic functions
1. Sum-of-products form (SOP)
2. Product-of-sums form (POS)
e.g. given logic expression is
F = (A+BC)(B+CA) ---- 1
This function can be implemented using basic gates as :
A
B
C F
B
C
A This implementation requires 3 levels
 Sum-of-product form (SOP)
Y = (A+BC)(B+CA)---- 1
=A(B+CA) +BC(B+CA) --2
=AB+ACA+BCB+BCCA --3
Eqn 3 can be simplified using Boolean laws as follows:
=AB+ AC+BC --4
Representation of eqn 4 is known as sum-of-
products(SOP) form. This can be realized with
AND-OR gates configuration.
SOP realization using AND-OR gates
Y = AB+ AC+BC
A
B
A Y = AB+ AC+BC
C
B
C
This realization requires 2 levels
 SOP realization using NAND gates
 Using De-Morgan’s theorems eqn AB+ AC’+BC can be
written as
Y= (AB+ AC’+BC) --1
= AB . AC .BC ----2
Eqn 2 can be realized using NAND gates only as follows:
A
B
A Y = AB+ AC+BC
C
B
C This realization requires 2 levels
 Product-of-sum form (POS)
Y = (A+BC)(B+CA)---- 1
 Eqn 1 can be represented in another form using
Boolean laws as
 Y= (A+B)(A+C)(B+C)(B+A)--2
 Eqn 2 can be simplified using Boolean laws as follows:
 Y = (A+B)(A+C)(B+C) --- 3
 Eqn 3 is known as Product-of-sums (POS) form
 POS realization using OR-AND
Y = (A+B)(A+C)(B+C)

A
B
A
C Y
B
C
 POS realization using NOR gates
Using De-Morgan’s theorems eqn Y = (A+B)(A+C)(B+C)
Can be written as Y = (A+B)(A+C)(B+C)--2
= (A+B) +(A+C) +(B+C)---3
Eqn 3 can be realized using NOR gates only
A
B
A
Y = (A+B)(A+C)(B+C)
C
B
C
Simplification of Boolean equations

1)Eqn Y = AB+ AC+BC can be simplified using Boolean law

as Y = BC + AC---1
2)Eqn Y = (A+B)(A+C)(B+C) can be simplified using
Boolean law as Y= (A+C)(B+C) ---2
Realization of equations 1 and 2
B
C Y=BC+AC A Y=(A+C)(B+C)
C
A
C B
C
Min terms and Max terms
 Eqns Y= AB + AC +BC -----(SOP form)
and Y=(A+B)(A+C)(B+C) ---(POS form)
 Each individual input variable is termed as Literal.
 If each term in SOP and POS forms contains all the
literals then these are known as canonical SOP and
POS respectively
 Each individual term in canonical SOP form is called
as minterm
 Each individual term in canonical POS form is called
as maxterm
Conversion of SOP form in canonical SOP
 SOP form can be converted into canonical SOP by
ANDing the terms in the expression with terms
formed by ORing the variable and its complement
hich are not present in that term
 E.g for 3 variable expression with variables A,B and C,
if there is term A only where B and C terms are
missing, then we form two terms (B+B) and (C+C) and
AND with A
 So we get A(B+B).(C+C)= ABC+ABC+ABC+ABC
 Example
 Convert SOP eqn Y = AB + AC +BC into canonical SOP
form
 Y= AB(C+C)+AC(B+B)+BC(A+A)
 =ABC +ABC+ABC+ABC+ABC+ABC
 = ABC +ABC +ABC+ABC
Conversion of POS form into canonical POS
form
 ORing the terms in the expression with terms formed
by ANDing the variable and its complement which are
not present in that term
 E.g. for 3 variable expression with variables A, B and C
if there is a term A where B and C are missing then we
form BB and CC and OR A with these terms. So we get
 A+BB+CC= (A+BB+C)(A+BB+C)
 = (A+B+C)(A+B+C)(A+B+C)(A+B+C)
 Canonical SOP representation in min terms
Canonical POS representation in max terms

 Y= ABC +ABC +ABC+ABC

This canonical SOP eqn can be represented as min
terms:
 Y = m3 + m4+ m6 + m7
= ∑ m(3,4,6,7)
 Y = (A+B+C)(A+B+C)(A+B+C)(A+B+C)
This canonical POS eqn can be represented as max
terms:
Y=M0 . M1 .M2.M5
=∏ M(0,1,2,5)
 Karnaugh map(K-map) representation of logic
functions
 Graphical method of simplifying and manipulating
Boolean expressions or truth table in systematic way
 Information available in truth table or available in POS
or SOP form is represented on Karnaugh map (K-map)
 The map is made up of squares, each square
representing one min term of the function
 This produces a circuit diagram with minimum
number of gates and minimum number of inputs
 Most extensively used tool
 Can be used for any number of variables but generally
used up to 6 variables beyond which it becomes very
cumbersome
K-maps
Two variable K-map
Two variable k-map with SOP and POS
mapping
Example of mapping two variable truth table into
k-map
Three variable K-map
3 variable k-map with min term locations
3 variable k-map example 1
3 variable k-map example 2
Four variable K-map
K map with don’t care conditions
Five variable structure