Getting started with the new PSpice® for TI

design and simulation tool

Ian Williams
APP – LP – LDO
About me – Ian Williams
Business lead, Low-Voltage LDOs

• Career
– BSEE University of Texas at Dallas, 2009
– TI since 2009, LDO since July 2020
• Expertise
– 11 years working with various types of amplifiers
– Co-creator of GWL amplifier SPICE model architecture
– Co-creator of TI Precision Labs – Op Amps
• Fun fact
– Big music guy – have performed at festivals, DJ’d at
clubs and on FM radio, and even met my wife at
Coachella 2013

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Agenda
• TI simulation tools overview – 10 min.
• PSpice® for TI deep dive – 10 min.
– Features and limitations
– Built-in model library
• Setup and simulation examples – 25 min.
– Operational amplifier: OPA211
– Power supply: TPS7A52
– Modeling Application: Power MOSFET
• Additional resources
???
Please ask your questions
in the chat!

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 Part 1
TI simulation tools overview

Tip: SPICE stands for “Simulation Program

with Integrated Circuit Emphasis”

4
Time for some audience participation…

5
Introducing PSpice® for TI
PSpice for TI will help engineers speed time to
market and reduce development costs, delivering:

• Full-featured simulation of entire systems.

– Advanced capabilities, including Monte Carlo and
worst-case analysis.
– Synchronized library of >5,700 models and counting.
– No design size limitations.
– Easy transition to layout and prototype.

• Integrated design resources.

– Quick access to TI product information.
– No need to manually upload new TI models.

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Why is TI partnering with Cadence?
Short design timelines
Today’s design engineers must
produce accurate designs on tight
deadlines — in many cases,
reducing the prototyping and
evaluation phases of their designs.

Growing demand Desire for more

There is an increased need for advanced simulation
simulation software to test new Existing simulation tools in the
design concepts, accelerate product market lack advanced analysis
development and demonstrate capabilities, model portability and
regulatory compliance. flexibility, and easy library
Source: ABI Research synchronization.

“Tools that are intuitive and include system-level simulation capabilities can
cut the development time and speed time to market.” – Kevin Anderson, Omdia
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Is PSpice for TI replacing other TI tools?

Fundamentals Investigation & Design & Design

& skill-building brainstorming simulation support

• Educational e-books • Easy part selection • Evaluation modules • e2e.ti.com

• Technical articles on TI.com • WEBENCH® Power • Forums for expert
• TI Precision Labs • Reference designs Designer answers to technical
for specific • Filter Design Tool questions
• Power Supply applications
Design Seminars • Analog Engineer’s
(PSDS) • Application notes Calculator, Circuit
and technical white Cookbooks &
• Additional videos at papers
training.ti.com Pocket Reference
• TINA-TI™

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PSpice for TI vs. TINA-TI
PSpice for TI TINA-TI
Analysis / simulation
AC, Noise, BIAS point, DC sweep,
Yes Yes
Transient, Fourier
Temperature,
Temperature,
Variable sweeps component,
component
parametric
Monte Carlo analysis Yes No
Worst case analysis Yes No
Libraries / components
Internal libraries ~5700 ~1300
Automatic library updates Yes No
Built-in modeling application Yes No
Schematics
Create hierarchical schematic Yes No
Multipage schematics Yes No

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 Part 2
PSpice for TI deep dive

Tip: PSpice for TI runs offline!

10
Software features and limitations FAQ
Q. Does PSpice for TI work offline?
A. Yes, an internet connection is not required to run.

Q. Is there a maximum number of nodes?

A. No, there are no design size limitations. You can also use multi-page schematics and
hierarchical blocks.

Q. Are there any other limits to be aware of?

A. Yes. The tool is designed primarily as a SPICE simulation environment for use with the built-in TI
models. If third-party models are imported, then only three nodes can be probed simultaneously.

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Built-in TI model library

Matches the product

tree on TI.com

Includes device-specific test benches

To accelerate your development
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How do I update the TI model library?
• Updates to the model library are automatically detected and performed at
software startup.
– The user can choose not to update.
• The model library is installed locally
on the user’s hard drive. Models can be
copied and imported into other tools
if desired.
– Location: C:\SPB_Data\cdssetup\pspTILibDir

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Are models editable?
• Models are text files and may be edited with a text editor (I recommend
Notepad++) from the library directory
– Note: editing TI models breaks their signature, causing the tool to treat them as 3rd-party
• Some models have user-
editable parameters. Editing
these does not break signature.
• If you edit a model and save it
in the same location, it will get
over-written during the next
library update.

Model file example

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Modeling application
• Used to add customizable, parameterized components to your design:
– Power MOSFETs
– Power diodes
– Passives with parasitics
– Independent sources
– Switches
– Transformers
• Click Place  PSpice Component…
 Modeling Application in the top
menu bar
• Note: these components do not
trigger the probe limit

15
Modeling application, cont.
• A simple UI opens for each type of component with editable fields
• Customize each parameter to your liking, then click Place to drop in schematic
– Note: Device parameters can still be edited from their properties once in the schematic

Power MOSFET window Power NMOS in schematic

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Additional included model libraries
• These standard PSpice libraries are also included:
Library Description

ABM Analog behavioral models for various math functions

ANALOG Passives, dependent sources, switches, transmission lines

BREAKOUT Customizable versions of many device types

DIG_MISC Digital timing control, pull-up / pull-down resistors

DIG_PRIM Logic gates, flip-flops

SOURCE Independent voltage and current sources

SPECIAL Parameters, simulation control, library management, utilities

• Note: components from these libraries do not trigger the probe limit
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Importing third-party or custom models
• With your project (.opj) selected, click Tools  Generate Part
• Browse to your model file in the new window, make your selections, and click OK
• The new model appears in your project’s library

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Types of models on TI.com

Type Description

Analog / mixed-signal model for use in PSpice-based simulators. Packaged

PSpice in a way to be easy to import and use in PSpice / Cadence / OrCAD.

Analog / mixed-signal model for use in PSpice-based simulators. Packaged

TINA-TI in a way to be easy to import and use in TINA-TI.

HSPICE Analog / mixed-signal model for use in HSPICE-based simulators. HSPICE is

(uncommon) a branch of SPICE similar to PSpice, but models are not directly compatible.

SIMPLIS Switch-mode power supply model for use in SIMPLIS.

I/O Buffer Information Specification model, typically used for digital pin timing
IBIS analysis. Compatible with a broad range of industry simulators.

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 Part 3
Setup and simulation examples

Tip: Enabling AutoConverge in your sim

profile can fix a broad range of
convergence issues.
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Operational amplifier example – OPA211

Schematic capture AC simulation result

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Power supply example – TPS7A52

Schematic capture Transient simulation result

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Modeling Application – Power MOSFET

Schematic capture DC simulation result

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 Part 4
Additional Resources

Tip: Choose the “Last Plot” setting in your

sim profile to preserve results display
settings between runs.
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Additional resources
Hands-on training manual
• Self-guided, step-by-step tutorial that walks
the user through the entire tool workflow
• Includes basic and more advanced
content
• Includes debugging and troubleshooting
• Available from the PSpice for TI start page:
• Click Training Course

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Additional resources, cont.
Overview content Technical training videos

How to simulate complex

analog power and signal-
chain circuits with
PSpice® for TI

[Link]

PSpice for TI
overview video

[Link]

[Link to videos]

TI.com/pspice-for-ti

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“Trust, but verify” SPICE models
• Series of articles that covers verifying parameters of amplifier models:
– Part 1: Output impedance
– Part 2: Small-signal bandwidth
– Part 3: Input-referred errors
– Part 4: Noise
Direct support from TI
• For tool-related support: Simulation, hardware & system design tools forum
• For specific model or product support: post to that product’s forum
– i.e. For amplifier support, post to the Amplifiers forum

Note: these forums are all supported by TI applications engineers who are
graded on responsiveness and quality of support. You should get an initial reply in
24h.
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SPICE tips – analysis parameters
Option Default Relaxed Effect

Relaxes multiple parameters if

AutoConverge Off On
needed to enable convergence
Sets the absolute tolerance of
ABSTOL 1e-12 1e-10 nodal currents between DC
iterations
Sets the relative tolerance of the
RELTOL 1e-3 3e-3 nodal voltages at each DC
iteration compared to the first
Adds conductance parallel to
GMIN 1e-12 1e-10
every p-n junction
Adds capacitance from every
CSHUNT 0 1e-15
node to ground

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SPICE tips – DC path to GND
• Ensure DC path to ground at every node
– Can force a path with large resistors (1T, etc.) that don’t affect electrical performance
– Try to use the smallest value possible
MID MID

IN+_ESD+
IN+_ESD-

C_CM+ 4e-12
R52 1G
R34 250

IN+

C_DIFF 4e-12
R35 250

IN-

C_CM- 4e-12
R53 1G
IN-_ESD+
IN-_ESD-

MID MID

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SPICE tips – linear circuits
• Design functional blocks with as linear behavior as possible
– Sharp transitions or discontinuities cause issues with convergence checks
– Use R-C filter networks to reduce bandwidth of subcircuits for smooth transitions
– Use voltage inputs and current outputs wherever possible

Voltage inputs Current output R-C filter slows edges of

OLN subcircuit output
OL_SENSE OL_SENSE R32 100
OLN SW+ SW_OL
OLP OL_SENSE

C12 10e-12
R31 1
COM
OLP
+ +
I I
H2 H3
- -
Resistor converts current to
voltage and provides DC
MID path to GND
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SPICE tips – bounded matrix
• Keep matrix equations as tightly bounded as possible
– Place limits on gain and buffer stages
– Use only as much gain as required
– Scale resistances to keep node voltages and currents in similar ranges

VCCS_LIM_1 Out
VC+ IOUT-
R44 1e6
VCCS_LIM

VC- IOUT+
MID

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 SPICE tips – simplified components
• Replace complex components with simple approximations if exact component
modeling isn’t necessary
– Example: ideal diode  voltage-controlled switch

Diode equation:
V_B- V_A V_B+ V_B- V_A V_B+

SW- 0 SW+ 0

+
-

-
V_B+ 5 V_B+ 5

®
D1 D2
+ VCVS1 1 VCVS 2 1 + VCVS1 1 VCVS 2 1
V_B V_B V_B V_B
+ + + + + + + +
+ +
V_B- 5 V_B- 5
- - - - - - - -

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Thank you!

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SLYP725
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